From 9b8c4a355d07657aef255e0aabc86ec5800c7a2c Mon Sep 17 00:00:00 2001 From: Alin Jerpelea Date: Thu, 4 Jul 2019 14:02:05 +0000 Subject: [PATCH] Merged in alinjerpelea/nuttx (pull request #935) drivers: video: add ISX012 Image sensor * arch: arm: src: cxd56xx: add cisif support add cisif support on cxd56xx chip to be able to use cameras Signed-off-by: Alin Jerpelea * drivers: video: add ISX012 Image sensor add driver for ISX012 Image sensor Signed-off-by: Alin Jerpelea Approved-by: Gregory Nutt --- arch/arm/include/cxd56xx/cisif.h | 111 + arch/arm/src/cxd56xx/Kconfig | 5 + arch/arm/src/cxd56xx/Make.defs | 4 + arch/arm/src/cxd56xx/cxd56_cisif.c | 910 +++++ arch/arm/src/cxd56xx/hardware/cxd56_cisif.h | 113 + drivers/video/Kconfig | 5 + drivers/video/Make.defs | 4 + drivers/video/isx012.c | 3684 +++++++++++++++++++ include/nuttx/video/isx012.h | 74 + include/nuttx/video/isx012_range.h | 338 ++ include/nuttx/video/isx012_reg.h | 1392 +++++++ 11 files changed, 6640 insertions(+) create mode 100644 arch/arm/include/cxd56xx/cisif.h create mode 100644 arch/arm/src/cxd56xx/cxd56_cisif.c create mode 100644 arch/arm/src/cxd56xx/hardware/cxd56_cisif.h create mode 100644 drivers/video/isx012.c create mode 100644 include/nuttx/video/isx012.h create mode 100644 include/nuttx/video/isx012_range.h create mode 100644 include/nuttx/video/isx012_reg.h diff --git a/arch/arm/include/cxd56xx/cisif.h b/arch/arm/include/cxd56xx/cisif.h new file mode 100644 index 0000000000..2967fd0726 --- /dev/null +++ b/arch/arm/include/cxd56xx/cisif.h @@ -0,0 +1,111 @@ +/**************************************************************************** + * arch/arm/include/cxd56xx/cisif.h + * + * Copyright 2018 Sony Semiconductor Solutions Corporation + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name of Sony Semiconductor Solutions Corporation nor + * the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_INCLUDE_CXD56XX_CISIF_H +#define __ARCH_ARM_INCLUDE_CXD56XX_CISIF_H + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +typedef void (*notify_callback_t)(uint8_t code, uint32_t size, uint32_t addr); +typedef void (*comp_callback_t)(uint8_t code, uint32_t size, uint32_t addr); + +struct cisif_init_yuv_param_s +{ + uint16_t hsize; + uint16_t vsize; + uint32_t notify_size; + notify_callback_t notify_func; +}; + +typedef struct cisif_init_yuv_param_s cisif_init_yuv_param_t; + +struct cisif_init_jpeg_param_s +{ + uint32_t notify_size; + notify_callback_t notify_func; +}; + +typedef struct cisif_init_jpeg_param_s cisif_init_jpeg_param_t; + +struct cisif_sarea_s +{ + uint8_t *strg_addr; + uint32_t strg_size; +}; + +typedef struct cisif_sarea_s cisif_sarea_t; + +struct cisif_param_s +{ + uint32_t format; + cisif_init_yuv_param_t yuv_param; + cisif_init_jpeg_param_t jpg_param; + cisif_sarea_t sarea; + comp_callback_t comp_func; +}; + +typedef struct cisif_param_s cisif_param_t; + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +int cxd56_cisifinit(void); +int cxd56_cisiffinalize(void); +int cxd56_cisifstartcapture(cisif_param_t *param, cisif_sarea_t *sarea); +int cxd56_cisifstopcapture(void); +int cxd56_cisifsetdmabuf(cisif_sarea_t *sarea); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ + +#endif /* __ARCH_ARM_INCLUDE_CXD56XX_CISIF_H */ diff --git a/arch/arm/src/cxd56xx/Kconfig b/arch/arm/src/cxd56xx/Kconfig index db0f66b304..14ca69e6d9 100644 --- a/arch/arm/src/cxd56xx/Kconfig +++ b/arch/arm/src/cxd56xx/Kconfig @@ -1070,6 +1070,11 @@ config CXD56_UDMAC Use DMAC for reading sensing data from SCU FIFO. endif # CXD56_SCU +config CXD56_CISIF + bool "CMOS image sensor interface" + default n + ---help--- + CMOS image sensor interface for cx5602 chip endmenu comment "Storage Options" diff --git a/arch/arm/src/cxd56xx/Make.defs b/arch/arm/src/cxd56xx/Make.defs index 2e562d9655..9a2c000a58 100644 --- a/arch/arm/src/cxd56xx/Make.defs +++ b/arch/arm/src/cxd56xx/Make.defs @@ -160,6 +160,10 @@ ifeq ($(CONFIG_CXD56_GE2D),y) CHIP_CSRCS += cxd56_ge2d.c endif +ifeq ($(CONFIG_CXD56_CISIF),y) +CHIP_CSRCS += cxd56_cisif.c +endif + ifeq ($(CONFIG_CXD56_SCU),y) CHIP_CSRCS += cxd56_scu.c cxd56_scufifo.c ifeq ($(CONFIG_CXD56_ADC),y) diff --git a/arch/arm/src/cxd56xx/cxd56_cisif.c b/arch/arm/src/cxd56xx/cxd56_cisif.c new file mode 100644 index 0000000000..d7f04d11d6 --- /dev/null +++ b/arch/arm/src/cxd56xx/cxd56_cisif.c @@ -0,0 +1,910 @@ +/**************************************************************************** + * arch/arm/src/cxd56xx/cxd56_cisif.c + * + * Copyright 2018 Sony Semiconductor Solutions Corporation + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name of Sony Semiconductor Solutions Corporation nor + * the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include + +#include "up_arch.h" + +#include "cxd56_clock.h" +#include "hardware/cxd56_cisif.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* To see the interrupt timing of Vsync */ + +/* #define CISIF_INTR_TRACE */ + +/* #define CISIF_DBG_CONTI_CAP */ + +#define YUV_VSIZE_MIN (64) +#define YUV_HSIZE_MIN (96) +#define YUV_VSIZE_MAX (360) +#define YUV_HSIZE_MAX (480) + +#define JPG_INT_ALL (JPG_ERR_STATUS_INT | \ + JPG_MEM_OVF_INT | \ + JPG_FIFO_OVF_INT | \ + JPG_AXI_TRERR_INT | \ + JPG_MARKER_ERR_INT | \ + JPG_AXI_TRDN_INT) + +#define YCC_INT_ALL (YCC_MEM_OVF_INT | \ + YCC_FIFO_OVF_INT | \ + YCC_AXI_TRERR_INT | \ + YCC_MARKER_ERR_INT | \ + SIZE_UNDER_INT | \ + SIZE_OVER_INT | \ + YCC_AXI_TRDN_INT) + +/* YUV data size with frame v * h */ + +#define YUV_SIZE(v, h) (v * h * 2) + +/* Check Buffer address alignement */ + +#define CISIF_BUFADDR_ALIGNMENT (32) +#define ILLEGAL_BUFADDR_ALIGNMENT(addr) (((addr) == NULL) || \ + (((uint32_t)(addr) % \ + CISIF_BUFADDR_ALIGNMENT) != 0)) + +#ifdef CONFIG_CXD56_CISIF_DEBUG +#define ciferr _err +#define cifwarn _warn +#define cifinfo _info +#else +#define ciferr(x...) +#define cifwarn(x...) +#define cifinfo(x...) +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +enum state_e +{ + STATE_STANDBY, + STATE_READY, + STATE_CAPTURE, +}; + +typedef enum state_e state_t; + +typedef void (*intc_func_table)(uint8_t code); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static state_t g_state = STATE_STANDBY; +static uint32_t g_storage_addr = 0; + +notify_callback_t g_jpg_notify_callback_func; +notify_callback_t g_ycc_notify_callback_func; +comp_callback_t g_comp_callback_func; + +static bool g_jpgint_receive; +static bool g_errint_receive; + +#ifdef CISIF_INTR_TRACE +static uint32_t g_cisif_vint_count = 0; +static uint32_t g_cisif_vint_count_max = 0; +static uint32_t g_cisif_time_start; +static uint32_t g_cisif_time_stop; +#endif + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static void cisif_vs_int(uint8_t code); +static void cisif_ycc_axi_trdn_int(uint8_t code); +static void cisif_ycc_nstorage_int(uint8_t code); +static void cisif_jpg_axi_trdn_int(uint8_t code); +static void cisif_jpg_nstorage_int(uint8_t code); +static void cisif_ycc_err_int(uint8_t code); +static void cisif_jpg_err_int(uint8_t code); + +static void cisif_reg_write(uint16_t reg, uint32_t val); +static uint32_t cisif_reg_read(uint16_t reg); + +static int cisif_check_param(cisif_param_t *p); +static int cisif_set_yuv_param(cisif_param_t *p); +static int cisif_set_jpg_param(cisif_param_t *p); + +static int cisif_check_sarea(void *s); +static int cisif_set_yuv_sarea(void *s); +static int cisif_set_jpg_sarea(void *s); +static int cisif_set_intlev_sarea(void *s, uint32_t yuv_size); + +int cisif_intc_handler(int irq, FAR void *context, FAR void *arg); + +const intc_func_table g_intcomp_func[] = + { + cisif_vs_int, /* VS_INT */ + NULL, /* EOY_INT */ + NULL, /* SOY_INT */ + NULL, /* EOI_INT */ + NULL, /* SOI_INT */ + NULL, /* YCC_VACT_END_INT */ + NULL, /* JPG_VACT_END_INT */ + cisif_ycc_axi_trdn_int, /* YCC_AXI_TRDN_INT */ + cisif_ycc_nstorage_int, /* YCC_NSTORAGE_INT */ + NULL, /* YCC_DAREA_END_INT */ + cisif_jpg_axi_trdn_int, /* JPG_AXI_TRDN_INT */ + cisif_jpg_nstorage_int, /* JPG_NSTORAGE_INT */ + NULL, /* JPG_DAREA_END_INT */ + NULL, /* reserve */ + NULL, /* reserve */ + NULL, /* VLATCH_INT */ + cisif_ycc_err_int, /* SIZE_OVER_INT */ + cisif_ycc_err_int, /* SIZE_UNDER_INT */ + cisif_ycc_err_int, /* YCC_MARKER_ERR_INT */ + cisif_ycc_err_int, /* YCC_AXI_TRERR_INT */ + cisif_ycc_err_int, /* YCC_FIFO_OVF_INT */ + cisif_ycc_err_int, /* YCC_MEM_OVF_INT */ + NULL, /* reserve */ + NULL, /* reserve */ + cisif_jpg_err_int, /* JPG_MARKER_ERR_INT */ + cisif_jpg_err_int, /* JPG_AXI_TRERR_INT */ + cisif_jpg_err_int, /* JPG_FIFO_OVF_INT */ + cisif_jpg_err_int, /* JPG_MEM_OVF_INT */ + cisif_jpg_err_int, /* JPG_ERR_STATUS_INT */ + }; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +#ifdef CISIF_INTR_TRACE +static uint64_t cisif_get_msec_time(void) +{ + struct timespec tp; + + if (clock_gettime(CLOCK_REALTIME, &tp)) + { + return 0; + } + return (((uint64_t)tp.tv_sec) * 1000 + tp.tv_nsec / 1000000); +} + +static void cisif_trace_time_start(void) +{ + g_cisif_time_start = (uint32_t)cisif_get_msec_time(); +} + +static void cisif_trace_time_stop(char *str) +{ + g_cisif_time_stop = (uint32_t)cisif_get_msec_time(); + printf("%s:%d[ms]\n", str, (uint32_t)(g_cisif_time_stop - + g_cisif_time_start)); +} + +void cisif_intrtrace_start(int max) +{ + g_cisif_vint_count_max = max; + g_cisif_vint_count = 0; + cisif_trace_time_start(); +} +#endif + +/**************************************************************************** + * cisif_vs_int + ****************************************************************************/ + +static void cisif_vs_int(uint8_t code) +{ +#ifdef CISIF_INTR_TRACE + if (g_cisif_vint_count < g_cisif_vint_count_max) + { + cisif_trace_time_stop("cisif_vs_int"); + cisif_trace_time_start(); + g_cisif_vint_count++; + } + else + { + g_cisif_vint_count_max = 0; + } +#endif + + switch (g_state) + { + case STATE_STANDBY: + cifinfo("invalid state\n"); + break; + + case STATE_READY: + g_errint_receive = false; + break; + + case STATE_CAPTURE: + g_errint_receive = false; + break; + + default: + cifinfo("invalid state\n"); + break; + } +} + +/**************************************************************************** + * cisif_callback_for_intlev + ****************************************************************************/ + +static void cisif_callback_for_intlev(uint8_t code) +{ + uint32_t size; + uint32_t yuv_size; + + if (!g_jpgint_receive) + { + /* In either YUV or JPEG is not received, + * wait receiving. + */ + + g_jpgint_receive = true; + return; + } + + /* Read received data size */ + + yuv_size = cisif_reg_read(CISIF_YCC_DSTRG_CONT); + size = yuv_size + cisif_reg_read(CISIF_JPG_DSTRG_CONT); + + /* Notify and get next addr */ + + g_comp_callback_func(0, size, g_storage_addr); + + g_jpgint_receive = false; + + cisif_reg_write(CISIF_EXE_CMD, 1); + cisif_reg_write(CISIF_YCC_DREAD_CONT, 0); + cisif_reg_write(CISIF_JPG_DREAD_CONT, 0); + + return; +} + +/**************************************************************************** + * cisif_ycc_axi_trdn_int + ****************************************************************************/ +static void cisif_ycc_axi_trdn_int(uint8_t code) +{ + uint32_t size; + uint32_t cisif_mode; + +#ifdef CISIF_INTR_TRACE + cisif_trace_time_stop("cisif_ycc_axi_trdn_int"); +#endif + + if (g_errint_receive) + { + /* In error occured case in the same frame, ignore */ + + cisif_reg_write(CISIF_YCC_DREAD_CONT, 0); + return; + } + + cisif_mode = cisif_reg_read(CISIF_MODE); + if (cisif_mode == MODE_INTLEV_TRS_EN) + { + /* In JPEG + YUV format case */ + + cisif_callback_for_intlev(code); + } + else + { + size = cisif_reg_read(CISIF_YCC_DSTRG_CONT); + g_comp_callback_func(0, size, g_storage_addr); + cisif_reg_write(CISIF_YCC_DREAD_CONT, 0); + } +} + +/**************************************************************************** + * cisif_ycc_nstorage_int + ****************************************************************************/ + +static void cisif_ycc_nstorage_int(uint8_t code) +{ + uint32_t size; + + size = cisif_reg_read(CISIF_YCC_DSTRG_CONT); + g_ycc_notify_callback_func (0, size, g_storage_addr); + cisif_reg_write(CISIF_YCC_DREAD_CONT, size); +} + +/**************************************************************************** + * cisif_jpg_axi_trdn_int + ****************************************************************************/ + +static void cisif_jpg_axi_trdn_int(uint8_t code) +{ + uint32_t size; + uint32_t cisif_mode; + +#ifdef CISIF_INTR_TRACE + cisif_trace_time_stop("cisif_jpg_axi_trdn_int"); +#endif + + if (g_errint_receive) + { + /* In error occured case in the same frame, ignore */ + + cisif_reg_write(CISIF_JPG_DREAD_CONT, 0); + return; + } + + cisif_mode = cisif_reg_read(CISIF_MODE); + + if (cisif_mode == MODE_INTLEV_TRS_EN) + { + /* In JPEG + YUV format case */ + + cisif_callback_for_intlev(code); + } + else + { + size = cisif_reg_read(CISIF_JPG_DSTRG_CONT); + g_comp_callback_func(0, size, g_storage_addr); + cisif_reg_write(CISIF_JPG_DREAD_CONT, 0); + } +} + +/**************************************************************************** + * cisif_jpg_nstorage_int + ****************************************************************************/ + +static void cisif_jpg_nstorage_int(uint8_t code) +{ + uint32_t size; + + size = cisif_reg_read(CISIF_JPG_DSTRG_CONT); + + g_jpg_notify_callback_func(0, size, g_storage_addr); + cisif_reg_write(CISIF_JPG_DREAD_CONT, size); +} + +/**************************************************************************** + * cisif_ycc_err_int + ****************************************************************************/ + +static void cisif_ycc_err_int(uint8_t code) +{ + uint32_t size; + +#ifdef CISIF_INTR_TRACE + cisif_trace_time_stop("cisif_ycc_err_int"); +#endif + + size = cisif_reg_read(CISIF_YCC_DSTRG_CONT); + g_comp_callback_func(code, size, g_storage_addr); + cisif_reg_write(CISIF_YCC_DREAD_CONT, 0); + g_errint_receive = true; +} + +/**************************************************************************** + * cisif_jpg_err_int + ****************************************************************************/ + +static void cisif_jpg_err_int(uint8_t code) +{ + uint32_t size; + uint32_t addr; + +#ifdef CISIF_INTR_TRACE + cisif_trace_time_stop("cisif_jpg_err_int"); +#endif + + addr = g_storage_addr; + + size = cisif_reg_read(CISIF_JPG_DSTRG_CONT); + g_comp_callback_func(code, size, addr); + cisif_reg_write(CISIF_JPG_DREAD_CONT, 0); + g_errint_receive = true; +} + +/**************************************************************************** + * cisif_intc_handler + ****************************************************************************/ + +int cisif_intc_handler(int irq, FAR void *context, FAR void *arg) +{ + uint32_t value; + uint32_t enable; + uint8_t index; + + value = cisif_reg_read(CISIF_INTR_STAT); + cisif_reg_write(CISIF_INTR_CLEAR, value & ALL_CLEAR_INT); + cifinfo("int stat %08x\n", value); + + enable = cisif_reg_read(CISIF_INTR_ENABLE); + value = (value & enable); + + for (index = 0; + index < sizeof(g_intcomp_func) / sizeof(g_intcomp_func[0]); + index++) + { + if ((value & (1 << index)) != 0) + { + g_intcomp_func[index](index); + } + } + + return OK; +} + +/**************************************************************************** + * cisif_reg_write + ****************************************************************************/ + +static void cisif_reg_write(uint16_t reg, uint32_t val) +{ + putreg32(val, CXD56_CISIF_BASE + reg); +} + +/**************************************************************************** + * cisif_reg_read + ****************************************************************************/ + +static uint32_t cisif_reg_read(uint16_t reg) +{ + return getreg32(CXD56_CISIF_BASE + reg); +} + +/**************************************************************************** + * cisif_check_param + ****************************************************************************/ + +static int cisif_check_param(cisif_param_t *p) +{ + if (p == NULL) + { + return -EINVAL; + } + + if (p->comp_func == NULL) + { + return -EINVAL; + } + + switch (p->format) + { + case V4L2_PIX_FMT_UYVY: + case V4L2_PIX_FMT_JPEG: + case V4L2_PIX_FMT_JPEG_WITH_SUBIMG: + break; + + default: + return -EINVAL; + } + + if (p->format != V4L2_PIX_FMT_JPEG) + { + if (p->yuv_param.hsize < YUV_HSIZE_MIN || + p->yuv_param.hsize > YUV_HSIZE_MAX || + p->yuv_param.vsize < YUV_VSIZE_MIN || + p->yuv_param.vsize > YUV_VSIZE_MAX) + { + return -EINVAL; + } + + if (p->yuv_param.notify_func != NULL) + { + if (p->yuv_param.notify_size == 0) + { + return -EINVAL; + } + } + } + + if (p->format != V4L2_PIX_FMT_UYVY) + { + if (p->jpg_param.notify_func != NULL) + { + if (p->jpg_param.notify_size == 0) + { + return -EINVAL; + } + } + } + + return OK; +} + +/**************************************************************************** + * cisif_check_sarea + ****************************************************************************/ + +static int cisif_check_sarea(void *s) +{ + if (s == NULL) + { + return -EINVAL; + } + + cisif_sarea_t *ss = (cisif_sarea_t *)s; + if (ILLEGAL_BUFADDR_ALIGNMENT(ss->strg_addr) || + ss->strg_size == 0) + { + return -EINVAL; + } + + return OK; +} + +/**************************************************************************** + * cisif_set_yuvparam + ****************************************************************************/ + +static int cisif_set_yuv_param(cisif_param_t *p) +{ + uint32_t act_size = 0; + + act_size = (p->yuv_param.vsize & 0x1ff) << 16; + act_size |= p->yuv_param.hsize & 0x1ff; + + cisif_reg_write(CISIF_ACT_SIZE, act_size); + cisif_reg_write(CISIF_CIS_SIZE, act_size); + + /* must align 32 bytes */ + + cisif_reg_write(CISIF_YCC_NSTRG_SIZE, (p->yuv_param.notify_size + & 0xffffffe0)); + + g_ycc_notify_callback_func = p->yuv_param.notify_func; + + return OK; +} + +/**************************************************************************** + * cisif_set_yuvsarea + ****************************************************************************/ + +static int cisif_set_yuv_sarea(void *s) +{ + cisif_sarea_t *ss = (cisif_sarea_t *)s; + + /* must align 32 bytes */ + + cisif_reg_write(CISIF_YCC_DAREA_SIZE, (ss->strg_size & 0xffffffe0)); + cisif_reg_write(CISIF_YCC_START_ADDR, (uint32_t)ss->strg_addr); + + return OK; +} + +/**************************************************************************** + * cisif_set_jpg_param + ****************************************************************************/ + +static int cisif_set_jpg_param(cisif_param_t *p) +{ + /* must align 32 bytes */ + + cisif_reg_write(CISIF_JPG_NSTRG_SIZE, (p->jpg_param.notify_size + & 0xffffffe0)); + + g_jpg_notify_callback_func = p->jpg_param.notify_func; + + return OK; +} + +/**************************************************************************** + * cisif_set_jpg_sarea + ****************************************************************************/ + +static int cisif_set_jpg_sarea(void *s) +{ + cisif_sarea_t *ss = (cisif_sarea_t *)s; + + /* must align 32 bytes */ + + cisif_reg_write(CISIF_JPG_DAREA_SIZE, (ss->strg_size & 0xffffffe0)); + cisif_reg_write(CISIF_JPG_START_ADDR, (uint32_t)ss->strg_addr); + + return OK; +} + +/**************************************************************************** + * cisif_set_jpg_sarea + ****************************************************************************/ + +static int cisif_set_intlev_sarea(void *s, uint32_t yuv_size) +{ + cisif_sarea_t *sarea = (cisif_sarea_t *)s; + cisif_sarea_t sarea_int; + + if (sarea->strg_size < yuv_size) + { + return -EINVAL; + } + + /* Set for YUV */ + + sarea_int.strg_addr = sarea->strg_addr; + sarea_int.strg_size = yuv_size; + cisif_set_yuv_sarea(&sarea_int); + + /* Set for JPEG */ + + sarea_int.strg_addr = sarea->strg_addr + yuv_size; + sarea_int.strg_size = sarea->strg_size - yuv_size; + + cisif_set_jpg_sarea(&sarea_int); + + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * cxd56_cisifinit + ****************************************************************************/ + +int cxd56_cisifinit(void) +{ + if (g_state != STATE_STANDBY) + { + return -EPERM; + } + + /* enable CISIF clock */ + + cxd56_img_cisif_clock_enable(); + + /* disable CISIF interrupt */ + + cisif_reg_write(CISIF_INTR_DISABLE, ALL_CLEAR_INT); + cisif_reg_write(CISIF_INTR_CLEAR, ALL_CLEAR_INT); + + /* attach interrupt handler */ + + irq_attach(CXD56_IRQ_CISIF, cisif_intc_handler, NULL); + + /* enable CISIF irq */ + + up_enable_irq(CXD56_IRQ_CISIF); + +#ifdef CISIF_INTR_TRACE + cisif_reg_write(CISIF_INTR_ENABLE, VS_INT); +#endif + + g_state = STATE_READY; + + return OK; +} + +/**************************************************************************** + * cxd56_cisiffinalize + ****************************************************************************/ + +int cxd56_cisiffinalize(void) +{ + if (g_state != STATE_READY) + { + return -EPERM; + } + + /* disable CISIF irq */ + + up_disable_irq(CXD56_IRQ_CISIF); + + /* detach interrupt handler */ + + irq_detach(CXD56_IRQ_CISIF); + + /* disable CISIF interrupt */ + + cisif_reg_write(CISIF_INTR_DISABLE, ALL_CLEAR_INT); + cisif_reg_write(CISIF_INTR_CLEAR, ALL_CLEAR_INT); + + /* disable CISIF clock */ + + cxd56_img_cisif_clock_disable(); + + g_state = STATE_STANDBY; + + return OK; +} + +/**************************************************************************** + * cxd56_cisifstartcapturing + ****************************************************************************/ + +int cxd56_cisifstartcapture( + cisif_param_t *param, + cisif_sarea_t *sarea) +{ + uint32_t cisif_mode; + uint32_t interrupts = VS_INT; + int ret; + + if (g_state != STATE_READY) + { + return -EPERM; + } + + ret = cisif_check_param(param); + if (ret != OK) + { + return ret; + } + + cisif_reg_write(CISIF_INTR_DISABLE, ALL_CLEAR_INT); + + ret = cisif_check_sarea(sarea); + if (ret != OK) + { + return ret; + } + + switch (param->format) + { + case V4L2_PIX_FMT_UYVY: + cisif_set_yuv_param(param); + cisif_set_yuv_sarea(sarea); + + cisif_mode = MODE_YUV_TRS_EN; + interrupts |= YCC_INT_ALL; + break; + + case V4L2_PIX_FMT_JPEG: + cisif_set_jpg_param(param); + cisif_set_jpg_sarea(sarea); + + cisif_mode = MODE_JPG_TRS_EN; + interrupts |= JPG_INT_ALL; + break; + + case V4L2_PIX_FMT_JPEG_WITH_SUBIMG: + cisif_set_yuv_param(param); + cisif_set_jpg_param(param); + + cisif_set_intlev_sarea(sarea, + YUV_SIZE(param->yuv_param.vsize, + param->yuv_param.hsize)); + + cisif_mode = MODE_INTLEV_TRS_EN; + interrupts |= YCC_INT_ALL | JPG_INT_ALL; + g_jpgint_receive = false; + break; + + default: + return -EINVAL; + } + + g_comp_callback_func = param->comp_func; + g_storage_addr = (uint32_t)sarea->strg_addr; + + g_state = STATE_CAPTURE; + + if (g_ycc_notify_callback_func != NULL) + { + interrupts |= YCC_NSTORAGE_INT; + } + + if (g_jpg_notify_callback_func != NULL) + { + interrupts |= JPG_NSTORAGE_INT; + } + + cisif_reg_write(CISIF_MODE, cisif_mode); + cisif_reg_write(CISIF_INTR_CLEAR, interrupts); + cisif_reg_write(CISIF_INTR_ENABLE, interrupts); + + cisif_reg_write(CISIF_DIN_ENABLE, 1); + cisif_reg_write(CISIF_EXE_CMD, 1); + + return OK; +} + +int cxd56_cisifstopcapture(void) +{ + g_state = STATE_READY; + cisif_reg_write(CISIF_DIN_ENABLE, 0); + cisif_reg_write(CISIF_INTR_DISABLE, ALL_CLEAR_INT); + cisif_reg_write(CISIF_EXE_CMD, 1); + + return OK; +} + +int cxd56_cisifsetdmabuf(cisif_sarea_t *sarea) +{ + int ret; + uint32_t cisif_mode; + uint32_t yuv_regsize; + uint32_t yuv_hsize; + uint32_t yuv_vsize; + + ret = cisif_check_sarea(sarea); + if (ret != OK) + { + return ret; + } + + cisif_mode = cisif_reg_read(CISIF_MODE); + + switch (cisif_mode) + { + case MODE_YUV_TRS_EN: + ret = cisif_set_yuv_sarea(sarea); + break; + + case MODE_JPG_TRS_EN: + ret = cisif_set_jpg_sarea(sarea); + break; + + default: /* MODE_INTLEV_TRS_EN */ + + /* Get YUV frame size information */ + + yuv_regsize = cisif_reg_read(CISIF_ACT_SIZE); + yuv_vsize = (yuv_regsize >> 16) & 0x1ff; + yuv_hsize = yuv_regsize & 0x01ff; + + ret = cisif_set_intlev_sarea(sarea, + YUV_SIZE(yuv_vsize, yuv_hsize)); + break; + } + + if (ret != OK) + { + return ret; + } + + cisif_reg_write(CISIF_EXE_CMD, 1); + g_storage_addr = (uint32_t)sarea->strg_addr; + + return ret; +} diff --git a/arch/arm/src/cxd56xx/hardware/cxd56_cisif.h b/arch/arm/src/cxd56xx/hardware/cxd56_cisif.h new file mode 100644 index 0000000000..c8273a3265 --- /dev/null +++ b/arch/arm/src/cxd56xx/hardware/cxd56_cisif.h @@ -0,0 +1,113 @@ +/**************************************************************************** + * arch/arm/src/cxd56xx/hardware/cxd56_cisif.h + * + * Copyright 2018 Sony Semiconductor Solutions Corporation + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name of Sony Semiconductor Solutions Corporation nor + * the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_CXD56XX_CHIP__CXD56_CISIF_H +#define __ARCH_ARM_SRC_CXD56XX_CHIP__CXD56_CISIF_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include "hardware/cxd5602_memorymap.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Register offsets *********************************************************/ + +/* Common Register Offsets */ + +#define CISIF_INTR_STAT (0x0000) +#define CISIF_INTR_ENABLE (0x0004) +#define CISIF_INTR_DISABLE (0x0008) +#define CISIF_INTR_CLEAR (0x000C) +#define CISIF_DIN_ENABLE (0x0020) +#define CISIF_CIS_SIZE (0x0024) +#define CISIF_ACT_POS (0x0028) +#define CISIF_ACT_SIZE (0x002C) +#define CISIF_MODE (0x0030) +#define CISIF_ILCODE (0x0034) +#define CISIF_FORMAT (0x0038) +#define CISIF_POL (0x003C) +#define CISIF_YCC_START_ADDR (0x0040) +#define CISIF_YCC_DAREA_SIZE (0x0044) +#define CISIF_YCC_NSTRG_SIZE (0x0048) +#define CISIF_YCC_DSTRG_CONT (0x004C) +#define CISIF_YCC_DREAD_CONT (0x0050) +#define CISIF_JPG_START_ADDR (0x0060) +#define CISIF_JPG_DAREA_SIZE (0x0064) +#define CISIF_JPG_NSTRG_SIZE (0x0068) +#define CISIF_JPG_DSTRG_CONT (0x006C) +#define CISIF_JPG_DREAD_CONT (0x0070) +#define CISIF_EXE_CMD (0x0080) +#define CISIF_NSTANDBY (0x0090) +#define CISIF_NRST (0x0094) +#define CISIF_TEST_INT (0x00F0) + +#define JPG_ERR_STATUS_INT (1<<28) +#define JPG_MEM_OVF_INT (1<<27) +#define JPG_FIFO_OVF_INT (1<<26) +#define JPG_AXI_TRERR_INT (1<<25) +#define JPG_MARKER_ERR_INT (1<<24) +#define YCC_MEM_OVF_INT (1<<21) +#define YCC_FIFO_OVF_INT (1<<20) +#define YCC_AXI_TRERR_INT (1<<19) +#define YCC_MARKER_ERR_INT (1<<18) +#define SIZE_UNDER_INT (1<<17) +#define SIZE_OVER_INT (1<<16) +#define VLATCH_INT (1<<15) +#define JPG_DAREA_END_INT (1<<12) +#define JPG_NSTORAGE_INT (1<<11) +#define JPG_AXI_TRDN_INT (1<<10) +#define YCC_DAREA_END_INT (1<<9) +#define YCC_NSTORAGE_INT (1<<8) +#define YCC_AXI_TRDN_INT (1<<7) +#define JPG_VACT_END_INT (1<<6) +#define YCC_VACT_END_INT (1<<5) +#define SOI_INT (1<<4) +#define EOI_INT (1<<3) +#define SOY_INT (1<<2) +#define EOY_INT (1<<1) +#define VS_INT (1<<0) + +#define ALL_CLEAR_INT (0xFFFFFFFF) +#define ALL_DISABLE_INT (0x01ffffff) + +#define MODE_YUV_TRS_EN (0x00000004) +#define MODE_JPG_TRS_EN (0x00000109) +#define MODE_INTLEV_TRS_EN (0x0000010E) + +#endif /* __ARCH_ARM_SRC_CXD56XX_CHIP__CXD56_CISIF_H */ diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index c5becf6480..884e5c948e 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -36,6 +36,11 @@ config VIDEO_MAX7456 Support for the Maxim 7456 monochrome on-screen display multiplexer. +config VIDEO_ISX012 + bool "ISX012 Image sensor" + default n + select I2C + config VIDEO_OV2640 bool "OV2640 camera chip" default n diff --git a/drivers/video/Make.defs b/drivers/video/Make.defs index 82ac7ee049..2e7744b8cb 100644 --- a/drivers/video/Make.defs +++ b/drivers/video/Make.defs @@ -49,6 +49,10 @@ endif ifeq ($(CONFIG_I2C),y) +ifeq ($(CONFIG_VIDEO_ISX012),y) +CSRCS += isx012.c +endif + ifeq ($(CONFIG_VIDEO_OV2640),y) CSRCS += ov2640.c endif diff --git a/drivers/video/isx012.c b/drivers/video/isx012.c new file mode 100644 index 0000000000..981bc8988a --- /dev/null +++ b/drivers/video/isx012.c @@ -0,0 +1,3684 @@ +/**************************************************************************** + * drivers/video/isx012.c + * + * Copyright 2018 Sony Semiconductor Solutions Corporation + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name of Sony Semiconductor Solutions Corporation nor + * the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* The following macro is enabled because + * it is to make stable startup. (other case) + */ + +/* #define ISX012_NOT_USE_NSTBY */ + +/* The following macro is disabled because it is to see detailed control. */ + +/* #define ISX012_CHECK_IN_DETAIL */ + +/* Skip invalid frame because it occurs first due to the spec of isx012. */ + +#define ISX012_FRAME_SKIP_EN + +#define OUT_HSIZE_QVGA (320) +#define OUT_VSIZE_QVGA (240) +#define OUT_HSIZE_VGA (640) +#define OUT_VSIZE_VGA (480) +#define OUT_HSIZE_HD (1280) +#define OUT_VSIZE_HD (720) +#define OUT_HSIZE_QUADVGA (1280) +#define OUT_VSIZE_QUADVGA (960) +#define OUT_HSIZE_FULLHD (1920) +#define OUT_VSIZE_FULLHD (1080) +#define OUT_HSIZE_3M (2048) +#define OUT_VSIZE_3M (1536) +#define OUT_HSIZE_5M (2560) +#define OUT_VSIZE_5M (1920) + +#define OUT_YUV_VSIZE_MIN (64) +#define OUT_YUV_HSIZE_MIN (96) +#define OUT_JPG_VSIZE_MIN (64) +#define OUT_JPG_HSIZE_MIN (96) +#define OUT_YUV_15FPS_VSIZE_MAX (360) +#define OUT_YUV_15FPS_HSIZE_MAX (480) +#define OUT_YUV_30FPS_VSIZE_MAX (360) +#define OUT_YUV_30FPS_HSIZE_MAX (480) +#define OUT_YUV_60FPS_VSIZE_MAX (360) +#define OUT_YUV_60FPS_HSIZE_MAX (480) +#define OUT_YUV_120FPS_VSIZE_MAX (240) +#define OUT_YUV_120FPS_HSIZE_MAX (320) +#define OUT_JPG_15FPS_VSIZE_MAX (1944) +#define OUT_JPG_15FPS_HSIZE_MAX (2592) +#define OUT_JPG_30FPS_VSIZE_MAX (960) +#define OUT_JPG_30FPS_HSIZE_MAX (1280) +#define OUT_JPG_60FPS_VSIZE_MAX (480) +#define OUT_JPG_60FPS_HSIZE_MAX (640) +#define OUT_JPG_120FPS_VSIZE_MAX (240) +#define OUT_JPG_120FPS_HSIZE_MAX (320) + +#define OUT_YUVINT_30FPS_VSIZE_MAX (240) +#define OUT_YUVINT_30FPS_HSIZE_MAX (400) +#define OUT_JPGINT_30FPS_VSIZE_MAX (960) +#define OUT_JPGINT_30FPS_HSIZE_MAX (1280) +#define OUT_JPGINT_15FPS_VSIZE_MAX (1224) +#define OUT_JPGINT_15FPS_HSIZE_MAX (1632) + +#define VINT_TIMEOUT (400) /* ms */ +#define VINT_WAIT_TIME (5) /* ms */ +#define VINT_DELAY_TIME (0) /* ms */ +#define CAMERA_MODE_TIMEOUT (800) /* ms */ +#define CAMERA_MODE_WAIT_TIME (10) /* ms */ +#define CAMERA_MODE_DELAY_TIME (0) /* ms */ +#define DEVICE_STATE_TIMEOUT (100) /* ms */ +#define DEVICE_STATE_WAIT_TIME (1) /* ms */ +#define DEVICE_STATE_DELAY_TIME (2) /* ms */ + +#define I2CFREQ_STANDARD (100000) /* Standard mode : 100kHz */ +#define I2CFREQ_FAST (400000) /* Fast mode : 400kHz */ + +#define ISX012_SIZE_STEP (2) + +#define CXC_RGB_DATA_UNIT_NUM (27) +#define CXC_RGB_DATA_UNIT_SIZE (7) +#define CXC_GRB_DATA_UNIT_NUM (27) +#define CXC_GRB_DATA_UNIT_SIZE (7) +#define SHD_RGB_DATA_UNIT_NUM (27) +#define SHD_RGB_DATA_UNIT_SIZE (11) +#define SHD_GRB_DATA_UNIT_NUM (27) +#define SHD_GRB_DATA_UNIT_SIZE (11) +#define SHD_R1_DATA_UNIT_NUM (14) +#define SHD_R1_DATA_UNIT_SIZE (11) +#define SHD_R2_DATA_UNIT_NUM (14) +#define SHD_R2_DATA_UNIT_SIZE (11) +#define SHD_B2_DATA_UNIT_NUM (14) +#define SHD_B2_DATA_UNIT_SIZE (11) + +#ifdef CONFIG_DEBUG_IMAGER_ERROR +#define imagererr(format, ...) _err(format, ##__VA_ARGS__) +#else +#define imagererr(x...) +#endif + +#ifdef CONFIG_DEBUG_IMAGER_WARN +#define imagerwarn(format, ...) _warn(format, ##__VA_ARGS__) +#else +#define imagerwarn(x...) +#endif + +#ifdef CONFIG_DEBUG_IMAGER_INFO +#define imagerinfo(format, ...) _info(format, ##__VA_ARGS__) +#else +#define imagerinfo(x...) +#endif + +#define CHECK_RANGE(value,min,max,step) do { \ + if ((value < min) || \ + (value > max) || \ + ((value - min) % step != 0)) \ + { \ + return -EINVAL;\ + } \ + } while (0) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +enum isx012_state_e { + STATE_ISX012_PRESLEEP, + STATE_ISX012_SLEEP, + STATE_ISX012_ACTIVE, + STATE_ISX012_POWEROFF, +}; + +typedef enum isx012_state_e isx012_state_t; + +struct isx012_reg_s { + uint16_t regaddr; + uint16_t regval; + uint8_t regsize; +}; + +typedef struct isx012_reg_s isx012_reg_t; + +struct isx012_conv_v4l2_to_regval_s +{ + int32_t v4l2; + int16_t regval; +}; + +typedef struct isx012_conv_v4l2_to_regval_s isx012_conv_v4l2_to_regval_t; + +struct isx012_modeparam_s { + uint8_t fps; /* use ISX012 register setting value */ + uint32_t format; /* use V4L2 definition */ + uint16_t hsize; + uint16_t vsize; + uint16_t int_hsize; + uint16_t int_vsize; +}; + +typedef struct isx012_modeparam_s isx012_modeparam_t; + +struct isx012_param_s +{ + isx012_modeparam_t monitor; /* Parameter for monitor mode */ + isx012_modeparam_t capture; /* Parameter for capture mode */ +}; + +typedef struct isx012_param_s isx012_param_t; + +struct isx012_dev_s +{ + FAR struct i2c_master_s *i2c; /* I2C interface */ + uint8_t i2c_addr; /* I2C address */ + int i2c_freq; /* Frequency */ + isx012_state_t state; /* ISX012 status */ + bool dma_state; /* true means "in DMA" */ + uint8_t mode; /* ISX012 mode */ + isx012_param_t param; /* ISX012 paramerters */ + void *video_priv; /* pointer to video private data */ +}; + +typedef struct isx012_dev_s isx012_dev_t; + +#define ARRAY_NENTRIES(a) (sizeof(a)/sizeof(isx012_reg_t)) + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* register operations */ + +static uint16_t isx012_getreg(isx012_dev_t *priv, + uint16_t regaddr, uint16_t regsize); +static int isx012_putreg(isx012_dev_t *priv, uint16_t regaddr, + uint16_t regval, uint16_t regsize); +static int isx012_putreglist(isx012_dev_t *priv, + FAR const isx012_reg_t *reglist, size_t nentries); +#ifdef ISX012_CHECK_IN_DETAIL +static int isx012_putregs(isx012_dev_t *priv, uint16_t regaddr, + uint8_t *regvals, uint8_t regsize); +static int isx012_chipid(FAR struct i2c_master_s *i2c); +#endif + +static int isx012_chk_int_state(isx012_dev_t *priv, + uint8_t sts, uint32_t delay_time, + uint32_t wait_time, uint32_t timeout); +static int isx012_set_mode_param(isx012_dev_t *priv, + enum v4l2_buf_type type, + isx012_modeparam_t *param); +static int isx012_change_camera_mode(isx012_dev_t *priv, uint8_t mode); +static int isx012_change_device_state(isx012_dev_t *priv, + isx012_state_t state); +static int isx012_set_supported_frminterval(uint32_t fps_index, + FAR struct v4l2_fract *interval); +static int8_t isx012_get_maximum_fps(FAR struct v4l2_frmivalenum *frmival); +static int isx012_set_shd(FAR isx012_dev_t *priv); + +/* video driver HAL infterface */ + +static int isx012_open(FAR void *video_private); +static int isx012_close(void); +static int isx012_do_halfpush(bool enable); +static int isx012_set_buftype(enum v4l2_buf_type type); +static int isx012_set_buf(uint32_t bufaddr, uint32_t bufsize); +static int isx012_cancel_dma(void); +static int isx012_check_fmt(enum v4l2_buf_type buf_type, + uint32_t pixel_format); +static int isx012_get_range_of_fmt(FAR struct v4l2_fmtdesc *format); +static int isx012_get_range_of_framesize(FAR struct v4l2_frmsizeenum + *frmsize); +static int isx012_try_format(FAR struct v4l2_format *format); +static int isx012_set_format(FAR struct v4l2_format *format); +static int isx012_get_range_of_frameinterval(FAR struct v4l2_frmivalenum + *frmival); +static int isx012_set_frameinterval(FAR struct v4l2_streamparm *parm); +static int isx012_get_range_of_ctrlval(FAR struct v4l2_query_ext_ctrl + *range); +static int isx012_get_menu_of_ctrlval(FAR struct v4l2_querymenu *menu); +static int isx012_get_ctrlval(uint16_t ctrl_class, + FAR struct v4l2_ext_control *control); +static int isx012_set_ctrlval(uint16_t ctrl_class, + FAR struct v4l2_ext_control *control); +static int isx012_refresh(void); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static isx012_dev_t g_isx012_private; + +#ifndef ISX012_NOT_USE_NSTBY +static const isx012_reg_t g_isx012_presleep[] = { + {PLL_CKSEL, 0x00, 0x01}, /* PLL_CKSEL */ + {SRCCK_DIV, 0x00, 0x01}, /* SRCCK_DIV */ + {INCK_SET, 0x17, 0x01}, /* INCK_SET */ +}; +#define ISX012_PRESLEEP_NENTRIES ARRAY_NENTRIES(g_isx012_presleep) +#endif + +static const isx012_reg_t g_isx012_def_init[] = { +#ifdef ISX012_NOT_USE_NSTBY + {PLL_CKSEL, 0x00, 0x01}, + {SRCCK_DIV, 0x00, 0x01}, +#endif + {DRIVABILITY, 0xaa, 0x01}, + {VIFCONFIG, 0x0200, 0x02}, + {YUVCONFIG_TN, 0xff0a, 0x02}, + {ILCODELEN, 0x00, 0x01}, + {AFMODE_MONI, 0x01, 0x01}, + {YUVCONFIG, 0xff6a, 0x02}, + {VIF_REC601_Y, 0x10fe, 0x02}, + {VIF_REC601_C, 0x10f0, 0x02}, + {HSENS_MODE_SEL, 0x11, 0x01}, + {VIF_CLKCONFIG1, 0x30, 0x01}, + {VIF_CLKCONFIG2, 0x30, 0x01}, + {VIF_CLKCONFIG3, 0x30, 0x01}, + {VIF_CLKCONFIG4, 0x30, 0x01}, + {VIF_CLKCONFIG5, 0x30, 0x01}, + {VIF_CLKCONFIG6, 0x30, 0x01}, + {VIF_CLKCONFIG7, 0x30, 0x01}, + {VIF_CLKCONFIG8, 0x30, 0x01}, + {VIF_CLKCONFIG9, 0x30, 0x01}, + {VIF_CLKCONFIG10, 0x30, 0x01}, + {VIF_CLKCONFIG11, 0x30, 0x01}, + {VIF_CLKCONFIG12, 0x30, 0x01}, + {VIF_CLKCONFIG13, 0x11, 0x01}, + {VIF_CLKCONFIG14, 0x11, 0x01}, + {VIF_CLKCONFIG15, 0x11, 0x01}, + {VIF_CLKCONFIG16, 0x11, 0x01}, +#ifdef ISX012_NOT_USE_NSTBY + {INCK_SET, 0x17, 0x01}, /* INCK_SET */ +#endif + {FRM_FIX_SN1_2, 0xff, 0x01}, /* Fix framerate */ + {FAST_MODECHG_EN, 0x01, 0x01}, + {FAST_SHT_MODE_SEL, 0x01, 0x01}, + {CAP_HALF_AE_CTRL, 0x07, 0x01}, /* HAFREL=HIGHSPEED, CAP=Auto */ + {HALF_AWB_CTRL, 0x01, 0x01}, + {AESPEED_FAST, 0x0f, 0x01}, + {FASTMOVE_TIMEOUT, 0x2d, 0x01}, + {YGAMMA_MODE, 0x01, 0x01}, + {INT_QLTY2, 0x50, 0x01}, +}; +#define ISX012_RESET_NENTRIES ARRAY_NENTRIES(g_isx012_def_init) + +static const uint8_t g_isx012_cxc_rgb_data[CXC_RGB_DATA_UNIT_NUM][CXC_RGB_DATA_UNIT_SIZE] = +{ + {0x01, 0x43, 0xc0, 0xf0, 0x4f, 0xfc, 0x13}, /* CXC_RGB_UNIT0 */ + {0x80, 0x44, 0x20, 0x21, 0x48, 0x04, 0x0e}, /* CXC_RGB_UNIT1 */ + {0x81, 0x43, 0xc0, 0x10, 0x30, 0xfc, 0x13}, /* CXC_RGB_UNIT2 */ + {0xff, 0x04, 0x20, 0x11, 0x48, 0x08, 0x12}, /* CXC_RGB_UNIT3 */ + {0x81, 0x43, 0xe0, 0x20, 0x48, 0x08, 0x12}, /* CXC_RGB_UNIT4 */ + {0x80, 0x03, 0xe0, 0x00, 0x38, 0x04, 0x10}, /* CXC_RGB_UNIT5 */ + {0x01, 0x84, 0x20, 0x21, 0x48, 0x04, 0x10}, /* CXC_RGB_UNIT6 */ + {0x01, 0x04, 0xc0, 0x10, 0x20, 0x00, 0x08}, /* CXC_RGB_UNIT7 */ + {0x81, 0x82, 0xc0, 0x20, 0x38, 0x08, 0x0e}, /* CXC_RGB_UNIT8 */ + {0x01, 0x43, 0xc0, 0x10, 0x20, 0x04, 0x04}, /* CXC_RGB_UNIT9 */ + {0x01, 0x41, 0x40, 0x10, 0x20, 0x08, 0x0a}, /* CXC_RGB_UNIT10 */ + {0x82, 0x82, 0x80, 0x20, 0x20, 0x04, 0x04}, /* CXC_RGB_UNIT11 */ + {0x82, 0x80, 0x20, 0x20, 0x08, 0x04, 0x06}, /* CXC_RGB_UNIT12 */ + {0x81, 0x42, 0xa0, 0x10, 0x20, 0x04, 0x08}, /* CXC_RGB_UNIT13 */ + {0x81, 0x80, 0x00, 0x00, 0x00, 0x04, 0x00}, /* CXC_RGB_UNIT14 */ + {0x01, 0x41, 0x80, 0x10, 0x20, 0x00, 0x08}, /* CXC_RGB_UNIT15 */ + {0x00, 0x42, 0x20, 0x20, 0x08, 0x08, 0x00}, /* CXC_RGB_UNIT16 */ + {0x82, 0xc0, 0x40, 0x20, 0x20, 0x08, 0x08}, /* CXC_RGB_UNIT17 */ + {0x80, 0x02, 0xa0, 0x10, 0x20, 0x08, 0x04}, /* CXC_RGB_UNIT18 */ + {0x02, 0x81, 0x60, 0x30, 0x20, 0x08, 0x0a}, /* CXC_RGB_UNIT19 */ + {0x82, 0x42, 0xc0, 0x10, 0x30, 0x04, 0x0a}, /* CXC_RGB_UNIT20 */ + {0x03, 0xc3, 0xa0, 0x40, 0x28, 0x0c, 0x0a}, /* CXC_RGB_UNIT21 */ + {0x03, 0xc3, 0xc0, 0x20, 0x20, 0x08, 0x08}, /* CXC_RGB_UNIT22 */ + {0x82, 0xc2, 0xc0, 0x30, 0x40, 0x10, 0x0e}, /* CXC_RGB_UNIT23 */ + {0x84, 0x03, 0xa1, 0x40, 0x28, 0x08, 0x08}, /* CXC_RGB_UNIT24 */ + {0x02, 0x82, 0xa0, 0x30, 0x30, 0x0c, 0x10}, /* CXC_RGB_UNIT25 */ + {0x84, 0x03, 0xe1, 0x40, 0x28, 0x10, 0x0a}, /* CXC_RGB_UNIT26 */ +}; + +static const uint8_t g_isx012_cxc_grb_data[CXC_GRB_DATA_UNIT_NUM][CXC_GRB_DATA_UNIT_SIZE] = +{ + {0x00, 0x3d, 0x40, 0x0f, 0xc0, 0x03, 0xf2}, /* CXC_GRB_UNIT0 */ + {0x80, 0x7c, 0x80, 0x1f, 0xd8, 0x03, 0xf0}, /* CXC_GRB_UNIT1 */ + {0x00, 0x3c, 0x40, 0x0f, 0xd0, 0x03, 0xf0}, /* CXC_GRB_UNIT2 */ + {0x80, 0x3c, 0x20, 0x1f, 0xe0, 0x07, 0xf6}, /* CXC_GRB_UNIT3 */ + {0x00, 0x3c, 0x00, 0x1f, 0xd0, 0x07, 0xf4}, /* CXC_GRB_UNIT4 */ + {0x00, 0x3d, 0x40, 0x0f, 0xc8, 0x03, 0xf2}, /* CXC_GRB_UNIT5 */ + {0x80, 0xfc, 0x5f, 0xff, 0xd7, 0x07, 0xf4}, /* CXC_GRB_UNIT6 */ + {0x01, 0x7d, 0x40, 0x0f, 0xd0, 0xff, 0xf3}, /* CXC_GRB_UNIT7 */ + {0x7f, 0xfd, 0x3f, 0x0f, 0xc8, 0x03, 0xf2}, /* CXC_GRB_UNIT8 */ + {0x81, 0x7c, 0x20, 0x0f, 0xd0, 0xff, 0xf7}, /* CXC_GRB_UNIT9 */ + {0x7e, 0xfe, 0x5f, 0x0f, 0xd8, 0x03, 0xf6}, /* CXC_GRB_UNIT10 */ + {0x80, 0xbd, 0xa0, 0x2f, 0xe8, 0x07, 0xfa}, /* CXC_GRB_UNIT11 */ + {0x80, 0xfe, 0xbf, 0x0f, 0xe8, 0xff, 0xf9}, /* CXC_GRB_UNIT12 */ + {0x00, 0x3e, 0x80, 0x3f, 0xe8, 0x0f, 0xfa}, /* CXC_GRB_UNIT13 */ + {0x02, 0x40, 0xe0, 0x0f, 0xf8, 0x03, 0xfe}, /* CXC_GRB_UNIT14 */ + {0x80, 0x7f, 0xe0, 0x1f, 0xf8, 0x17, 0xfe}, /* CXC_GRB_UNIT15 */ + {0x85, 0xff, 0xe0, 0x2f, 0x08, 0x04, 0x04}, /* CXC_GRB_UNIT16 */ + {0x81, 0x40, 0x20, 0x20, 0x00, 0x08, 0x00}, /* CXC_GRB_UNIT17 */ + {0x84, 0x00, 0x21, 0x30, 0x10, 0x0c, 0x06}, /* CXC_GRB_UNIT18 */ + {0x02, 0x82, 0x40, 0x20, 0x10, 0x0c, 0x02}, /* CXC_GRB_UNIT19 */ + {0x83, 0x00, 0x21, 0x40, 0x08, 0x10, 0x06}, /* CXC_GRB_UNIT20 */ + {0x83, 0x82, 0xa0, 0x20, 0x20, 0x08, 0x08}, /* CXC_GRB_UNIT21 */ + {0x02, 0x81, 0x40, 0x30, 0x18, 0x0c, 0x06}, /* CXC_GRB_UNIT22 */ + {0x03, 0x81, 0x80, 0x10, 0x20, 0x04, 0x08}, /* CXC_GRB_UNIT23 */ + {0x82, 0x82, 0x80, 0x20, 0x20, 0x0c, 0x06}, /* CXC_GRB_UNIT24 */ + {0x83, 0xc1, 0x40, 0x20, 0x20, 0x04, 0x08}, /* CXC_GRB_UNIT25 */ + {0x01, 0x82, 0xa0, 0x20, 0x20, 0x08, 0x08}, /* CXC_GRB_UNIT26 */ +}; + +static const uint8_t g_isx012_shd_rgb_data[SHD_RGB_DATA_UNIT_NUM][SHD_RGB_DATA_UNIT_SIZE] = +{ + {0xf1, 0x59, 0x52, 0x7b, 0x98, 0xc4, 0x9d, 0x23, 0x29, 0x87, 0x46}, /* SHD_RGB_UNIT0 */ + {0xc6, 0x81, 0xd1, 0x70, 0x56, 0xe4, 0x9c, 0x1b, 0x6d, 0x07, 0x48}, /* SHD_RGB_UNIT1 */ + {0xdd, 0xf1, 0x51, 0x7d, 0xa8, 0xb4, 0x1e, 0x25, 0x49, 0xc7, 0x46}, /* SHD_RGB_UNIT2 */ + {0xbd, 0xf1, 0x50, 0x6d, 0x2a, 0x44, 0x1b, 0x0a, 0x01, 0x87, 0x44}, /* SHD_RGB_UNIT3 */ + {0xd0, 0xa9, 0x51, 0x77, 0x84, 0xd4, 0x9d, 0x1f, 0x2d, 0xc7, 0x44}, /* SHD_RGB_UNIT4 */ + {0xa8, 0xa9, 0xcf, 0x62, 0x98, 0xa3, 0x17, 0xdb, 0xfc, 0x05, 0x38}, /* SHD_RGB_UNIT5 */ + {0x90, 0xe1, 0x8e, 0x6a, 0x08, 0xc4, 0x9b, 0x0e, 0x11, 0x07, 0x43}, /* SHD_RGB_UNIT6 */ + {0xac, 0xa9, 0x4f, 0x5d, 0x4e, 0x13, 0x15, 0xb9, 0xf8, 0x44, 0x2b}, /* SHD_RGB_UNIT7 */ + {0x44, 0x21, 0xcb, 0x56, 0x0e, 0x63, 0x98, 0xe3, 0x78, 0x86, 0x3d}, /* SHD_RGB_UNIT8 */ + {0xab, 0x81, 0x4f, 0x62, 0x7c, 0xc3, 0x94, 0xb4, 0x98, 0x84, 0x26}, /* SHD_RGB_UNIT9 */ + {0x14, 0xe9, 0x48, 0x46, 0x4a, 0x12, 0x93, 0xa4, 0x84, 0xc5, 0x31}, /* SHD_RGB_UNIT10 */ + {0x81, 0xe9, 0x4d, 0x67, 0xac, 0x73, 0x17, 0xd0, 0xdc, 0x24, 0x29}, /* SHD_RGB_UNIT11 */ + {0x12, 0xb9, 0x08, 0x40, 0x02, 0x52, 0x10, 0x84, 0x6c, 0x64, 0x25}, /* SHD_RGB_UNIT12 */ + {0x4c, 0x91, 0xcb, 0x5b, 0x4c, 0xe3, 0x19, 0xec, 0xdc, 0x05, 0x34}, /* SHD_RGB_UNIT13 */ + {0x37, 0x39, 0x8a, 0x44, 0x2a, 0x02, 0x10, 0x80, 0x14, 0xe4, 0x20}, /* SHD_RGB_UNIT14 */ + {0x1c, 0x51, 0x49, 0x53, 0xe4, 0x02, 0x17, 0xd3, 0xb8, 0xe6, 0x3d}, /* SHD_RGB_UNIT15 */ + {0x8b, 0xd9, 0x8d, 0x53, 0xc8, 0x72, 0x12, 0x98, 0x50, 0x24, 0x23}, /* SHD_RGB_UNIT16 */ + {0x19, 0x11, 0x89, 0x4c, 0x8c, 0x32, 0x16, 0xc7, 0x14, 0x06, 0x38}, /* SHD_RGB_UNIT17 */ + {0xca, 0xc1, 0x10, 0x6c, 0xe0, 0x83, 0x97, 0xd0, 0x4c, 0xa5, 0x2d}, /* SHD_RGB_UNIT18 */ + {0x3e, 0x99, 0x0a, 0x51, 0xbc, 0xc2, 0x15, 0xc2, 0x28, 0x26, 0x39}, /* SHD_RGB_UNIT19 */ + {0xa5, 0x89, 0x0f, 0x7b, 0x8c, 0x64, 0x9d, 0x14, 0xb9, 0x46, 0x3e}, /* SHD_RGB_UNIT20 */ + {0x8f, 0x41, 0xce, 0x5e, 0x5e, 0x03, 0x98, 0xdc, 0x50, 0xe6, 0x3a}, /* SHD_RGB_UNIT21 */ + {0xb4, 0x49, 0x90, 0x72, 0x50, 0x74, 0xa1, 0x3a, 0x05, 0x88, 0x4b}, /* SHD_RGB_UNIT22 */ + {0xe1, 0xd1, 0x91, 0x71, 0x38, 0xc4, 0x1b, 0x0a, 0xed, 0x86, 0x42}, /* SHD_RGB_UNIT23 */ + {0xcb, 0x49, 0xd1, 0x78, 0x86, 0x74, 0x9f, 0x2d, 0xb9, 0x88, 0x51}, /* SHD_RGB_UNIT24 */ + {0x11, 0x62, 0x93, 0x7c, 0x9c, 0x94, 0x1d, 0x1b, 0x41, 0x67, 0x46}, /* SHD_RGB_UNIT25 */ + {0xcf, 0x81, 0x91, 0x77, 0x82, 0x54, 0x9f, 0x2a, 0x21, 0xa8, 0x4d} /* SHD_RGB_UNIT26 */ +}; + +static const uint8_t g_isx012_shd_grb_data[SHD_GRB_DATA_UNIT_NUM][SHD_GRB_DATA_UNIT_SIZE] = +{ + {0xe8, 0xa9, 0x0f, 0x78, 0xe4, 0x13, 0x9d, 0xf0, 0x04, 0xe7, 0x39}, /* SHD_GRB_UNIT0 */ + {0xbd, 0x51, 0x0e, 0x6f, 0x94, 0x63, 0x1c, 0xea, 0x4c, 0x27, 0x3c}, /* SHD_GRB_UNIT1 */ + {0xd7, 0x19, 0x4f, 0x7a, 0xf4, 0xd3, 0x1d, 0xf7, 0x20, 0xe7, 0x3a}, /* SHD_GRB_UNIT2 */ + {0xb6, 0x11, 0x0e, 0x6c, 0x76, 0x03, 0x9b, 0xdd, 0xf0, 0x06, 0x39}, /* SHD_GRB_UNIT3 */ + {0xc9, 0xc1, 0x8e, 0x75, 0xc8, 0xe3, 0x9c, 0xef, 0xf8, 0xa6, 0x39}, /* SHD_GRB_UNIT4 */ + {0xa0, 0x69, 0x0d, 0x62, 0x20, 0x93, 0x97, 0xbf, 0xf4, 0xa5, 0x30}, /* SHD_GRB_UNIT5 */ + {0x8c, 0xb1, 0x8c, 0x68, 0x60, 0x13, 0x9b, 0xe0, 0xcc, 0xa6, 0x38}, /* SHD_GRB_UNIT6 */ + {0x9f, 0x71, 0x0d, 0x5c, 0xf4, 0x12, 0x15, 0xab, 0x00, 0x65, 0x28}, /* SHD_GRB_UNIT7 */ + {0x44, 0x41, 0x0a, 0x56, 0xbc, 0x02, 0x98, 0xc4, 0x50, 0x26, 0x34}, /* SHD_GRB_UNIT8 */ + {0x9a, 0x59, 0x4d, 0x5f, 0x16, 0x83, 0x14, 0xa8, 0x9c, 0x64, 0x25}, /* SHD_GRB_UNIT9 */ + {0x15, 0xc1, 0xc8, 0x46, 0x38, 0x22, 0x13, 0x9a, 0x74, 0x65, 0x2c}, /* SHD_GRB_UNIT10 */ + {0x78, 0x11, 0x4c, 0x63, 0x36, 0xb3, 0x96, 0xbb, 0xcc, 0x44, 0x27}, /* SHD_GRB_UNIT11 */ + {0x11, 0xa1, 0x48, 0x40, 0x04, 0x72, 0x10, 0x83, 0x70, 0x84, 0x23}, /* SHD_GRB_UNIT12 */ + {0x4a, 0x69, 0xca, 0x59, 0xe0, 0xf2, 0x98, 0xcc, 0xb0, 0xa5, 0x2e}, /* SHD_GRB_UNIT13 */ + {0x33, 0xc1, 0x09, 0x44, 0x24, 0x02, 0x10, 0x80, 0x14, 0x84, 0x20}, /* SHD_GRB_UNIT14 */ + {0x1b, 0xd1, 0x48, 0x52, 0x98, 0x72, 0x96, 0xb7, 0x8c, 0x06, 0x35}, /* SHD_GRB_UNIT15 */ + {0x81, 0x39, 0xcc, 0x51, 0x96, 0x32, 0x92, 0x92, 0x48, 0x44, 0x22}, /* SHD_GRB_UNIT16 */ + {0x17, 0xb9, 0x48, 0x4b, 0x5e, 0xa2, 0x15, 0xb0, 0xd8, 0x45, 0x30}, /* SHD_GRB_UNIT17 */ + {0xc0, 0x19, 0xce, 0x69, 0x56, 0x23, 0x97, 0xba, 0x38, 0x05, 0x2a}, /* SHD_GRB_UNIT18 */ + {0x3b, 0xe1, 0x09, 0x50, 0x82, 0x42, 0x95, 0xac, 0xf8, 0x05, 0x31}, /* SHD_GRB_UNIT19 */ + {0x94, 0x19, 0x4d, 0x78, 0xca, 0xe3, 0x9c, 0xe8, 0xa8, 0xa6, 0x35}, /* SHD_GRB_UNIT20 */ + {0x8b, 0x71, 0xcc, 0x5d, 0xf8, 0xa2, 0x97, 0xc0, 0x24, 0xa6, 0x32}, /* SHD_GRB_UNIT21 */ + {0xa4, 0xb1, 0x8d, 0x6d, 0x96, 0xd3, 0xa0, 0x09, 0xe1, 0xa7, 0x3f}, /* SHD_GRB_UNIT22 */ + {0xde, 0x09, 0xcf, 0x70, 0x92, 0x73, 0x9b, 0xe0, 0xcc, 0x06, 0x38}, /* SHD_GRB_UNIT23 */ + {0xc0, 0x89, 0x4e, 0x74, 0xcc, 0x13, 0x1e, 0xfc, 0x84, 0x48, 0x45}, /* SHD_GRB_UNIT24 */ + {0x06, 0x7a, 0xd0, 0x7a, 0xe6, 0x33, 0x1d, 0xef, 0x24, 0x07, 0x3b}, /* SHD_GRB_UNIT25 */ + {0xc4, 0xb1, 0x0e, 0x74, 0xca, 0x33, 0x1e, 0xfc, 0xc4, 0x07, 0x41} /* SHD_GRB_UNIT26 */ +}; + +static const uint8_t g_isx012_shd_r1_data[SHD_R1_DATA_UNIT_NUM][SHD_R1_DATA_UNIT_SIZE] = +{ + {0x10, 0x92, 0x10, 0x82, 0xf8, 0x43, 0x1f, 0xfb, 0xf0, 0xe7, 0x40}, /* SHD_R1_UNIT0 */ + {0x07, 0x92, 0xd0, 0x82, 0xec, 0x33, 0x9e, 0xed, 0x68, 0xe7, 0x3c}, /* SHD_R1_UNIT1 */ + {0xfa, 0x21, 0xd0, 0x7e, 0xce, 0xa3, 0x1b, 0xcd, 0x20, 0xe6, 0x31}, /* SHD_R1_UNIT2 */ + {0xa6, 0x69, 0xce, 0x78, 0xbc, 0xa3, 0x1b, 0xbe, 0x44, 0x25, 0x28}, /* SHD_R1_UNIT3 */ + {0x45, 0x19, 0xcb, 0x65, 0x78, 0xe3, 0x1b, 0xc8, 0x3c, 0xa5, 0x24}, /* SHD_R1_UNIT4 */ + {0x15, 0xc1, 0x48, 0x4d, 0xd6, 0x72, 0x99, 0xd3, 0xdc, 0x25, 0x27}, /* SHD_R1_UNIT5 */ + {0x11, 0x01, 0x08, 0x41, 0x42, 0x42, 0x15, 0xc1, 0xa4, 0x06, 0x2f}, /* SHD_R1_UNIT6 */ + {0x39, 0x89, 0x08, 0x40, 0x0a, 0x22, 0x12, 0xab, 0x0c, 0x26, 0x38}, /* SHD_R1_UNIT7 */ + {0x91, 0x71, 0x4a, 0x49, 0x2c, 0xa2, 0x11, 0x9c, 0xc4, 0xa5, 0x33}, /* SHD_R1_UNIT8 */ + {0xe2, 0xe1, 0x4d, 0x5f, 0xa4, 0x22, 0x94, 0xa3, 0xa0, 0x05, 0x34}, /* SHD_R1_UNIT9 */ + {0xc7, 0x41, 0x50, 0x7c, 0x7e, 0xd3, 0x19, 0xc5, 0x48, 0x86, 0x35}, /* SHD_R1_UNIT10 */ + {0xda, 0xa9, 0xcf, 0x8c, 0x42, 0x24, 0x20, 0xf5, 0x8c, 0x67, 0x3c}, /* SHD_R1_UNIT11 */ + {0xf6, 0x89, 0xd0, 0x88, 0x90, 0x34, 0x23, 0x0b, 0x15, 0xa8, 0x3f}, /* SHD_R1_UNIT12 */ + {0x00, 0x72, 0x10, 0x89, 0x68, 0x04, 0x69, 0x00, 0x00, 0x19, 0x26} /* SHD_R1_UNIT13 */ +}; + +static const uint8_t g_isx012_shd_r2_data[SHD_R2_DATA_UNIT_NUM][SHD_R2_DATA_UNIT_SIZE] = +{ + {0x3a, 0xe2, 0x11, 0x8c, 0x42, 0x74, 0xa1, 0x0c, 0x89, 0x08, 0x46}, /* SHD_R2_UNIT0 */ + {0x30, 0xe2, 0xd1, 0x8c, 0x36, 0x54, 0x20, 0xfe, 0xec, 0x47, 0x41}, /* SHD_R2_UNIT1 */ + {0x20, 0x5a, 0x91, 0x88, 0x16, 0x94, 0x1d, 0xda, 0x80, 0x26, 0x35}, /* SHD_R2_UNIT2 */ + {0xc2, 0x69, 0x0f, 0x81, 0x00, 0x94, 0x9d, 0xc9, 0x84, 0xe5, 0x29}, /* SHD_R2_UNIT3 */ + {0x54, 0xb1, 0x0b, 0x6c, 0xb2, 0xb3, 0x9d, 0xd4, 0x74, 0x85, 0x25}, /* SHD_R2_UNIT4 */ + {0x1a, 0xf1, 0x08, 0x50, 0xfc, 0xe2, 0x1a, 0xe0, 0x2c, 0x66, 0x28}, /* SHD_R2_UNIT5 */ + {0x14, 0x01, 0x88, 0x41, 0x4e, 0x32, 0x16, 0xcb, 0x08, 0x87, 0x31}, /* SHD_R2_UNIT6 */ + {0x42, 0x99, 0x08, 0x40, 0x0c, 0x72, 0x92, 0xb1, 0x58, 0x86, 0x3b}, /* SHD_R2_UNIT7 */ + {0xa8, 0xd9, 0xca, 0x4a, 0x32, 0xe2, 0x91, 0xa0, 0x04, 0x66, 0x36}, /* SHD_R2_UNIT8 */ + {0x02, 0xc2, 0x4e, 0x64, 0xbe, 0xd2, 0x94, 0xa9, 0xe0, 0xc5, 0x36}, /* SHD_R2_UNIT9 */ + {0xe1, 0x61, 0x91, 0x84, 0xb6, 0x43, 0x9b, 0xcf, 0x9c, 0x66, 0x38}, /* SHD_R2_UNIT10 */ + {0xf6, 0xa1, 0x50, 0x97, 0x8e, 0x34, 0x22, 0x04, 0x01, 0x08, 0x40}, /* SHD_R2_UNIT11 */ + {0x15, 0x9a, 0x51, 0x92, 0xf2, 0xd4, 0xa5, 0x1d, 0x99, 0xa8, 0x43}, /* SHD_R2_UNIT12 */ + {0x21, 0x82, 0x91, 0x92, 0xbe, 0xf4, 0x9e, 0xf3, 0x4c, 0x87, 0x38} /* SHD_R2_UNIT13 */ +}; + +static const uint8_t g_isx012_shd_b2_data[SHD_B2_DATA_UNIT_NUM][SHD_B2_DATA_UNIT_SIZE] = +{ + {0xef, 0x39, 0xcf, 0x74, 0x88, 0xb3, 0x1b, 0xdf, 0x20, 0x47, 0x3b}, /* SHD_B2_UNIT0 */ + {0xdf, 0x59, 0xcf, 0x77, 0x8c, 0x43, 0x1b, 0xd7, 0xb8, 0x46, 0x37}, /* SHD_B2_UNIT1 */ + {0xcc, 0xc1, 0x0e, 0x73, 0x78, 0xa3, 0x99, 0xc1, 0xd0, 0x25, 0x2f}, /* SHD_B2_UNIT2 */ + {0x87, 0x09, 0x0d, 0x6c, 0x64, 0x93, 0x99, 0xb6, 0x30, 0xc5, 0x27}, /* SHD_B2_UNIT3 */ + {0x3f, 0xb1, 0x0a, 0x5f, 0x2a, 0x93, 0x99, 0xbc, 0x1c, 0x85, 0x24}, /* SHD_B2_UNIT4 */ + {0x16, 0xc9, 0x48, 0x4c, 0xb6, 0x92, 0x17, 0xc4, 0x94, 0x85, 0x26}, /* SHD_B2_UNIT5 */ + {0x10, 0x09, 0x88, 0x41, 0x3a, 0x52, 0x94, 0xb2, 0x2c, 0xc6, 0x2c}, /* SHD_B2_UNIT6 */ + {0x33, 0x79, 0x08, 0x40, 0x08, 0xc2, 0x11, 0xa2, 0x94, 0x65, 0x34}, /* SHD_B2_UNIT7 */ + {0x7e, 0x39, 0x4a, 0x48, 0x26, 0x52, 0x91, 0x96, 0x64, 0x05, 0x2f}, /* SHD_B2_UNIT8 */ + {0xbf, 0x09, 0x8d, 0x5b, 0x92, 0xa2, 0x93, 0x9d, 0x4c, 0x65, 0x2f}, /* SHD_B2_UNIT9 */ + {0x95, 0xf9, 0x0e, 0x73, 0x48, 0x63, 0x98, 0xb9, 0xd8, 0xa5, 0x30}, /* SHD_B2_UNIT10 */ + {0xa5, 0xb1, 0x8d, 0x83, 0xf4, 0xa3, 0x1d, 0xe0, 0xd0, 0x06, 0x36}, /* SHD_B2_UNIT11 */ + {0xbe, 0xa9, 0x4e, 0x79, 0x50, 0xd4, 0x20, 0xf6, 0x54, 0xa7, 0x38}, /* SHD_B2_UNIT12 */ + {0xc5, 0x91, 0xce, 0x7a, 0xf4, 0x03, 0x44, 0x00, 0x60, 0x60, 0x00} /* SHD_B2_UNIT13 */ +}; + +static const isx012_reg_t g_isx012_shd_thresholds[] = +{ + {SHD_INP_TH_HB_H_R2, 0x1478, 2}, + {SHD_INP_TH_HB_L_R2, 0x1380, 2}, + {SHD_INP_TH_LB_H_R2, 0x10cc, 2}, + {SHD_INP_TH_LB_L_R2, 0x1004, 2}, + {SHD_INP_TH_HB_H_RB, 0x10cc, 2}, + {SHD_INP_TH_HB_L_RB, 0x1004, 2}, + {SHD_INP_TH_LB_H_RB, 0x0000, 2}, + {SHD_INP_TH_LB_L_RB, 0x0000, 2}, +}; + +#define ISX012_SHD_THRESHOLDS_NENTRIES ARRAY_NENTRIES(g_isx012_shd_thresholds) + +static const isx012_reg_t g_isx012_shd_wb[] = +{ + {NORMR, 0x1101, 2}, + {NORMB, 0x0f7b, 2}, + {AWBPRER, 0x0147, 2}, + {AWBPREB, 0x022a, 2}, + {SHD_PRER_OFFSET_R2, 0x001b, 2}, + {SHD_PRER_OFFSET_RB, 0x000b, 2}, + {SHD_PREB_OFFSET_RB, 0x0003, 2}, +}; + +#define ISX012_SHD_WB_NENTRIES ARRAY_NENTRIES(g_isx012_shd_wb) + +static isx012_conv_v4l2_to_regval_t + g_isx012_supported_colorfx[ISX012_MAX_COLOREFFECT + 1] = { + {V4L2_COLORFX_NONE, REGVAL_EFFECT_NONE}, + {V4L2_COLORFX_BW, REGVAL_EFFECT_MONOTONE}, + {V4L2_COLORFX_SEPIA, REGVAL_EFFECT_SEPIA}, + {V4L2_COLORFX_NEGATIVE, REGVAL_EFFECT_NEGPOS}, + {V4L2_COLORFX_SKETCH, REGVAL_EFFECT_SKETCH}, + {V4L2_COLORFX_SOLARIZATION, REGVAL_EFFECT_SOLARIZATION}, + {V4L2_COLORFX_PASTEL, REGVAL_EFFECT_PASTEL} +}; + +static isx012_conv_v4l2_to_regval_t + g_isx012_supported_presetwb[ISX012_MAX_PRESETWB + 1] = { + {V4L2_WHITE_BALANCE_AUTO, REGVAL_AWB_ATM}, + {V4L2_WHITE_BALANCE_INCANDESCENT, REGVAL_AWB_LIGHTBULB}, + {V4L2_WHITE_BALANCE_FLUORESCENT, REGVAL_AWB_FLUORESCENTLIGHT}, + {V4L2_WHITE_BALANCE_DAYLIGHT, REGVAL_AWB_CLEARWEATHER}, + {V4L2_WHITE_BALANCE_CLOUDY, REGVAL_AWB_CLOUDYWEATHER}, + {V4L2_WHITE_BALANCE_SHADE, REGVAL_AWB_SHADE} +}; + +static isx012_conv_v4l2_to_regval_t + g_isx012_supported_photometry[ISX012_MAX_PHOTOMETRY + 1] = { + {V4L2_EXPOSURE_METERING_AVERAGE, REGVAL_PHOTOMETRY_AVERAGE}, + {V4L2_EXPOSURE_METERING_CENTER_WEIGHTED, REGVAL_PHOTOMETRY_CENTERWEIGHT}, + {V4L2_EXPOSURE_METERING_SPOT, REGVAL_PHOTOMETRY_SPOT}, + {V4L2_EXPOSURE_METERING_MATRIX, REGVAL_PHOTOMETRY_MULTIPATTERN} +}; + +static isx012_conv_v4l2_to_regval_t + g_isx012_supported_iso[ISX012_MAX_ISO + 1] = { + {25 * 1000, REGVAL_ISO_25}, + {32 * 1000, REGVAL_ISO_32}, + {40 * 1000, REGVAL_ISO_40}, + {50 * 1000, REGVAL_ISO_50}, + {64 * 1000, REGVAL_ISO_64}, + {80 * 1000, REGVAL_ISO_80}, + {100 * 1000, REGVAL_ISO_100}, + {125 * 1000, REGVAL_ISO_125}, + {160 * 1000, REGVAL_ISO_160}, + {200 * 1000, REGVAL_ISO_200}, + {250 * 1000, REGVAL_ISO_250}, + {320 * 1000, REGVAL_ISO_320}, + {400 * 1000, REGVAL_ISO_400}, + {500 * 1000, REGVAL_ISO_500}, + {640 * 1000, REGVAL_ISO_640}, + {800 * 1000, REGVAL_ISO_800}, + {1000 * 1000, REGVAL_ISO_1000}, + {1250 * 1000, REGVAL_ISO_1250}, + {1600 * 1000, REGVAL_ISO_1600} +}; + +static struct video_devops_s g_isx012_video_devops = +{ + .open = isx012_open, + .close = isx012_close, + .do_halfpush = isx012_do_halfpush, + .set_buftype = isx012_set_buftype, + .set_buf = isx012_set_buf, + .cancel_dma = isx012_cancel_dma, + .get_range_of_fmt = isx012_get_range_of_fmt, + .get_range_of_framesize = isx012_get_range_of_framesize, + .try_format = isx012_try_format, + .set_format = isx012_set_format, + .get_range_of_frameinterval = isx012_get_range_of_frameinterval, + .set_frameinterval = isx012_set_frameinterval, + .get_range_of_ctrlvalue = isx012_get_range_of_ctrlval, + .get_menu_of_ctrlvalue = isx012_get_menu_of_ctrlval, + .get_ctrlvalue = isx012_get_ctrlval, + .set_ctrlvalue = isx012_set_ctrlval, + .refresh = isx012_refresh, +}; + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static uint16_t isx012_getreg(isx012_dev_t *priv, + uint16_t regaddr, uint16_t regsize) +{ + struct i2c_config_s config; + volatile uint16_t regval = 0; + volatile uint8_t buffer[2]; + int ret; + + /* Set up the I2C configuration */ + + config.frequency = priv->i2c_freq; + config.address = priv->i2c_addr; + config.addrlen = 7; + buffer[0] = regaddr >> 8; + buffer[1] = regaddr & 0xff; + + /* Write the register address */ + + ret = i2c_write(priv->i2c, &config, (uint8_t *)buffer, 2); + if (ret < 0) + { + imagererr("i2c_write failed: %d\n", ret); + return 0; + } + + /* Restart and read 16bits from the register */ + + ret = i2c_read(priv->i2c, &config, (uint8_t *)buffer, regsize); + if (ret < 0) + { + imagererr("i2c_read failed: %d\n", ret); + return 0; + } + + memcpy((uint8_t *)®val, (uint8_t *)buffer, regsize); + + return regval; +} + +static int isx012_putreg(isx012_dev_t *priv, + uint16_t regaddr, uint16_t regval, uint16_t regsize) +{ + struct i2c_config_s config; + volatile uint8_t buffer[4]; + int ret; + + /* Set up the I2C configuration */ + + config.frequency = priv->i2c_freq; + config.address = priv->i2c_addr; + config.addrlen = 7; + + /* Set up for the transfer */ + + buffer[0] = regaddr >> 8; /* RegAddr Hi */ + buffer[1] = regaddr & 0xff; /* RegAddr Low */ + + memcpy((uint8_t *)&buffer[2], (uint8_t *)®val, regsize); + + /* And do it */ + + ret = i2c_write(priv->i2c, &config, + (uint8_t *)buffer, regsize + 2); + if (ret < 0) + { + imagererr("i2c_write failed: %d\n", ret); + } + + return ret; +} + +static int isx012_putreglist(isx012_dev_t *priv, + FAR const isx012_reg_t *reglist, size_t nentries) +{ + FAR const isx012_reg_t *entry; + int ret = OK; + + for (entry = reglist; nentries > 0; nentries--, entry++) + { + ret = isx012_putreg(priv, entry->regaddr, + entry->regval, entry->regsize); + if (ret < 0) + { + imagererr("isx012_putreg failed: %d\n", ret); + return ret; + } + } + return ret; +} + +static int isx012_chk_int_state(isx012_dev_t *priv, + uint8_t sts, uint32_t delay_time, + uint32_t wait_time, uint32_t timeout) +{ + int ret = 0; + volatile uint8_t data; + uint32_t time = 0; + + usleep(delay_time * 1000); + while (time < timeout) + { + data = isx012_getreg(priv, INTSTS0, sizeof(data)); + data = data & sts; + if (data != 0) + { + ret = isx012_putreg(priv, INTCLR0, data, sizeof(data)); + return ret; + } + + usleep(wait_time * 1000); + time += wait_time; + } + return ERROR; +} + +static int isx012_replace_fmt_v4l2val_to_regval(uint32_t v4l2val, + uint8_t *regval) +{ + if (regval == NULL) + { + return -EINVAL; + } + + switch (v4l2val) + { + case V4L2_PIX_FMT_UYVY: + *regval = REGVAL_OUTFMT_YUV; + break; + + case V4L2_PIX_FMT_JPEG: + *regval = REGVAL_OUTFMT_JPEG; + break; + + case V4L2_PIX_FMT_JPEG_WITH_SUBIMG: + *regval = REGVAL_OUTFMT_INTERLEAVE; + break; + + default: /* Unsupported format */ + + return -EINVAL; + } + + return OK; +} + +static int isx012_set_mode_param(isx012_dev_t *priv, + enum v4l2_buf_type type, + isx012_modeparam_t *param) +{ + int ret = 0; + uint8_t format; + uint16_t fps_regaddr; + uint16_t fmt_regaddr; + uint16_t sensmode_regaddr; + uint16_t hsize_regaddr; + uint16_t vsize_regaddr; + uint8_t sensmode; + + /* Get register address for type */ + + if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE) + { + fps_regaddr = FPSTYPE_MONI; + fmt_regaddr = OUTFMT_MONI; + sensmode_regaddr = SENSMODE_MONI; + hsize_regaddr = HSIZE_MONI; + vsize_regaddr = VSIZE_MONI; + } + else + { + fps_regaddr = FPSTYPE_CAP; + fmt_regaddr = OUTFMT_CAP; + sensmode_regaddr = SENSMODE_CAP; + hsize_regaddr = HSIZE_CAP; + vsize_regaddr = VSIZE_CAP; + } + + ret = isx012_putreg(priv, fps_regaddr, param->fps, sizeof(uint8_t)); + if (ret < 0) + { + return ret; + } + + ret = isx012_replace_fmt_v4l2val_to_regval(param->format, &format); + if (ret < 0) + { + return ret; + } + + ret = isx012_putreg(priv, fmt_regaddr, format, sizeof(uint8_t)); + if (ret < 0) + { + return ret; + } + + switch (param->fps) + { + case REGVAL_FPSTYPE_120FPS: + sensmode = REGVAL_SENSMODE_1_8; + break; + + case REGVAL_FPSTYPE_60FPS: + sensmode = REGVAL_SENSMODE_1_4; + break; + + case REGVAL_FPSTYPE_30FPS: + sensmode = REGVAL_SENSMODE_1_2; + break; + + default: + sensmode = REGVAL_SENSMODE_ALLPIX; + break; + } + + ret = isx012_putreg(priv, sensmode_regaddr, sensmode, sizeof(uint8_t)); + if (ret < 0) + { + return ret; + } + + ret = isx012_putreg(priv, hsize_regaddr, param->hsize, sizeof(uint16_t)); + if (ret < 0) + { + return ret; + } + + ret = isx012_putreg(priv, vsize_regaddr, param->vsize, sizeof(uint16_t)); + if (ret < 0) + { + return ret; + } + + if (format == REGVAL_OUTFMT_INTERLEAVE) + { + ret = isx012_putreg(priv, HSIZE_TN, param->int_hsize, sizeof(uint16_t)); + if (ret < 0) + { + return ret; + } + + ret = isx012_putreg(priv, VSIZE_TN, param->int_vsize, sizeof(uint16_t)); + if (ret < 0) + { + return ret; + } + } + + return ret; +} + +void isx012_callback(uint8_t code, uint32_t size, uint32_t addr) +{ + enum v4l2_buf_type type; + FAR struct isx012_dev_s *priv = &g_isx012_private; + + if (priv->mode == REGVAL_MODESEL_CAP) + { + /* ISX012 capture mode = still capture */ + + type = V4L2_BUF_TYPE_STILL_CAPTURE; + } + else + { + /* ISX012 monitor mode or halfrelease mode = video capture */ + + type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + } + + video_common_notify_dma_done(code, type, size, priv->video_priv); + + return; +} + +/**************************************************************************** + * isx012_change_camera_mode + ****************************************************************************/ + +static int isx012_change_camera_mode(isx012_dev_t *priv, uint8_t mode) +{ + int ret = 0; + uint16_t format_addr; + uint8_t format_data; + uint32_t vifmode; +#ifdef ISX012_FRAME_SKIP_EN + uint8_t mask_num; + int i; +#endif /* ISX012_FRAME_SKIP_EN */ + + if (priv->state != STATE_ISX012_ACTIVE) + { + return -EPERM; + } + + switch (mode) + { + case REGVAL_MODESEL_MON: + case REGVAL_MODESEL_HREL: + format_addr = OUTFMT_MONI; + break; + + case REGVAL_MODESEL_CAP: + format_addr = OUTFMT_CAP; + break; + + default: + return -EPERM; + } + + format_data = isx012_getreg(priv, format_addr, 1); + + switch (format_data) /* mode parallel */ + { + case REGVAL_OUTFMT_YUV: + vifmode = REGVAL_VIFMODE_YUV_PARALLEL; + break; + case REGVAL_OUTFMT_JPEG: + vifmode = REGVAL_VIFMODE_JPEG_PARALLEL; + break; + case REGVAL_OUTFMT_INTERLEAVE: + vifmode = REGVAL_VIFMODE_INTERLEAVE_PARALLEL; + break; + case REGVAL_OUTFMT_RGB: + vifmode = REGVAL_VIFMODE_RGB_PARALLEL; + break; + default: + vifmode = REGVAL_VIFMODE_YUV_PARALLEL; + break; + } + + ret = isx012_putreg(priv, VIFMODE, vifmode, sizeof(vifmode)); + if (ret < 0) + { + return ret; + } + + isx012_putreg(priv, INTCLR0, CM_CHANGED_STS, 1); + + ret = isx012_putreg(priv, MODESEL, mode, sizeof(mode)); + if (ret < 0) + { + return ret; + } + + /* Wait CM_CHANGED */ + + ret = isx012_chk_int_state(priv, CM_CHANGED_STS, + CAMERA_MODE_DELAY_TIME, + CAMERA_MODE_WAIT_TIME, + CAMERA_MODE_TIMEOUT); + if (ret != 0) + { + return ret; + } + +#ifdef ISX012_FRAME_SKIP_EN + if (mode != REGVAL_MODESEL_HREL) + { + isx012_putreg(priv, INTCLR0, VINT_STS, 1); + mask_num = isx012_getreg(priv, RO_MASK_NUM, sizeof(mask_num)); + for (i = 0; i < mask_num; i++) + { + /* Wait Next VINT */ + + ret = isx012_chk_int_state(priv, VINT_STS, VINT_DELAY_TIME, + VINT_WAIT_TIME, VINT_TIMEOUT); + if (ret != 0) + { + return ret; + } + } + } +#endif /* ISX012_FRAME_SKIP_EN */ + + return OK; +} + +/**************************************************************************** + * isx012_change_device_state + ****************************************************************************/ +static int isx012_change_device_state(isx012_dev_t *priv, + isx012_state_t state) +{ + int ret = 0; +#ifdef ISX012_FRAME_SKIP_EN + int i; + uint8_t mute_cnt; +#endif /* ISX012_FRAME_SKIP_EN */ + + if (priv->state == STATE_ISX012_PRESLEEP || priv->state == state) + { + return -EPERM; + } + + switch (state) + { + case STATE_ISX012_SLEEP: + isx012_putreg(priv, INTCLR0, OM_CHANGED_STS, 1); + board_isx012_set_sleep(1); + break; + case STATE_ISX012_ACTIVE: + isx012_putreg(priv, INTCLR0, OM_CHANGED_STS | CM_CHANGED_STS, 1); + board_isx012_release_sleep(); + break; + case STATE_ISX012_PRESLEEP: + return -EPERM; + default: + return -EPERM; + } + + /* Wait OM_CHANGED */ + + ret = isx012_chk_int_state(priv, OM_CHANGED_STS, + DEVICE_STATE_DELAY_TIME, + DEVICE_STATE_WAIT_TIME, + DEVICE_STATE_TIMEOUT); + if (ret != 0) + { + return ret; + } + + priv->state = state; + + if (state == STATE_ISX012_ACTIVE) + { + /* Wait CM_CHANGED -> Monitoring */ + + ret = isx012_chk_int_state(priv, CM_CHANGED_STS, + CAMERA_MODE_DELAY_TIME, + CAMERA_MODE_WAIT_TIME, + CAMERA_MODE_TIMEOUT); + if (ret != 0) + { + return ret; + } + +#ifdef ISX012_FRAME_SKIP_EN + mute_cnt = isx012_getreg(priv, MUTECNT, sizeof(mute_cnt)); + isx012_putreg(priv, INTCLR0, VINT_STS, 1); + for (i = 0; i < mute_cnt; i++) + { + /* Wait Next VINT */ + + ret = isx012_chk_int_state(priv, VINT_STS, VINT_DELAY_TIME, + VINT_WAIT_TIME, VINT_TIMEOUT); + if (ret != 0) + { + return ret; + } + } +#endif /* ISX012_FRAME_SKIP_EN */ + } + + priv->mode = REGVAL_MODESEL_MON; + + return OK; +} + +int init_isx012(FAR struct isx012_dev_s *priv) +{ + int ret; + +#ifdef ISX012_NOT_USE_NSTBY + board_isx012_release_sleep(); + board_isx012_release_reset(); + usleep(6000); +#else + board_isx012_release_reset(); + usleep(6000); +#endif + +#ifdef ISX012_CHECK_IN_DETAIL + /* check the chip id */ + + ret = isx012_chipid(priv); + if (ret < 0) + { + imagererr("isx012_chipid failed: %d\n", ret); + board_isx012_set_reset(); + return ret; + } +#endif + + /* Wait OM_CHANGED Power OFF -> PreSleep */ + + ret = isx012_chk_int_state(priv, OM_CHANGED_STS, DEVICE_STATE_DELAY_TIME, + DEVICE_STATE_WAIT_TIME, DEVICE_STATE_TIMEOUT); + if (ret != OK) + { + imagererr("OM_CHANGED_STS(PreSleep) is Not occured: %d\n", ret); + return ret; + } + + priv->state = STATE_ISX012_PRESLEEP; + +#ifndef ISX012_NOT_USE_NSTBY + /* set the isx012 clock */ + + /* Write INCK_SET register ISX012 change state PreSleep -> Sleep */ + + ret = isx012_putreglist(priv, g_isx012_presleep, ISX012_PRESLEEP_NENTRIES); + if (ret != OK) + { + imagererr("isx012_putreglist(INCK_SET) failed: %d\n", ret); + return ret; + } + + /* Wait OM_CHANGED PreSleep -> Sleep */ + + ret = isx012_chk_int_state(priv, OM_CHANGED_STS, DEVICE_STATE_DELAY_TIME, + DEVICE_STATE_WAIT_TIME, DEVICE_STATE_TIMEOUT); + if (ret != OK) + { + imagererr("OM_CHANGED_STS(Sleep) is Not occured: %d\n", ret); + return ret; + } +#endif + + priv->state = STATE_ISX012_SLEEP; + priv->i2c_freq = I2CFREQ_FAST; + + /* initialize the isx012 hardware */ + + ret = isx012_putreglist(priv, g_isx012_def_init, ISX012_RESET_NENTRIES); + if (ret < 0) + { + imagererr("isx012_putreglist failed: %d\n", ret); + board_isx012_set_reset(); + return ret; + } + + /* Set shading adjustment */ + + ret = isx012_set_shd(priv); + if (ret < 0) + { + imagererr("isx012_set_shd failed: %d\n", ret); + board_isx012_set_reset(); + return ret; + } + + /* monitor mode default format: YUV4:2:2 QVGA */ + + priv->param.monitor.fps = REGVAL_FPSTYPE_30FPS; + priv->param.monitor.format = V4L2_PIX_FMT_UYVY; + priv->param.monitor.hsize = VIDEO_HSIZE_QVGA; + priv->param.monitor.vsize = VIDEO_VSIZE_QVGA; + priv->param.monitor.int_hsize = 0; + priv->param.monitor.int_vsize = 0; + + ret = isx012_set_mode_param(priv, + V4L2_BUF_TYPE_VIDEO_CAPTURE, + &priv->param.monitor); + if (ret < 0) + { + board_isx012_set_reset(); + return ret; + } + + /* capture mode default format: JPEG FULLHD */ + + priv->param.capture.fps = REGVAL_FPSTYPE_15FPS; + priv->param.capture.format = V4L2_PIX_FMT_JPEG; + priv->param.capture.hsize = VIDEO_HSIZE_FULLHD; + priv->param.capture.vsize = VIDEO_VSIZE_FULLHD; + priv->param.capture.int_hsize = 0; + priv->param.capture.int_vsize = 0; + + ret = isx012_set_mode_param(priv, + V4L2_BUF_TYPE_STILL_CAPTURE, + &priv->param.capture); + if (ret < 0) + { + board_isx012_set_reset(); + return ret; + } + + return ret; +} + +static int isx012_open(FAR void *video_private) +{ + FAR struct isx012_dev_s *priv = &g_isx012_private; + int ret = 0; + + ret = board_isx012_power_on(); + if (ret < 0) + { + imagererr("Failed to power on %d\n", ret); + return ret; + } + + ret = init_isx012(priv); + if (ret < 0) + { + imagererr("Failed to init_isx012 %d\n", ret); + board_isx012_set_reset(); + board_isx012_power_off(); + return ret; + } + + ret = cxd56_cisifinit(); + if (ret < 0) + { + imagererr("Fail cxd56_cisifinit %d\n", ret); + return ret; + } + + /* Save video private information address */ + + g_isx012_private.video_priv = video_private; + + return ret; +} + +static int isx012_close(void) +{ + FAR struct isx012_dev_s *priv = &g_isx012_private; + + g_isx012_private.video_priv = NULL; + + int ret = 0; + + if (priv->state == STATE_ISX012_ACTIVE) + { + board_isx012_set_sleep(1); + } + + board_isx012_set_reset(); + + ret = board_isx012_power_off(); + if (ret < 0) + { + imagererr("Failed to power off %d\n", ret); + return ret; + } + + ret = cxd56_cisifstopcapture(); + if (ret < 0) + { + imagererr("Fail cxd56_cisifstopcapture %d\n", ret); + return ret; + } + + ret = cxd56_cisiffinalize(); + if (ret < 0) + { + imagererr("Fail cxd56_cisiffinalize %d\n", ret); + return ret; + } + + priv->i2c_freq = I2CFREQ_STANDARD; + priv->state = STATE_ISX012_POWEROFF; + + return ret; +} + +static int isx012_do_halfpush(bool enable) +{ + FAR struct isx012_dev_s *priv = &g_isx012_private; + uint8_t mode; + int ret = -EPERM; + + if (enable) + { + /* state transition : MONITORING -> HALFRELEASE */ + + if (priv->mode == REGVAL_MODESEL_MON) + { + mode = REGVAL_MODESEL_HREL; + ret = OK; + } + } + else + { + /* state transition : HALFRELEASE -> MONITORING */ + + if (priv->mode == REGVAL_MODESEL_HREL) + { + mode = REGVAL_MODESEL_MON; + ret = OK; + } + } + + if (ret == OK) + { + ret = isx012_change_camera_mode(priv, mode); + if (ret == OK) + { + priv->mode = mode; + } + } + + return ret; +} + +static int isx012_set_buftype(enum v4l2_buf_type type) +{ + FAR struct isx012_dev_s *priv = &g_isx012_private; + uint8_t mode; + int ret = OK; + + if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE) + { + if (priv->mode == REGVAL_MODESEL_HREL) + { + /* state transition : HALFRELEASE -> HALFRELEASE */ + + mode = REGVAL_MODESEL_HREL; + } + else + { + /* state transition : CAPTURE -> MONITORING + * or MONITORING -> MONITORING + */ + + mode = REGVAL_MODESEL_MON; + } + } + else + { + /* state transition : any -> CAPTURE */ + + mode = REGVAL_MODESEL_CAP; + } + + /* In no active case, activate */ + + if (priv->state != STATE_ISX012_ACTIVE) + { + isx012_change_device_state(priv, STATE_ISX012_ACTIVE); + } + + if (mode != priv->mode) + { + ret = isx012_change_camera_mode(priv, mode); + if (ret == OK) + { + priv->mode = mode; + } + } + + return ret; +} + +static int isx012_set_buf(uint32_t bufaddr, uint32_t bufsize) +{ + int ret; + FAR struct isx012_dev_s *priv = &g_isx012_private; + cisif_param_t cis_param = {0}; + cisif_sarea_t sarea = {0}; + isx012_modeparam_t *mode_param = NULL; + + sarea.strg_addr = (uint8_t *)bufaddr; + sarea.strg_size = bufsize; + + if (priv->dma_state) + { + ret = cxd56_cisifsetdmabuf(&sarea); + } + else + { + if (priv->mode == REGVAL_MODESEL_CAP) + { + mode_param = &priv->param.capture; + } + else + { + mode_param = &priv->param.monitor; + } + + switch (mode_param->format) + { + case V4L2_PIX_FMT_UYVY: /* Set YUV 4:2:2 information */ + + cis_param.yuv_param.hsize = mode_param->hsize; + cis_param.yuv_param.vsize = mode_param->vsize; + + break; + + case V4L2_PIX_FMT_JPEG: /* Set JPEG information */ + + /* no setting */ + + break; + + case V4L2_PIX_FMT_JPEG_WITH_SUBIMG: /* Set JPEG + YUV 4:2:2 information */ + + cis_param.yuv_param.hsize = mode_param->int_hsize; + cis_param.yuv_param.vsize = mode_param->int_vsize; + + break; + + default: /* Unsupported format */ + + return -EINVAL; + } + + cis_param.format = mode_param->format; + cis_param.comp_func = isx012_callback; + + ret = cxd56_cisifstartcapture(&cis_param, &sarea); + if (ret != OK) + { + return ret; + } + + priv->dma_state = true; + } + + return ret; +} + +static int isx012_cancel_dma(void) +{ + int ret; + FAR struct isx012_dev_s *priv = &g_isx012_private; + + ret = cxd56_cisifstopcapture(); + if (ret != OK) + { + return ret; + } + + priv->dma_state = false; + return ret; +} + +static int isx012_check_fmt(enum v4l2_buf_type buf_type, + uint32_t pixel_format) +{ + switch (buf_type) + { + case V4L2_BUF_TYPE_VIDEO_CAPTURE: + if (pixel_format != V4L2_PIX_FMT_UYVY) + { + /* Unsupported format */ + + return -EINVAL; + } + + break; + + case V4L2_BUF_TYPE_STILL_CAPTURE: + if ((pixel_format != V4L2_PIX_FMT_JPEG) && + (pixel_format != V4L2_PIX_FMT_JPEG_WITH_SUBIMG) && + (pixel_format != V4L2_PIX_FMT_UYVY)) + { + /* Unsupported format */ + + return -EINVAL; + } + + break; + + default: /* Unsupported type */ + + return -EINVAL; + } + + return OK; +} + +static int isx012_get_range_of_fmt(FAR struct v4l2_fmtdesc *format) +{ + if (format == NULL) + { + return -EINVAL; + } + + switch (format->type) + { + case V4L2_BUF_TYPE_VIDEO_CAPTURE: + + switch (format->index) + { + case 0: /* YUV 4:2:2 */ + + strncpy(format->description, "YUV 4:2:2", V4L2_FMT_DSC_MAX); + format-> pixelformat = V4L2_PIX_FMT_UYVY; + + break; + + default: /* 1, 2, ... */ + return -EINVAL; + } + + break; + + case V4L2_BUF_TYPE_STILL_CAPTURE: + switch (format->index) + { + case 0: /* JPEG */ + + strncpy(format->description, "JPEG", V4L2_FMT_DSC_MAX); + format->pixelformat = V4L2_PIX_FMT_JPEG; + + break; + + case 1: /* JPEG + YUV 4:2:2 */ + + strncpy(format->description, + "JPEG + YUV 4:2:2", + V4L2_FMT_DSC_MAX); + format->pixelformat = V4L2_PIX_FMT_JPEG_WITH_SUBIMG; + format->subimg_pixelformat = V4L2_PIX_FMT_UYVY; + + break; + + case 2: /* YUV 4:2:2 */ + + strncpy(format->description, "YUV 4:2:2", V4L2_FMT_DSC_MAX); + format->pixelformat = V4L2_PIX_FMT_UYVY; + + break; + + default: /* 3, 4, ... */ + return -EINVAL; + } + + break; + + default: /* Unsupported type */ + + return -EINVAL; + } + + return OK; +} + +static int isx012_get_range_of_framesize(FAR struct v4l2_frmsizeenum *frmsize) +{ + int ret; + + if (frmsize == NULL) + { + return -EINVAL; + } + + if (frmsize->index != 0) + { + return -EINVAL; + } + + ret = isx012_check_fmt(frmsize->buf_type, frmsize->pixel_format); + if (ret != OK) + { + return ret; + } + + switch (frmsize->pixel_format) + { + case V4L2_PIX_FMT_UYVY: /* YUV 4:2:2 */ + frmsize->type = V4L2_FRMSIZE_TYPE_STEPWISE; + frmsize->stepwise.min_width = OUT_YUV_HSIZE_MIN; + frmsize->stepwise.max_width = OUT_YUV_15FPS_HSIZE_MAX; + frmsize->stepwise.step_width = ISX012_SIZE_STEP; + frmsize->stepwise.min_height = OUT_YUV_VSIZE_MIN; + frmsize->stepwise.max_height = OUT_YUV_15FPS_VSIZE_MAX; + frmsize->stepwise.step_height = ISX012_SIZE_STEP; + + break; + + case V4L2_PIX_FMT_JPEG: /* JPEG */ + frmsize->type = V4L2_FRMSIZE_TYPE_STEPWISE; + frmsize->stepwise.min_width = OUT_JPG_HSIZE_MIN; + frmsize->stepwise.max_width = OUT_JPG_15FPS_HSIZE_MAX; + frmsize->stepwise.step_width = ISX012_SIZE_STEP; + frmsize->stepwise.min_height = OUT_JPG_VSIZE_MIN; + frmsize->stepwise.max_height = OUT_JPG_15FPS_VSIZE_MAX; + frmsize->stepwise.step_height = ISX012_SIZE_STEP; + + break; + + case V4L2_PIX_FMT_JPEG_WITH_SUBIMG: /* JPEG + YUV 4:2:2 */ + if (frmsize->subimg_pixel_format != V4L2_PIX_FMT_UYVY) + { + /* Unsupported pixel format */ + + return -EINVAL; + } + + frmsize->type = V4L2_FRMSIZE_TYPE_STEPWISE; + frmsize->stepwise.min_width = OUT_JPG_HSIZE_MIN; + frmsize->stepwise.max_width = OUT_JPGINT_15FPS_HSIZE_MAX; + frmsize->stepwise.step_width = ISX012_SIZE_STEP; + frmsize->stepwise.min_height = OUT_JPG_VSIZE_MIN; + frmsize->stepwise.max_height = OUT_JPGINT_15FPS_VSIZE_MAX; + frmsize->stepwise.step_height = ISX012_SIZE_STEP; + + frmsize->subimg_type = V4L2_FRMSIZE_TYPE_STEPWISE; + frmsize->subimg.stepwise.min_width = OUT_YUV_HSIZE_MIN; + frmsize->subimg.stepwise.max_width = OUT_YUVINT_30FPS_HSIZE_MAX; + frmsize->subimg.stepwise.step_width = ISX012_SIZE_STEP; + frmsize->subimg.stepwise.min_height = OUT_YUV_VSIZE_MIN; + frmsize->subimg.stepwise.max_height = OUT_YUVINT_30FPS_VSIZE_MAX; + frmsize->subimg.stepwise.step_height = ISX012_SIZE_STEP; + + break; + + default: /* Unsupported pixel format */ + + return -EINVAL; + } + + return OK; +} + +static int isx012_try_format(FAR struct v4l2_format *format) +{ + int ret; + FAR struct v4l2_frmsizeenum support; + + if (format == NULL) + { + return -EINVAL; + } + + /* Get supported frame size information */ + + support.index = 0; + support.buf_type = format->type; + support.pixel_format = format->fmt.pix.pixelformat; + support.subimg_pixel_format = format->fmt.pix.subimg_pixelformat; + + ret = isx012_get_range_of_framesize(&support); + if (ret != OK) + { + return ret; + } + + CHECK_RANGE(format->fmt.pix.width, + support.stepwise.min_width, + support.stepwise.max_width, + support.stepwise.step_width); + + CHECK_RANGE(format->fmt.pix.height, + support.stepwise.min_height, + support.stepwise.max_height, + support.stepwise.step_height); + + if (support.pixel_format == V4L2_PIX_FMT_JPEG_WITH_SUBIMG) + { + CHECK_RANGE(format->fmt.pix.subimg_width, + support.subimg.stepwise.min_width, + support.subimg.stepwise.max_width, + support.subimg.stepwise.step_width); + + CHECK_RANGE(format->fmt.pix.subimg_height, + support.subimg.stepwise.min_height, + support.subimg.stepwise.max_height, + support.subimg.stepwise.step_height); + } + + return OK; +} + +static int isx012_set_format(FAR struct v4l2_format *format) +{ + int ret; + int8_t max_fps; + struct v4l2_frmivalenum frmival; + isx012_modeparam_t mode_param; + FAR isx012_modeparam_t *current_param; + FAR struct isx012_dev_s *priv = &g_isx012_private; + + ret = isx012_try_format(format); + if (ret < 0) + { + return ret; + } + + frmival.index = 0; + frmival.buf_type = format->type; + frmival.pixel_format = format->fmt.pix.pixelformat; + frmival.width = format->fmt.pix.width; + frmival.height = format->fmt.pix.height; + frmival.subimg_pixel_format = format->fmt.pix.subimg_pixelformat; + frmival.subimg_width = format->fmt.pix.subimg_width; + frmival.subimg_height = format->fmt.pix.subimg_height; + + max_fps = isx012_get_maximum_fps(&frmival); + if (max_fps < 0) + { + return max_fps; + } + + switch (format->type) + { + case V4L2_BUF_TYPE_VIDEO_CAPTURE: + current_param = &priv->param.monitor; + break; + + case V4L2_BUF_TYPE_STILL_CAPTURE: + current_param = &priv->param.capture; + break; + + default: + return -EINVAL; + } + + memcpy(&mode_param, current_param, sizeof(mode_param)); + + mode_param.format = format->fmt.pix.pixelformat; + mode_param.hsize = format->fmt.pix.width; + mode_param.vsize = format->fmt.pix.height; + mode_param.int_hsize = format->fmt.pix.subimg_width; + mode_param.int_vsize = format->fmt.pix.subimg_height; + + if (mode_param.fps < max_fps) + { + mode_param.fps = max_fps; + } + + ret = isx012_set_mode_param(priv, + format->type, + &mode_param); + if (ret != OK) + { + return ret; + } + + memcpy(current_param, &mode_param, sizeof(mode_param)); + + return OK; +} + +static int isx012_set_supported_frminterval(uint32_t fps_index, + FAR struct v4l2_fract *interval) +{ + switch (fps_index) + { + case REGVAL_FPSTYPE_120FPS: + interval->numerator = 1; + interval->denominator = 120; + + break; + + case REGVAL_FPSTYPE_60FPS: + interval->numerator = 1; + interval->denominator = 60; + + break; + + case REGVAL_FPSTYPE_30FPS: + interval->numerator = 1; + interval->denominator = 30; + + break; + + case REGVAL_FPSTYPE_15FPS: + interval->numerator = 1; + interval->denominator = 15; + + break; + + case REGVAL_FPSTYPE_7_5FPS: + interval->numerator = 2; + interval->denominator = 15; + + break; + + case REGVAL_FPSTYPE_6FPS: + interval->numerator = 1; + interval->denominator = 6; + + break; + + case REGVAL_FPSTYPE_5FPS: + interval->numerator = 1; + interval->denominator = 5; + + break; + + default: + return -EINVAL; + } + + return OK; +} + +static int8_t isx012_get_maximum_fps(FAR struct v4l2_frmivalenum *frmival) +{ + int ret; + uint8_t max_fps = REGVAL_FPSTYPE_120FPS; + + if (frmival == NULL) + { + return -EINVAL; + } + + ret = isx012_check_fmt(frmival->buf_type, frmival->pixel_format); + if (ret != OK) + { + return ret; + } + + switch (frmival->pixel_format) + { + case V4L2_PIX_FMT_UYVY: /* YUV 4:2:2 */ + if ((frmival->width < OUT_YUV_HSIZE_MIN) || + (frmival->height < OUT_YUV_VSIZE_MIN) || + (frmival->width > OUT_YUV_15FPS_HSIZE_MAX) || + (frmival->height > OUT_YUV_15FPS_VSIZE_MAX)) + { + /* IN frame size is out of range */ + + return -EINVAL; + } + else if ((frmival->width <= OUT_YUV_120FPS_HSIZE_MAX) && + (frmival->height <= OUT_YUV_120FPS_VSIZE_MAX)) + { + /* support 120FPS, 60FPS, 30FPS, 15FPS, 7.5FPS, 6FPS, and 5FPS */ + + max_fps = REGVAL_FPSTYPE_120FPS; + } + else + { + /* support 60FPS, 30FPS, 15FPS, 7.5FPS, 6FPS, and 5FPS */ + + max_fps = REGVAL_FPSTYPE_60FPS; + } + + break; + + case V4L2_PIX_FMT_JPEG: /* JPEG */ + if ((frmival->width < OUT_JPG_HSIZE_MIN) || + (frmival->height < OUT_JPG_VSIZE_MIN) || + (frmival->width > OUT_JPG_15FPS_HSIZE_MAX) || + (frmival->height > OUT_JPG_15FPS_VSIZE_MAX)) + { + /* IN frame size is out of range */ + + return -EINVAL; + } + else if ((frmival->width <= OUT_JPG_120FPS_HSIZE_MAX) && + (frmival->height <= OUT_JPG_120FPS_VSIZE_MAX)) + { + /* support 120FPS, 60FPS, 30FPS, 15FPS, 7.5FPS, 6FPS, and 5FPS */ + + max_fps = REGVAL_FPSTYPE_120FPS; + } + else if ((frmival->width <= OUT_JPG_60FPS_HSIZE_MAX) && + (frmival->height <= OUT_JPG_60FPS_VSIZE_MAX)) + { + /* support 60FPS, 30FPS, 15FPS, 7.5FPS, 6FPS, and 5FPS */ + + max_fps = REGVAL_FPSTYPE_60FPS; + } + else if ((frmival->width <= OUT_JPG_30FPS_HSIZE_MAX) && + (frmival->height <= OUT_JPG_30FPS_VSIZE_MAX)) + { + /* support 30FPS, 15FPS, 7.5FPS, 6FPS, and 5FPS */ + + max_fps = REGVAL_FPSTYPE_30FPS; + } + else + { + /* support 15FPS, 7.5FPS, 6FPS, and 5FPS */ + + max_fps = REGVAL_FPSTYPE_15FPS; + } + + break; + + case V4L2_PIX_FMT_JPEG_WITH_SUBIMG: /* JPEG + YUV 4:2:2 */ + if (frmival->subimg_pixel_format != V4L2_PIX_FMT_UYVY) + { + /* Unsupported pixel format */ + + return -EINVAL; + } + + if ((frmival->width < OUT_JPG_HSIZE_MIN) || + (frmival->height < OUT_JPG_VSIZE_MIN) || + (frmival->width > OUT_JPGINT_15FPS_HSIZE_MAX) || + (frmival->height > OUT_JPGINT_15FPS_VSIZE_MAX) || + (frmival->subimg_width < OUT_YUV_HSIZE_MIN) || + (frmival->subimg_height < OUT_YUV_VSIZE_MIN) || + (frmival->subimg_width > OUT_YUVINT_30FPS_HSIZE_MAX) || + (frmival->subimg_height > OUT_YUVINT_30FPS_VSIZE_MAX)) + { + /* IN frame size is out of range */ + + return -EINVAL; + } + else if ((frmival->width <= OUT_JPGINT_30FPS_HSIZE_MAX) && + (frmival->height <= OUT_JPGINT_30FPS_VSIZE_MAX)) + { + /* support 30FPS, 15FPS, 7.5FPS, 6FPS, 5FPS */ + + max_fps = REGVAL_FPSTYPE_30FPS; + } + else + { + /* support 15FPS, 7.5FPS, 6FPS, 5FPS */ + + max_fps = REGVAL_FPSTYPE_15FPS; + } + + break; + + default: + return -EINVAL; + } + + return (int8_t)max_fps; +} + +static int isx012_get_range_of_frameinterval + (FAR struct v4l2_frmivalenum *frmival) +{ + int ret; + int8_t max_fps; + + max_fps = isx012_get_maximum_fps(frmival); + if (max_fps < 0) + { + return max_fps; + } + + frmival->type = V4L2_FRMIVAL_TYPE_DISCRETE; + ret = isx012_set_supported_frminterval(frmival->index + max_fps, + &frmival->discrete); + return ret; +} + +static int isx012_change_fraction_to_fps(FAR struct v4l2_fract *interval) +{ + if (interval->denominator == interval->numerator * 120) /* 120FPS */ + { + return REGVAL_FPSTYPE_120FPS; + } + else if(interval->denominator == interval->numerator * 60) /* 60FPS */ + { + return REGVAL_FPSTYPE_60FPS; + } + else if(interval->denominator == interval->numerator * 30) /* 30FPS */ + { + return REGVAL_FPSTYPE_30FPS; + } + else if(interval->denominator == interval->numerator * 15) /* 15FPS */ + { + return REGVAL_FPSTYPE_15FPS; + } + else if(interval->denominator * 10 == interval->numerator * 75) /* 7.5FPS */ + { + return REGVAL_FPSTYPE_7_5FPS; + } + else if(interval->denominator == interval->numerator * 6) /* 6FPS */ + { + return REGVAL_FPSTYPE_6FPS; + } + else if(interval->denominator == interval->numerator * 5) /* 5FPS */ + { + return REGVAL_FPSTYPE_5FPS; + } + else + { + return -EINVAL; + } +} + +static int isx012_set_frameinterval(FAR struct v4l2_streamparm *parm) +{ + int ret; + int8_t fps; + int8_t max_fps; + uint16_t fps_regaddr; + FAR isx012_modeparam_t *modeparam; + struct v4l2_frmivalenum frmival; + FAR struct isx012_dev_s *priv = &g_isx012_private; + + fps = isx012_change_fraction_to_fps(&parm->parm.capture.timeperframe); + if (fps < 0) + { + return fps; + } + + frmival.buf_type = parm->type; + switch (frmival.buf_type) + { + case V4L2_BUF_TYPE_VIDEO_CAPTURE: + modeparam = &priv->param.monitor; + fps_regaddr = FPSTYPE_MONI; + break; + + case V4L2_BUF_TYPE_STILL_CAPTURE: + modeparam = &priv->param.capture; + fps_regaddr = FPSTYPE_CAP; + break; + + default: + return -EINVAL; + } + + /* Get maximum fps settable value in current image format */ + + frmival.pixel_format = modeparam->format; + frmival.height = modeparam->vsize; + frmival.width = modeparam->hsize; + frmival.subimg_pixel_format = V4L2_PIX_FMT_UYVY; + frmival.subimg_height = modeparam->int_vsize; + frmival.subimg_width = modeparam->int_hsize; + max_fps = isx012_get_maximum_fps(&frmival); + if (max_fps < 0) + { + return fps; + } + + if (fps < max_fps) + { + return -EINVAL; + } + + ret = isx012_putreg(priv, fps_regaddr, fps, sizeof(uint8_t)); + if (ret < 0) + { + return ret; + } + + modeparam->fps = fps; + + return OK; +} + +static int isx012_get_range_of_ctrlval(FAR struct v4l2_query_ext_ctrl *range) +{ + if (range == NULL) + { + return -EINVAL; + } + + switch (range->ctrl_class) + { + case V4L2_CTRL_CLASS_USER: + switch (range->id) + { + case V4L2_CID_BRIGHTNESS: + range->type = ISX012_TYPE_BRIGHTNESS; + range->minimum = ISX012_MIN_BRIGHTNESS; + range->maximum = ISX012_MAX_BRIGHTNESS; + range->step = ISX012_STEP_BRIGHTNESS; + range->default_value = ISX012_DEF_BRIGHTNESS; + strncpy(range->name, + ISX012_NAME_BRIGHTNESS, + sizeof(range->name)); + + break; + + case V4L2_CID_CONTRAST: + range->type = ISX012_TYPE_CONTRAST; + range->minimum = ISX012_MIN_CONTRAST; + range->maximum = ISX012_MAX_CONTRAST; + range->step = ISX012_STEP_CONTRAST; + range->default_value = ISX012_DEF_CONTRAST; + strncpy(range->name, + ISX012_NAME_CONTRAST, + sizeof(range->name)); + + break; + + case V4L2_CID_SATURATION: + range->type = ISX012_TYPE_SATURATION; + range->minimum = ISX012_MIN_SATURATION; + range->maximum = ISX012_MAX_SATURATION; + range->step = ISX012_STEP_SATURATION; + range->default_value = ISX012_DEF_SATURATION; + strncpy(range->name, + ISX012_NAME_SATURATION, + sizeof(range->name)); + + break; + + case V4L2_CID_HUE: + range->type = ISX012_TYPE_HUE; + range->minimum = ISX012_MIN_HUE; + range->maximum = ISX012_MAX_HUE; + range->step = ISX012_STEP_HUE; + range->default_value = ISX012_DEF_HUE; + strncpy(range->name, + ISX012_NAME_HUE, + sizeof(range->name)); + + break; + + case V4L2_CID_AUTO_WHITE_BALANCE: + range->type = ISX012_TYPE_AUTOWB; + range->minimum = ISX012_MIN_AUTOWB; + range->maximum = ISX012_MAX_AUTOWB; + range->step = ISX012_STEP_AUTOWB; + range->default_value = ISX012_DEF_AUTOWB; + strncpy(range->name, + ISX012_NAME_AUTOWB, + sizeof(range->name)); + + break; + case V4L2_CID_GAMMA_CURVE: + range->type = ISX012_TYPE_GAMMACURVE; + range->minimum = ISX012_MIN_GAMMACURVE; + range->maximum = ISX012_MAX_GAMMACURVE; + range->step = ISX012_STEP_GAMMACURVE; + range->default_value = ISX012_DEF_GAMMACURVE; + strncpy(range->name, + ISX012_NAME_GAMMACURVE, + sizeof(range->name)); + + break; + + case V4L2_CID_EXPOSURE: + range->type = ISX012_TYPE_EXPOSURE; + range->minimum = ISX012_MIN_EXPOSURE; + range->maximum = ISX012_MAX_EXPOSURE; + range->step = ISX012_STEP_EXPOSURE; + range->default_value = ISX012_DEF_EXPOSURE; + strncpy(range->name, + ISX012_NAME_EXPOSURE, + sizeof(range->name)); + + break; + + case V4L2_CID_HFLIP: + range->type = ISX012_TYPE_HFLIP; + range->minimum = ISX012_MIN_HFLIP; + range->maximum = ISX012_MAX_HFLIP; + range->step = ISX012_STEP_HFLIP; + range->default_value = ISX012_DEF_HFLIP; + strncpy(range->name, + ISX012_NAME_HFLIP, + sizeof(range->name)); + + break; + + case V4L2_CID_VFLIP: + range->type = ISX012_TYPE_VFLIP; + range->minimum = ISX012_MIN_VFLIP; + range->maximum = ISX012_MAX_VFLIP; + range->step = ISX012_STEP_VFLIP; + range->default_value = ISX012_DEF_VFLIP; + strncpy(range->name, + ISX012_NAME_VFLIP, + sizeof(range->name)); + + break; + + case V4L2_CID_HFLIP_STILL: + range->type = ISX012_TYPE_HFLIP_STILL; + range->minimum = ISX012_MIN_HFLIP_STILL; + range->maximum = ISX012_MAX_HFLIP_STILL; + range->step = ISX012_STEP_HFLIP_STILL; + range->default_value = ISX012_DEF_HFLIP_STILL; + strncpy(range->name, + ISX012_NAME_HFLIP_STILL, + sizeof(range->name)); + + break; + + case V4L2_CID_VFLIP_STILL: + range->type = ISX012_TYPE_VFLIP_STILL; + range->minimum = ISX012_MIN_VFLIP_STILL; + range->maximum = ISX012_MAX_VFLIP_STILL; + range->step = ISX012_STEP_VFLIP_STILL; + range->default_value = ISX012_DEF_VFLIP_STILL; + strncpy(range->name, + ISX012_NAME_VFLIP_STILL, + sizeof(range->name)); + + break; + + case V4L2_CID_SHARPNESS: + range->type = ISX012_TYPE_SHARPNESS; + range->minimum = ISX012_MIN_SHARPNESS; + range->maximum = ISX012_MAX_SHARPNESS; + range->step = ISX012_STEP_SHARPNESS; + range->default_value = ISX012_DEF_SHARPNESS; + strncpy(range->name, + ISX012_NAME_SHARPNESS, + sizeof(range->name)); + + break; + + case V4L2_CID_COLOR_KILLER: + range->type = ISX012_TYPE_COLORKILLER; + range->minimum = ISX012_MIN_COLORKILLER; + range->maximum = ISX012_MAX_COLORKILLER; + range->step = ISX012_STEP_COLORKILLER; + range->default_value = ISX012_DEF_COLORKILLER; + strncpy(range->name, + ISX012_NAME_COLORKILLER, + sizeof(range->name)); + + break; + + case V4L2_CID_COLORFX: + range->type = ISX012_TYPE_COLOREFFECT; + range->minimum = ISX012_MIN_COLOREFFECT; + range->maximum = ISX012_MAX_COLOREFFECT; + range->step = ISX012_STEP_COLOREFFECT; + range->default_value = ISX012_DEF_COLOREFFECT; + strncpy(range->name, + ISX012_NAME_COLOREFFECT, + sizeof(range->name)); + + break; + + default: /* Unsupported control id */ + + return -EINVAL; + } + + break; + + case V4L2_CTRL_CLASS_CAMERA: + switch (range->id) + { + case V4L2_CID_EXPOSURE_AUTO: + range->type = ISX012_TYPE_EXPOSUREAUTO; + range->minimum = ISX012_MIN_EXPOSUREAUTO; + range->maximum = ISX012_MAX_EXPOSUREAUTO; + range->step = ISX012_STEP_EXPOSUREAUTO; + range->default_value = ISX012_DEF_EXPOSUREAUTO; + strncpy(range->name, + ISX012_NAME_EXPOSUREAUTO, + sizeof(range->name)); + + break; + + case V4L2_CID_EXPOSURE_ABSOLUTE: + range->type = ISX012_TYPE_EXPOSURETIME; + range->minimum = ISX012_MIN_EXPOSURETIME; + range->maximum = ISX012_MAX_EXPOSURETIME; + range->step = ISX012_STEP_EXPOSURETIME; + range->default_value = ISX012_DEF_EXPOSURETIME; + strncpy(range->name, + ISX012_NAME_EXPOSURETIME, + sizeof(range->name)); + + break; + + case V4L2_CID_EXPOSURE_METERING: + range->type = ISX012_TYPE_PHOTOMETRY; + range->minimum = ISX012_MIN_PHOTOMETRY; + range->maximum = ISX012_MAX_PHOTOMETRY; + range->step = ISX012_STEP_PHOTOMETRY; + range->default_value = ISX012_DEF_PHOTOMETRY; + strncpy(range->name, + ISX012_NAME_PHOTOMETRY, + sizeof(range->name)); + + break; + + case V4L2_CID_ZOOM_ABSOLUTE: + range->type = ISX012_TYPE_ZOOM; + range->minimum = ISX012_MIN_ZOOM; + range->maximum = ISX012_MAX_ZOOM; + range->step = ISX012_STEP_ZOOM; + range->default_value = ISX012_DEF_ZOOM; + strncpy(range->name, + ISX012_NAME_ZOOM, + sizeof(range->name)); + + break; + + case V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE: + range->type = ISX012_TYPE_PRESETWB; + range->minimum = ISX012_MIN_PRESETWB; + range->maximum = ISX012_MAX_PRESETWB; + range->step = ISX012_STEP_PRESETWB; + range->default_value = ISX012_DEF_PRESETWB; + strncpy(range->name, + ISX012_NAME_PRESETWB, + sizeof(range->name)); + + break; + + case V4L2_CID_WIDE_DYNAMIC_RANGE: + range->type = ISX012_TYPE_YGAMMA; + range->minimum = ISX012_MIN_YGAMMA; + range->maximum = ISX012_MAX_YGAMMA; + range->step = ISX012_STEP_YGAMMA; + range->default_value = ISX012_DEF_YGAMMA; + strncpy(range->name, + ISX012_NAME_YGAMMA, + sizeof(range->name)); + + break; + + case V4L2_CID_ISO_SENSITIVITY: + range->type = ISX012_TYPE_ISO; + range->minimum = ISX012_MIN_ISO; + range->maximum = ISX012_MAX_ISO; + range->step = ISX012_STEP_ISO; + range->default_value = ISX012_DEF_ISO; + strncpy(range->name, + ISX012_NAME_ISO, + sizeof(range->name)); + + break; + + case V4L2_CID_ISO_SENSITIVITY_AUTO: + range->type = ISX012_TYPE_ISOAUTO; + range->minimum = ISX012_MIN_ISOAUTO; + range->maximum = ISX012_MAX_ISOAUTO; + range->step = ISX012_STEP_ISOAUTO; + range->default_value = ISX012_DEF_ISOAUTO; + strncpy(range->name, + ISX012_NAME_ISOAUTO, + sizeof(range->name)); + + break; + + case V4L2_CID_3A_LOCK: + range->type = ISX012_TYPE_3ALOCK; + range->minimum = ISX012_MIN_3ALOCK; + range->maximum = ISX012_MAX_3ALOCK; + range->step = ISX012_STEP_3ALOCK; + range->default_value = ISX012_DEF_3ALOCK; + strncpy(range->name, + ISX012_NAME_3ALOCK, + sizeof(range->name)); + + break; + + default: /* Unsupported control id */ + + return -EINVAL; + } + + break; + + case V4L2_CTRL_CLASS_JPEG: + switch (range->id) + { + case V4L2_CID_JPEG_COMPRESSION_QUALITY: + range->type = ISX012_TYPE_JPGQUALITY; + range->minimum = ISX012_MIN_JPGQUALITY; + range->maximum = ISX012_MAX_JPGQUALITY; + range->step = ISX012_STEP_JPGQUALITY; + range->default_value = ISX012_DEF_JPGQUALITY; + strncpy(range->name, + ISX012_NAME_JPGQUALITY, + sizeof(range->name)); + + break; + + default: /* Unsupported control id */ + + return -EINVAL; + } + + break; + + default: /* Unsupported control class */ + + return -EINVAL; + } + + return OK; +} + +static int isx012_get_menu_of_ctrlval(FAR struct v4l2_querymenu *menu) +{ + if (menu == NULL) + { + return -EINVAL; + } + + switch (menu->ctrl_class) + { + case V4L2_CTRL_CLASS_USER: + switch (menu->id) + { + case V4L2_CID_COLORFX: + if (menu->index > ISX012_MAX_COLOREFFECT) + { + return -EINVAL; + } + + menu->value = g_isx012_supported_colorfx[menu->index].v4l2; + + break; + + default: /* Unsupported control id */ + + return -EINVAL; + } + + break; + + case V4L2_CTRL_CLASS_CAMERA: + switch (menu->id) + { + case V4L2_CID_EXPOSURE_METERING: + if (menu->index > ISX012_MAX_PHOTOMETRY) + { + return -EINVAL; + } + + menu->value = g_isx012_supported_photometry[menu->index].v4l2; + + break; + + case V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE: + if (menu->index > ISX012_MAX_PRESETWB) + { + return -EINVAL; + } + + menu->value = g_isx012_supported_presetwb[menu->index].v4l2; + + break; + + case V4L2_CID_ISO_SENSITIVITY: + if (menu->index > ISX012_MAX_ISO) + { + return -EINVAL; + } + + menu->value = g_isx012_supported_iso[menu->index].v4l2; + + break; + + default: /* Unsupported control id */ + + return -EINVAL; + } + + break; + + default: /* Unsupported control class */ + + return -EINVAL; + } + + return OK; +} + +static int isx012_get_ctrlval(uint16_t ctrl_class, + FAR struct v4l2_ext_control *control) +{ + FAR struct isx012_dev_s *priv = &g_isx012_private; + int16_t readvalue; + uint8_t cnt; + uint16_t read_src; + uint16_t *read_dst; + int ret = -EINVAL; + + if (control == NULL) + { + return -EINVAL; + } + + switch (ctrl_class) + { + case V4L2_CTRL_CLASS_USER: + switch (control->id) + { + case V4L2_CID_BRIGHTNESS: + control->value = isx012_getreg(priv, + ISX012_REG_BRIGHTNESS, + ISX012_SIZE_BRIGHTNESS); + break; + + case V4L2_CID_CONTRAST: + control->value = isx012_getreg(priv, + ISX012_REG_CONTRAST, + ISX012_SIZE_CONTRAST); + break; + + case V4L2_CID_SATURATION: + control->value = isx012_getreg(priv, + ISX012_REG_SATURATION, + ISX012_SIZE_SATURATION); + break; + + case V4L2_CID_HUE: + control->value = isx012_getreg(priv, + ISX012_REG_HUE, + ISX012_SIZE_HUE); + break; + + case V4L2_CID_AUTO_WHITE_BALANCE: + readvalue = isx012_getreg(priv, + ISX012_REG_AUTOWB, + ISX012_SIZE_AUTOWB); + + control->value = (~readvalue) & REGVAL_CPUEXT_BIT_AWBSTOP; + + break; + + case V4L2_CID_GAMMA_CURVE: + if (control->p_u16 == NULL) + { + return -EINVAL; + } + + read_src = ISX012_REG_GAMMACURVE; + read_dst = control->p_u16; + + for (cnt = 0; cnt < ISX012_ELEMS_GAMMACURVE; cnt++) + { + *read_dst = isx012_getreg(priv, + read_src, + ISX012_SIZE_GAMMACURVE); + read_src += ISX012_SIZE_GAMMACURVE; + read_dst++; + } + + break; + + case V4L2_CID_EXPOSURE: + control->value = isx012_getreg(priv, + ISX012_REG_EXPOSURE, + ISX012_SIZE_EXPOSURE); + break; + + case V4L2_CID_HFLIP: + readvalue = isx012_getreg(priv, + ISX012_REG_HFLIP, + ISX012_SIZE_HFLIP); + + if (readvalue & REGVAL_READVECT_BIT_H) + { + control->value = true; + } + else + { + control->value = false; + } + + break; + + case V4L2_CID_VFLIP: + readvalue = isx012_getreg(priv, + ISX012_REG_VFLIP, + ISX012_SIZE_VFLIP); + + if (readvalue & REGVAL_READVECT_BIT_V) + { + control->value = true; + } + else + { + control->value = false; + } + + break; + + case V4L2_CID_HFLIP_STILL: + readvalue = isx012_getreg(priv, + ISX012_REG_HFLIP_STILL, + ISX012_SIZE_HFLIP_STILL); + + if (readvalue & REGVAL_READVECT_BIT_H) + { + control->value = true; + } + else + { + control->value = false; + } + + break; + + case V4L2_CID_VFLIP_STILL: + readvalue = isx012_getreg(priv, + ISX012_REG_VFLIP_STILL, + ISX012_SIZE_VFLIP_STILL); + + if (readvalue & REGVAL_READVECT_BIT_V) + { + control->value = true; + } + else + { + control->value = false; + } + + break; + + case V4L2_CID_SHARPNESS: + control->value = isx012_getreg(priv, + ISX012_REG_SHARPNESS, + ISX012_SIZE_SHARPNESS); + break; + + case V4L2_CID_COLOR_KILLER: + readvalue = isx012_getreg(priv, + ISX012_REG_COLORKILLER, + ISX012_SIZE_COLORKILLER); + + if (readvalue == REGVAL_EFFECT_MONOTONE) + { + control->value = true; + } + else + { + control->value = false; + } + + break; + + case V4L2_CID_COLORFX: + readvalue = isx012_getreg(priv, + ISX012_REG_COLOREFFECT, + ISX012_SIZE_COLOREFFECT); + + for (cnt = 0; cnt <= ISX012_MAX_COLOREFFECT; cnt++) + { + if (g_isx012_supported_colorfx[cnt].regval == readvalue) + { + ret = OK; + break; + } + } + + if (ret != OK) + { + return ret; + } + + control->value = g_isx012_supported_colorfx[cnt].v4l2; + + break; + + default: /* Unsupported control id */ + + return -EINVAL; + } + + break; + + case V4L2_CTRL_CLASS_CAMERA: + switch (control->id) + { + case V4L2_CID_EXPOSURE_AUTO: + readvalue = isx012_getreg(priv, + ISX012_REG_EXPOSURETIME, + ISX012_SIZE_EXPOSURETIME); + + if (readvalue) + { + control->value = V4L2_EXPOSURE_MANUAL; + } + else + { + control->value = V4L2_EXPOSURE_AUTO; + } + + break; + + case V4L2_CID_EXPOSURE_ABSOLUTE: + control->value = isx012_getreg(priv, + ISX012_REG_EXPOSURETIME, + ISX012_SIZE_EXPOSURETIME); + + break; + + case V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE: + readvalue = isx012_getreg(priv, + ISX012_REG_PRESETWB, + ISX012_SIZE_PRESETWB); + + for (cnt = 0; cnt <= ISX012_MAX_PRESETWB; cnt++) + { + if (g_isx012_supported_presetwb[cnt].regval == readvalue) + { + ret = OK; + break; + } + } + + if (ret != OK) + { + return ret; + } + + control->value = g_isx012_supported_presetwb[cnt].v4l2; + + break; + + case V4L2_CID_WIDE_DYNAMIC_RANGE: + readvalue = isx012_getreg(priv, + ISX012_REG_YGAMMA, + ISX012_SIZE_YGAMMA); + if (readvalue) + { + control->value = false; + } + else + { + control->value = true; + } + + break; + + case V4L2_CID_ISO_SENSITIVITY: + readvalue = isx012_getreg(priv, + ISX012_REG_ISO, + ISX012_SIZE_ISO); + + for (cnt = 0; cnt <= ISX012_MAX_ISO; cnt++) + { + if (g_isx012_supported_iso[cnt].regval == readvalue) + { + ret = OK; + break; + } + } + + if (ret != OK) + { + return ret; + } + + control->value = g_isx012_supported_iso[cnt].v4l2; + + break; + + case V4L2_CID_ISO_SENSITIVITY_AUTO: + readvalue = isx012_getreg(priv, + ISX012_REG_ISOAUTO, + ISX012_SIZE_ISOAUTO); + if (readvalue == REGVAL_ISO_AUTO) + { + control->value = V4L2_ISO_SENSITIVITY_AUTO; + } + else + { + control->value = V4L2_ISO_SENSITIVITY_MANUAL; + } + break; + + case V4L2_CID_EXPOSURE_METERING: + readvalue = isx012_getreg(priv, + ISX012_REG_PHOTOMETRY, + ISX012_SIZE_PHOTOMETRY); + + for (cnt = 0; cnt <= ISX012_MAX_PHOTOMETRY; cnt++) + { + if (g_isx012_supported_photometry[cnt].regval == readvalue) + { + ret = OK; + break; + } + } + + if (ret != OK) + { + return ret; + } + + control->value = g_isx012_supported_photometry[cnt].v4l2; + + default: /* Unsupported control id */ + + return -EINVAL; + } + + break; + + case V4L2_CTRL_CLASS_JPEG: + switch (control->id) + { + case V4L2_CID_JPEG_COMPRESSION_QUALITY: + control->value = isx012_getreg(priv, + ISX012_REG_JPGQUALITY, + ISX012_SIZE_JPGQUALITY); + break; + + default: /* Unsupported control id */ + + return -EINVAL; + } + + break; + + default: /* Unsupported control class */ + + return -EINVAL; + } + + return OK; +} + +static int isx012_set_ctrlval(uint16_t ctrl_class, + FAR struct v4l2_ext_control *control) +{ + FAR struct isx012_dev_s *priv = &g_isx012_private; + int ret = -EINVAL; + uint8_t cnt; + uint16_t *write_src; + uint16_t write_dst; + uint16_t regval; + uint16_t exposure_time_lsb; + uint16_t exposure_time_msb; + + if (control == NULL) + { + return -EINVAL; + } + + switch (ctrl_class) + { + case V4L2_CTRL_CLASS_USER: + switch (control->id) + { + case V4L2_CID_BRIGHTNESS: + CHECK_RANGE(control->value, + ISX012_MIN_BRIGHTNESS, + ISX012_MAX_BRIGHTNESS, + ISX012_STEP_BRIGHTNESS); + + ret = isx012_putreg(priv, + ISX012_REG_BRIGHTNESS, + control->value, + ISX012_SIZE_BRIGHTNESS); + + break; + + case V4L2_CID_CONTRAST: + CHECK_RANGE(control->value, + ISX012_MIN_CONTRAST, + ISX012_MAX_CONTRAST, + ISX012_STEP_CONTRAST); + + ret = isx012_putreg(priv, + ISX012_REG_CONTRAST, + control->value, + ISX012_SIZE_CONTRAST); + + break; + + case V4L2_CID_SATURATION: + CHECK_RANGE(control->value, + ISX012_MIN_SATURATION, + ISX012_MAX_SATURATION, + ISX012_STEP_SATURATION); + + ret = isx012_putreg(priv, + ISX012_REG_SATURATION, + control->value, + ISX012_SIZE_SATURATION); + + break; + + case V4L2_CID_HUE: + CHECK_RANGE(control->value, + ISX012_MIN_HUE, + ISX012_MAX_HUE, + ISX012_STEP_HUE); + + ret = isx012_putreg(priv, + ISX012_REG_HUE, + control->value, + ISX012_SIZE_HUE); + + break; + + case V4L2_CID_AUTO_WHITE_BALANCE: + CHECK_RANGE(control->value, + ISX012_MIN_AUTOWB, + ISX012_MAX_AUTOWB, + ISX012_STEP_AUTOWB); + + regval = isx012_getreg(priv, + ISX012_REG_AUTOWB, + ISX012_SIZE_AUTOWB); + + if (control->value) + { + /* Because true means setting auto white balance + * turn off the stop bit + */ + + regval &= ~REGVAL_CPUEXT_BIT_AWBSTOP; + } + else + { + /* Because false means stopping auto white balance, + * turn on the stop bit. + */ + + regval |= REGVAL_CPUEXT_BIT_AWBSTOP; + } + + ret = isx012_putreg(priv, + ISX012_REG_AUTOWB, + regval, + ISX012_SIZE_AUTOWB); + + break; + + case V4L2_CID_GAMMA_CURVE: + if (control->p_u16 == NULL) + { + return -EINVAL; + } + + write_src = control->p_u16; + write_dst = ISX012_REG_GAMMACURVE; + + for (cnt = 0; cnt < ISX012_ELEMS_GAMMACURVE; cnt++) + { + CHECK_RANGE(*write_src, + ISX012_MIN_GAMMACURVE, + ISX012_MAX_GAMMACURVE, + ISX012_STEP_GAMMACURVE); + + ret = isx012_putreg(priv, + write_dst, + *write_src, + ISX012_SIZE_GAMMACURVE); + + write_src++; + write_dst += ISX012_SIZE_GAMMACURVE; + } + + break; + + case V4L2_CID_EXPOSURE: + CHECK_RANGE(control->value, + ISX012_MIN_EXPOSURE, + ISX012_MAX_EXPOSURE, + ISX012_STEP_EXPOSURE); + + ret = isx012_putreg(priv, + ISX012_REG_EXPOSURE, + control->value, + ISX012_SIZE_EXPOSURE); + + break; + + case V4L2_CID_HFLIP: + CHECK_RANGE(control->value, + ISX012_MIN_HFLIP, + ISX012_MAX_HFLIP, + ISX012_STEP_HFLIP); + + regval = isx012_getreg(priv, + ISX012_REG_HFLIP, + ISX012_SIZE_HFLIP); + + if (control->value) + { + regval |= REGVAL_READVECT_BIT_H; + } + else + { + regval &= ~REGVAL_READVECT_BIT_H; + } + + ret = isx012_putreg(priv, + ISX012_REG_HFLIP, + regval, + ISX012_SIZE_HFLIP); + + break; + + case V4L2_CID_VFLIP: + CHECK_RANGE(control->value, + ISX012_MIN_VFLIP, + ISX012_MAX_VFLIP, + ISX012_STEP_VFLIP); + + regval = isx012_getreg(priv, + ISX012_REG_VFLIP, + ISX012_SIZE_VFLIP); + + if (control->value) + { + regval |= REGVAL_READVECT_BIT_V; + } + else + { + regval &= ~REGVAL_READVECT_BIT_V; + } + + ret = isx012_putreg(priv, + ISX012_REG_VFLIP, + regval, + ISX012_SIZE_VFLIP); + + break; + + case V4L2_CID_HFLIP_STILL: + CHECK_RANGE(control->value, + ISX012_MIN_HFLIP_STILL, + ISX012_MAX_HFLIP_STILL, + ISX012_STEP_HFLIP_STILL); + + regval = isx012_getreg(priv, + ISX012_REG_HFLIP_STILL, + ISX012_SIZE_HFLIP_STILL); + + if (control->value) + { + regval |= REGVAL_READVECT_BIT_H; + } + else + { + regval &= ~REGVAL_READVECT_BIT_H; + } + + ret = isx012_putreg(priv, + ISX012_REG_HFLIP_STILL, + regval, + ISX012_SIZE_HFLIP_STILL); + + break; + + case V4L2_CID_VFLIP_STILL: + CHECK_RANGE(control->value, + ISX012_MIN_VFLIP_STILL, + ISX012_MAX_VFLIP_STILL, + ISX012_STEP_VFLIP_STILL); + + regval = isx012_getreg(priv, + ISX012_REG_VFLIP_STILL, + ISX012_SIZE_VFLIP_STILL); + + if (control->value) + { + regval |= REGVAL_READVECT_BIT_V; + } + else + { + regval &= ~REGVAL_READVECT_BIT_V; + } + + ret = isx012_putreg(priv, + ISX012_REG_VFLIP_STILL, + regval, + ISX012_SIZE_VFLIP_STILL); + + break; + + case V4L2_CID_SHARPNESS: + CHECK_RANGE(control->value, + ISX012_MIN_SHARPNESS, + ISX012_MAX_SHARPNESS, + ISX012_STEP_SHARPNESS); + + ret = isx012_putreg(priv, + ISX012_REG_SHARPNESS, + control->value, + ISX012_SIZE_SHARPNESS); + + break; + + case V4L2_CID_COLOR_KILLER: + CHECK_RANGE(control->value, + ISX012_MIN_COLORKILLER, + ISX012_MAX_COLORKILLER, + ISX012_STEP_COLORKILLER); + + if (control->value) + { + regval = REGVAL_EFFECT_MONOTONE; + } + else + { + regval = REGVAL_EFFECT_NONE; + } + + ret = isx012_putreg(priv, + ISX012_REG_COLORKILLER, + regval, + ISX012_SIZE_COLORKILLER); + + break; + + case V4L2_CID_COLORFX: + for (cnt = 0; cnt <= ISX012_MAX_COLOREFFECT; cnt++) + { + if (g_isx012_supported_colorfx[cnt].v4l2 == control->value) + { + ret = OK; + break; + } + } + + if (ret != OK) + { + return ret; + } + + ret = isx012_putreg(priv, + ISX012_REG_COLOREFFECT, + g_isx012_supported_colorfx[cnt].regval, + ISX012_SIZE_COLOREFFECT); + + break; + + default: /* Unsupported control id */ + + return -EINVAL; + } + + break; + + case V4L2_CTRL_CLASS_CAMERA: + switch (control->id) + { + case V4L2_CID_EXPOSURE_AUTO: + CHECK_RANGE(control->value, + ISX012_MIN_EXPOSUREAUTO, + ISX012_MAX_EXPOSUREAUTO, + ISX012_STEP_EXPOSUREAUTO); + + if (control->value == V4L2_EXPOSURE_AUTO) + { + /* Register is the same as V4L2_CID_EXPOSURE_ABSOLUTE. + * If this register value = REGVAL_EXPOSURETIME_AUTO(=0), + * it means auto. Otherwise, it means manual. + */ + + ret = isx012_putreg(priv, + ISX012_REG_EXPOSURETIME, + REGVAL_EXPOSURETIME_AUTO, + ISX012_SIZE_EXPOSURETIME); + } + else + { + /* In manual case, read current value of register which + * value adjusted automatically by ISX012 HW is set to. + * It has 32bits length which is composed of LSB 16bits + * and MSB 16bits. + */ + + exposure_time_lsb = isx012_getreg + (priv, + ISX012_REG_EXPOSUREAUTOVALUE_LSB, + ISX012_SIZE_EXPOSUREAUTOVALUE); + exposure_time_msb = isx012_getreg + (priv, + ISX012_REG_EXPOSUREAUTOVALUE_MSB, + ISX012_SIZE_EXPOSUREAUTOVALUE); + + /* Register value adjusted automatically by ISX012 HW + * has the different unit from manual value register. + * automatic value register : 1 microsec unit + * manual value register : 100 microsec unit + */ + + regval = (uint16_t)(((exposure_time_msb << 16) + | exposure_time_lsb) + / ISX012_UNIT_EXPOSURETIME_US); + ret = isx012_putreg(priv, + ISX012_REG_EXPOSURETIME, + regval, + ISX012_SIZE_EXPOSURETIME); + } + + break; + + case V4L2_CID_EXPOSURE_ABSOLUTE: + CHECK_RANGE(control->value, + ISX012_MIN_EXPOSURETIME, + ISX012_MAX_EXPOSURETIME, + ISX012_STEP_EXPOSURETIME); + + ret = isx012_putreg(priv, + ISX012_REG_EXPOSURETIME, + control->value, + ISX012_SIZE_EXPOSURETIME); + break; + + case V4L2_CID_WIDE_DYNAMIC_RANGE: + CHECK_RANGE(control->value, + ISX012_MIN_YGAMMA, + ISX012_MAX_YGAMMA, + ISX012_STEP_YGAMMA); + + if (control->value) + { + regval = REGVAL_YGAMMA_AUTO; + } + else + { + regval = REGVAL_YGAMMA_OFF; + } + + ret = isx012_putreg(priv, + ISX012_REG_YGAMMA, + regval, + ISX012_SIZE_YGAMMA); + + break; + + case V4L2_CID_ISO_SENSITIVITY: + for (cnt = 0; cnt <= ISX012_MAX_ISO; cnt++) + { + if (g_isx012_supported_iso[cnt].v4l2 + == control->value) + { + ret = OK; + break; + } + } + + if (ret != OK) + { + return ret; + } + + ret = isx012_putreg(priv, + ISX012_REG_ISO, + g_isx012_supported_iso[cnt].regval, + ISX012_SIZE_ISO); + + break; + + case V4L2_CID_ISO_SENSITIVITY_AUTO: + CHECK_RANGE(control->value, + ISX012_MIN_ISOAUTO, + ISX012_MAX_ISOAUTO, + ISX012_STEP_ISOAUTO); + + if (control->value == V4L2_ISO_SENSITIVITY_AUTO) + { + ret = isx012_putreg(priv, + ISX012_REG_ISOAUTO, + REGVAL_ISO_AUTO, + ISX012_SIZE_ISOAUTO); + } + else + { + /* In manual case, read auto adjust value and set it */ + + regval = isx012_getreg(priv, + ISX012_REG_ISOAUTOVALUE, + ISX012_SIZE_ISOAUTOVALUE); + ret = isx012_putreg(priv, + ISX012_REG_ISO, + regval, + ISX012_SIZE_ISO); + } + + break; + + case V4L2_CID_EXPOSURE_METERING: + for (cnt = 0; cnt <= ISX012_MAX_PHOTOMETRY; cnt++) + { + if (g_isx012_supported_photometry[cnt].v4l2 + == control->value) + { + ret = OK; + break; + } + } + + if (ret != OK) + { + return ret; + } + + ret = isx012_putreg(priv, + ISX012_REG_PHOTOMETRY, + g_isx012_supported_photometry[cnt].regval, + ISX012_SIZE_PHOTOMETRY); + + break; + + case V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE: + for (cnt = 0; cnt <= ISX012_MAX_PRESETWB; cnt++) + { + if (g_isx012_supported_presetwb[cnt].v4l2 == control->value) + { + ret = OK; + break; + } + } + + if (ret != OK) + { + return ret; + } + + ret = isx012_putreg(priv, + ISX012_REG_PRESETWB, + g_isx012_supported_presetwb[cnt].regval, + ISX012_SIZE_PRESETWB); + + break; + + case V4L2_CID_3A_LOCK: + CHECK_RANGE(control->value, + ISX012_MIN_3ALOCK, + ISX012_MAX_3ALOCK, + ISX012_STEP_3ALOCK); + + regval = 0; + + if ((control->value & V4L2_LOCK_EXPOSURE) + == V4L2_LOCK_EXPOSURE) + { + regval |= REGVAL_CPUEXT_BIT_AESTOP; + } + + if ((control->value & V4L2_LOCK_WHITE_BALANCE) + == V4L2_LOCK_WHITE_BALANCE) + { + regval |= REGVAL_CPUEXT_BIT_AWBSTOP; + } + + ret = isx012_putreg(priv, + ISX012_REG_3ALOCK, + regval, + ISX012_SIZE_3ALOCK); + + break; + + default: /* Unsupported control id */ + + return -EINVAL; + } + + break; + + case V4L2_CTRL_CLASS_JPEG: + switch (control->id) + { + case V4L2_CID_JPEG_COMPRESSION_QUALITY: + CHECK_RANGE(control->value, + ISX012_MIN_JPGQUALITY, + ISX012_MAX_JPGQUALITY, + ISX012_STEP_JPGQUALITY); + + ret = isx012_putreg(priv, + ISX012_REG_JPGQUALITY, + control->value, + ISX012_SIZE_JPGQUALITY); + break; + + default: /* Unsupported control id */ + + return -EINVAL; + } + + break; + + default: /* Unsupported control class */ + + return -EINVAL; + } + + return ret; +} + +static int isx012_refresh(void) +{ + int ret = 0; + uint8_t mask_num; + int i; + FAR struct isx012_dev_s *priv = &g_isx012_private; + + if (priv->state != STATE_ISX012_ACTIVE) + { + /* In inactive state, setting is reflected in activated timing */ + + return OK; + } + + if (priv->mode != REGVAL_MODESEL_MON) + { + return -EPERM; + } + + /* Set MONI_REFRESH */ + + isx012_putreg(priv, INTCLR0, CM_CHANGED_STS, 1); + ret = isx012_putreg(priv, MONI_REFRESH, 1, 1); + if (ret < 0) + { + return ret; + } + + /* Wait CM_CHANGED */ + + ret = isx012_chk_int_state(priv, CM_CHANGED_STS, + CAMERA_MODE_DELAY_TIME, + CAMERA_MODE_WAIT_TIME, + CAMERA_MODE_TIMEOUT); + if (ret != 0) + { + return ret; + } + + /* Invalid frame skip */ + + isx012_putreg(priv, INTCLR0, VINT_STS, 1); + mask_num = isx012_getreg(priv, RO_MASK_NUM, sizeof(mask_num)); + for (i = 0; i < mask_num; i++) + { + /* Wait Next VINT */ + + ret = isx012_chk_int_state(priv, VINT_STS, VINT_DELAY_TIME, + VINT_WAIT_TIME, VINT_TIMEOUT); + if (ret != 0) + { + return ret; + } + } + + return OK; +} + +static int isx012_set_shd(FAR isx012_dev_t *priv) +{ + int ret; + int unit_cnt; + int size_cnt; + + /* At first, disable CXC and SHD */ + + ret = isx012_putreg(priv, SHD_EN, 0x50, 1); + if (ret < 0) + { + imagererr("isx012_putreg(disable CXC/SHD) failed: %d\n", ret); + return ret; + } + + /* Set CXC Validity */ + + ret = isx012_putreg(priv, CXC_VALID, 0x8282, 2); + if (ret < 0) + { + imagererr("isx012_putreg(CXC_VALID) failed: %d\n", ret); + return ret; + } + + /* Set CXC R Gb data */ + + for (unit_cnt = 0; unit_cnt < CXC_RGB_DATA_UNIT_NUM; unit_cnt++) + { + for (size_cnt = 0; size_cnt < CXC_RGB_DATA_UNIT_SIZE; size_cnt++) + { + ret = isx012_putreg(priv, + CXC_RGB_UNIT(unit_cnt, size_cnt), + g_isx012_cxc_rgb_data[unit_cnt][size_cnt], + 1); + if (ret < 0) + { + imagererr("isx012_putreg(CXC R Gb) failed: %d\n", ret); + return ret; + } + } + } + + /* Set CXC G Rb data */ + + for (unit_cnt = 0; unit_cnt < CXC_GRB_DATA_UNIT_NUM; unit_cnt++) + { + for (size_cnt = 0; size_cnt < CXC_GRB_DATA_UNIT_SIZE; size_cnt++) + { + ret = isx012_putreg(priv, + CXC_GRB_UNIT(unit_cnt, size_cnt), + g_isx012_cxc_grb_data[unit_cnt][size_cnt], + 1); + if (ret < 0) + { + imagererr("isx012_putreg(CXC G Rb) failed: %d\n", ret); + return ret; + } + } + } + + /* Set SHD Validity */ + + ret = isx012_putreg(priv, SHD_VALID, 0x9191, 2); + if (ret < 0) + { + imagererr("isx012_putreg(SHD_VALID) failed: %d\n", ret); + return ret; + } + + /* Set SHD R Gb data */ + + for (unit_cnt = 0; unit_cnt < SHD_RGB_DATA_UNIT_NUM; unit_cnt++) + { + for (size_cnt = 0; size_cnt < SHD_RGB_DATA_UNIT_SIZE; size_cnt++) + { + ret = isx012_putreg(priv, + SHD_RGB_UNIT(unit_cnt, size_cnt), + g_isx012_shd_rgb_data[unit_cnt][size_cnt], + 1); + if (ret < 0) + { + imagererr("isx012_putreg(SHD R Gb) failed: %d\n", ret); + return ret; + } + } + } + + /* Set SHD G Rb data */ + + for (unit_cnt = 0; unit_cnt < SHD_GRB_DATA_UNIT_NUM; unit_cnt++) + { + for (size_cnt = 0; size_cnt < SHD_GRB_DATA_UNIT_SIZE; size_cnt++) + { + ret = isx012_putreg(priv, + SHD_GRB_UNIT(unit_cnt, size_cnt), + g_isx012_shd_grb_data[unit_cnt][size_cnt], + 1); + if (ret < 0) + { + imagererr("isx012_putreg(SHD G Rb) failed: %d\n", ret); + return ret; + } + } + } + + /* Set SHD R1 data */ + + for (unit_cnt = 0; unit_cnt < SHD_R1_DATA_UNIT_NUM; unit_cnt++) + { + for (size_cnt = 0; size_cnt < SHD_R1_DATA_UNIT_SIZE; size_cnt++) + { + ret = isx012_putreg(priv, + SHD_R1_UNIT(unit_cnt, size_cnt), + g_isx012_shd_r1_data[unit_cnt][size_cnt], + 1); + if (ret < 0) + { + imagererr("isx012_putreg(SHD R1) failed: %d\n", ret); + return ret; + } + } + } + + /* Set SHD R2 data */ + + for (unit_cnt = 0; unit_cnt < SHD_R2_DATA_UNIT_NUM; unit_cnt++) + { + for (size_cnt = 0; size_cnt < SHD_R2_DATA_UNIT_SIZE; size_cnt++) + { + ret = isx012_putreg(priv, + SHD_R2_UNIT(unit_cnt, size_cnt), + g_isx012_shd_r2_data[unit_cnt][size_cnt], + 1); + if (ret < 0) + { + imagererr("isx012_putreg(SHD R2) failed: %d\n", ret); + return ret; + } + } + } + + /* Set SHD B2 data */ + + for (unit_cnt = 0; unit_cnt < SHD_B2_DATA_UNIT_NUM; unit_cnt++) + { + for (size_cnt = 0; size_cnt < SHD_B2_DATA_UNIT_SIZE; size_cnt++) + { + ret = isx012_putreg(priv, + SHD_B2_UNIT(unit_cnt, size_cnt), + g_isx012_shd_b2_data[unit_cnt][size_cnt], + 1); + if (ret < 0) + { + imagererr("isx012_putreg(SHD B2) failed: %d\n", ret); + return ret; + } + } + } + + /* Set SHD thresholds data */ + + ret = isx012_putreglist(priv, g_isx012_shd_thresholds, + ISX012_SHD_THRESHOLDS_NENTRIES); + if (ret < 0) + { + imagererr("isx012_putreglist failed(SHD thresholds): %d\n", ret); + board_isx012_set_reset(); + return ret; + } + + /* Set SHD white balance data */ + + ret = isx012_putreglist(priv, g_isx012_shd_wb, ISX012_SHD_WB_NENTRIES); + if (ret < 0) + { + imagererr("isx012_putreglist(SHD white balance) failed: %d\n", ret); + board_isx012_set_reset(); + return ret; + } + + /* Enable CXC and SHD */ + + ret = isx012_putreg(priv, SHD_EN, 0x57, 1); + if (ret < 0) + { + imagererr("isx012_putreg(enable CXC/SHD) failed: %d\n", ret); + return ret; + } + + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ +int isx012_register(FAR struct i2c_master_s *i2c) +{ + FAR struct isx012_dev_s *priv = &g_isx012_private; + + /* Save i2c information */ + + priv->i2c = i2c; + priv->i2c_addr = ISX012_I2C_SLV_ADDR; + priv->i2c_freq = I2CFREQ_STANDARD; + + /* Initialize other information */ + + priv->state = STATE_ISX012_POWEROFF; + + return OK; +} + +int isx012_unregister(void) +{ + /* no procedure */ + + return OK; +} + +FAR struct video_devops_s *isx012_initialize(void) +{ + /* return address of video operations variable */ + + return &g_isx012_video_devops; +} + +int isx012_uninitialize(void) +{ + /* No procedure */ + + return OK; +} diff --git a/include/nuttx/video/isx012.h b/include/nuttx/video/isx012.h new file mode 100644 index 0000000000..84d83b0f0d --- /dev/null +++ b/include/nuttx/video/isx012.h @@ -0,0 +1,74 @@ +/**************************************************************************** + * include/nuttx/video/isx012.h + * + * Copyright 2018 Sony Semiconductor Solutions Corporation + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name of Sony Semiconductor Solutions Corporation nor + * the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_VIDEO_ISX012_H +#define __INCLUDE_NUTTX_VIDEO_ISX012_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ +FAR struct video_devops_s *isx012_initialize(void); +int isx012_uninitialize(void); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __INCLUDE_NUTTX_VIDEO_ISX012_H */ diff --git a/include/nuttx/video/isx012_range.h b/include/nuttx/video/isx012_range.h new file mode 100644 index 0000000000..bba8607ef5 --- /dev/null +++ b/include/nuttx/video/isx012_range.h @@ -0,0 +1,338 @@ +/**************************************************************************** + * drivers/video/isx012_range.h + * + * Copyright 2018 Sony Semiconductor Solutions Corporation + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name of Sony Semiconductor Solutions Corporation nor + * the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ +#include "isx012_reg.h" + +#ifndef __DRIVERS_VIDEO_ISX012_RANGE_H +#define __DRIVERS_VIDEO_ISX012_RANGE_H + +/* Definition for control brightness */ + +#define ISX012_TYPE_BRIGHTNESS V4L2_CTRL_TYPE_INTEGER +#define ISX012_NAME_BRIGHTNESS "Brightness" +#define ISX012_DEF_BRIGHTNESS (0) +#define ISX012_MIN_BRIGHTNESS (-128) +#define ISX012_MAX_BRIGHTNESS (127) +#define ISX012_STEP_BRIGHTNESS (1) +#define ISX012_REG_BRIGHTNESS UIBRIGHTNESS +#define ISX012_SIZE_BRIGHTNESS (1) + +/* Definition for control contrast */ + +#define ISX012_TYPE_CONTRAST V4L2_CTRL_TYPE_U8FIXEDPOINT_Q7 +#define ISX012_NAME_CONTRAST "Contrast" +#define ISX012_DEF_CONTRAST (0x80) +#define ISX012_MIN_CONTRAST (0x00) +#define ISX012_MAX_CONTRAST (0xFF) +#define ISX012_STEP_CONTRAST (1) +#define ISX012_REG_CONTRAST UICONTRAST +#define ISX012_SIZE_CONTRAST (1) + +/* Definition for control saturation */ + +#define ISX012_TYPE_SATURATION V4L2_CTRL_TYPE_INTEGER +#define ISX012_NAME_SATURATION "Saturation" +#define ISX012_DEF_SATURATION (0) +#define ISX012_MIN_SATURATION (0) +#define ISX012_MAX_SATURATION (255) +#define ISX012_STEP_SATURATION (1) +#define ISX012_REG_SATURATION UISATURATION_TYPE1 +#define ISX012_SIZE_SATURATION (1) + +/* Definition for control hue */ + +#define ISX012_TYPE_HUE V4L2_CTRL_TYPE_INTEGER +#define ISX012_NAME_HUE "Hue" +#define ISX012_DEF_HUE (0) +#define ISX012_MIN_HUE (0) +#define ISX012_MAX_HUE (255) +#define ISX012_STEP_HUE (1) +#define ISX012_REG_HUE UIHUE_TYPE1 +#define ISX012_SIZE_HUE (1) + +/* Definition for control auto white balance */ + +#define ISX012_TYPE_AUTOWB V4L2_CTRL_TYPE_BOOLEAN +#define ISX012_NAME_AUTOWB "Automatic white balance" +#define ISX012_DEF_AUTOWB true +#define ISX012_MIN_AUTOWB false +#define ISX012_MAX_AUTOWB true +#define ISX012_STEP_AUTOWB (1) +#define ISX012_REG_AUTOWB CPUEXT +#define ISX012_SIZE_AUTOWB (1) + +/* Definition for control red balance */ + +#define ISX012_TYPE_REDBALANCE V4L2_CTRL_TYPE_INTEGER +#define ISX012_NAME_REDBALANCE "Red balance" +#define ISX012_DEF_REDBALANCE (0) +#define ISX012_MIN_REDBALANCE (0) +#define ISX012_MAX_REDBALANCE (65535) +#define ISX012_STEP_REDBALANCE (1) +#define ISX012_REG_REDBALANCE RATIO_R_AUTO +#define ISX012_SIZE_REDBALANCE (2) + +/* Definition for control blue balance */ + +#define ISX012_TYPE_BLUEBALANCE V4L2_CTRL_TYPE_INTEGER +#define ISX012_NAME_BLUEBALANCE "Red balance" +#define ISX012_DEF_BLUEBALANCE (0) +#define ISX012_MIN_BLUEBALANCE (0) +#define ISX012_MAX_BLUEBALANCE (65535) +#define ISX012_STEP_BLUEBALANCE (1) +#define ISX012_REG_BLUEBALANCE RATIO_B_AUTO +#define ISX012_SIZE_BLUEBALANCE (2) + +/* Definition for control gamma curve */ + +#define ISX012_TYPE_GAMMACURVE V4L2_CTRL_TYPE_U16 +#define ISX012_NAME_GAMMACURVE "Gamma adjustment(curve)" +#define ISX012_DEF_GAMMACURVE (0) +#define ISX012_MIN_GAMMACURVE (0) +#define ISX012_MAX_GAMMACURVE (511) +#define ISX012_STEP_GAMMACURVE (1) +#define ISX012_ELEMSIZE_GAMMACURVE (1) +#define ISX012_ELEMS_GAMMACURVE (19) +#define ISX012_REG_GAMMACURVE GAMMA_BASE +#define ISX012_SIZE_GAMMACURVE (2) + +/* Definition for control exposure value */ + +#define ISX012_TYPE_EXPOSURE V4L2_CTRL_TYPE_INTEGER_TIMES_3 +#define ISX012_NAME_EXPOSURE "Exposure value" +#define ISX012_DEF_EXPOSURE (0) +#define ISX012_MIN_EXPOSURE (-6) +#define ISX012_MAX_EXPOSURE (6) +#define ISX012_STEP_EXPOSURE (1) +#define ISX012_REG_EXPOSURE EVSEL +#define ISX012_SIZE_EXPOSURE (1) + +/* Definition for control horizontal mirroring(V4L2_BUF_TYPE_VIDEO_CAPTURE) */ + +#define ISX012_TYPE_HFLIP V4L2_CTRL_TYPE_BOOLEAN +#define ISX012_NAME_HFLIP "Mirror horizontally(VIDEO)" +#define ISX012_DEF_HFLIP false +#define ISX012_MIN_HFLIP false +#define ISX012_MAX_HFLIP true +#define ISX012_STEP_HFLIP (1) +#define ISX012_REG_HFLIP READVECT_MONI +#define ISX012_SIZE_HFLIP (1) + +/* Definition for control vertical mirroring(V4L2_BUF_TYPE_VIDEO_CAPTURE) */ + +#define ISX012_TYPE_VFLIP V4L2_CTRL_TYPE_BOOLEAN +#define ISX012_NAME_VFLIP "Mirror vertically(VIDEO)" +#define ISX012_DEF_VFLIP false +#define ISX012_MIN_VFLIP false +#define ISX012_MAX_VFLIP true +#define ISX012_STEP_VFLIP (1) +#define ISX012_REG_VFLIP READVECT_MONI +#define ISX012_SIZE_VFLIP (1) + +/* Definition for control horizontal mirroring(V4L2_BUF_TYPE_STILL_CAPTURE) */ + +#define ISX012_TYPE_HFLIP_STILL V4L2_CTRL_TYPE_BOOLEAN +#define ISX012_NAME_HFLIP_STILL "Mirror horizontally(STILL)" +#define ISX012_DEF_HFLIP_STILL false +#define ISX012_MIN_HFLIP_STILL false +#define ISX012_MAX_HFLIP_STILL true +#define ISX012_STEP_HFLIP_STILL (1) +#define ISX012_REG_HFLIP_STILL READVECT_CAP +#define ISX012_SIZE_HFLIP_STILL (1) + +/* Definition for control vertical mirroring(V4L2_BUF_TYPE_STILL_CAPTURE) */ + +#define ISX012_TYPE_VFLIP_STILL V4L2_CTRL_TYPE_BOOLEAN +#define ISX012_NAME_VFLIP_STILL "Mirror vertically(STILL)" +#define ISX012_DEF_VFLIP_STILL false +#define ISX012_MIN_VFLIP_STILL false +#define ISX012_MAX_VFLIP_STILL true +#define ISX012_STEP_VFLIP_STILL (1) +#define ISX012_REG_VFLIP_STILL READVECT_CAP +#define ISX012_SIZE_VFLIP_STILL (1) + +/* Definition for control sharpness */ + +#define ISX012_TYPE_SHARPNESS V4L2_CTRL_TYPE_INTEGER +#define ISX012_NAME_SHARPNESS "Sharpness" +#define ISX012_DEF_SHARPNESS (0) +#define ISX012_MIN_SHARPNESS (0) +#define ISX012_MAX_SHARPNESS (255) +#define ISX012_STEP_SHARPNESS (1) +#define ISX012_REG_SHARPNESS UISHARPNESS_POS_TYPE1 +#define ISX012_SIZE_SHARPNESS (1) + +/* Definition for control color killer */ + +#define ISX012_TYPE_COLORKILLER V4L2_CTRL_TYPE_BOOLEAN +#define ISX012_NAME_COLORKILLER "Color killer" +#define ISX012_DEF_COLORKILLER false +#define ISX012_MIN_COLORKILLER false +#define ISX012_MAX_COLORKILLER true +#define ISX012_STEP_COLORKILLER (1) +#define ISX012_REG_COLORKILLER FMODE +#define ISX012_SIZE_COLORKILLER (1) + +/* Definition for control color effect */ + +#define ISX012_TYPE_COLOREFFECT V4L2_CTRL_TYPE_INTEGER_MENU +#define ISX012_NAME_COLOREFFECT "Color effect" +#define ISX012_DEF_COLOREFFECT V4L2_COLORFX_NONE +#define ISX012_MIN_COLOREFFECT (0) +#define ISX012_MAX_COLOREFFECT (6) +#define ISX012_STEP_COLOREFFECT (1) +#define ISX012_REG_COLOREFFECT FMODE +#define ISX012_SIZE_COLOREFFECT (1) + +/* Definition for control auto exposure */ + +#define ISX012_TYPE_EXPOSUREAUTO V4L2_CTRL_TYPE_INTEGER +#define ISX012_NAME_EXPOSUREAUTO "Auto Exposure" +#define ISX012_DEF_EXPOSUREAUTO (0) +#define ISX012_MIN_EXPOSUREAUTO (0) +#define ISX012_MAX_EXPOSUREAUTO (1) +#define ISX012_STEP_EXPOSUREAUTO (1) + +#define ISX012_REG_EXPOSUREAUTOVALUE_LSB SHT_TIME_AUTO_L +#define ISX012_REG_EXPOSUREAUTOVALUE_MSB SHT_TIME_AUTO_H +#define ISX012_SIZE_EXPOSUREAUTOVALUE (2) + +/* Definition for control exposure time */ + +#define ISX012_TYPE_EXPOSURETIME V4L2_CTRL_TYPE_INTEGER +#define ISX012_NAME_EXPOSURETIME "Exposure time(usec)" +#define ISX012_DEF_EXPOSURETIME (0) +#define ISX012_MIN_EXPOSURETIME (1) +#define ISX012_MAX_EXPOSURETIME (10000) +#define ISX012_STEP_EXPOSURETIME (1) +#define ISX012_REG_EXPOSURETIME SHT_PREMODE_TYPE1 +#define ISX012_SIZE_EXPOSURETIME (2) + +#define ISX012_UNIT_EXPOSURETIME_US (100) + +/* Definition for control photometry */ + +#define ISX012_TYPE_PHOTOMETRY V4L2_CTRL_TYPE_INTEGER_MENU +#define ISX012_NAME_PHOTOMETRY "Photometry" +#define ISX012_DEF_PHOTOMETRY V4L2_EXPOSURE_METERING_AVERAGE +#define ISX012_MIN_PHOTOMETRY (0) +#define ISX012_MAX_PHOTOMETRY (3) +#define ISX012_STEP_PHOTOMETRY (1) +#define ISX012_REG_PHOTOMETRY AE_SUB_SN1 +#define ISX012_SIZE_PHOTOMETRY (1) + +/* Definition for control zoom */ + +#define ISX012_TYPE_ZOOM V4L2_CTRL_TYPE_U16FIXEDPOINT_Q8 +#define ISX012_NAME_ZOOM "Zoom" +#define ISX012_DEF_ZOOM (0x0100) +#define ISX012_MIN_ZOOM (0x0100) +#define ISX012_MAX_ZOOM (0x1000) +#define ISX012_STEP_ZOOM (1) +#define ISX012_REG_ZOOM EZOOM_MAG +#define ISX012_SIZE_ZOOM (2) + +/* Definition for control preset white balance */ + +#define ISX012_TYPE_PRESETWB V4L2_CTRL_TYPE_INTEGER_MENU +#define ISX012_NAME_PRESETWB "Preset white balance" +#define ISX012_DEF_PRESETWB V4L2_WHITE_BALANCE_AUTO +#define ISX012_MIN_PRESETWB (0) +#define ISX012_MAX_PRESETWB (5) +#define ISX012_STEP_PRESETWB (1) +#define ISX012_REG_PRESETWB AWB_SN1 +#define ISX012_SIZE_PRESETWB (2) + +/* Definition for control YGAMMA adujust */ + +#define ISX012_TYPE_YGAMMA V4L2_CTRL_TYPE_BOOLEAN +#define ISX012_NAME_YGAMMA "Wide dynamic range" +#define ISX012_DEF_YGAMMA (false) +#define ISX012_MIN_YGAMMA (false) +#define ISX012_MAX_YGAMMA (true) +#define ISX012_STEP_YGAMMA (1) +#define ISX012_REG_YGAMMA YGAMMA_MODE +#define ISX012_SIZE_YGAMMA (1) + +/* Definition for control ISO sensitivity */ + +#define ISX012_TYPE_ISO V4L2_CTRL_TYPE_INTEGER_MENU +#define ISX012_NAME_ISO "ISO sensitivity" +#define ISX012_DEF_ISO (0) +#define ISX012_MIN_ISO (0) +#define ISX012_MAX_ISO (18) +#define ISX012_STEP_ISO (1) +#define ISX012_REG_ISO ISO_TYPE1 +#define ISX012_SIZE_ISO (1) + +/* Definition for control ISO automatic */ + +#define ISX012_TYPE_ISOAUTO V4L2_CTRL_TYPE_INTEGER_MENU +#define ISX012_NAME_ISOAUTO "Automatic ISO sensitivity" +#define ISX012_DEF_ISOAUTO (false) +#define ISX012_MIN_ISOAUTO (0) +#define ISX012_MAX_ISOAUTO (1) +#define ISX012_STEP_ISOAUTO (1) +#define ISX012_REG_ISOAUTO ISO_TYPE1 +#define ISX012_SIZE_ISOAUTO (1) +#define ISX012_REG_ISOAUTOVALUE ISOSENS_OUT +#define ISX012_SIZE_ISOAUTOVALUE (1) + +/* Definition for control 3A lock */ + +#define ISX012_TYPE_3ALOCK V4L2_CTRL_TYPE_BITMASK +#define ISX012_NAME_3ALOCK "Lock AWB/AE" +#define ISX012_DEF_3ALOCK (0) +#define ISX012_MIN_3ALOCK (0) +#define ISX012_MAX_3ALOCK (3) +#define ISX012_STEP_3ALOCK (1) +#define ISX012_REG_3ALOCK CPUEXT +#define ISX012_SIZE_3ALOCK (1) + +/* Definition for control JPEG compression quality */ + +#define ISX012_TYPE_JPGQUALITY V4L2_CTRL_TYPE_INTEGER +#define ISX012_NAME_JPGQUALITY "JPEG compression quality" +#define ISX012_DEF_JPGQUALITY (75) +#define ISX012_MIN_JPGQUALITY (1) +#define ISX012_MAX_JPGQUALITY (100) +#define ISX012_STEP_JPGQUALITY (1) +#define ISX012_REG_JPGQUALITY INT_QLTY2 +#define ISX012_SIZE_JPGQUALITY (1) + +#endif /* __DRIVERS_VIDEO_ISX012_RANGE_H */ diff --git a/include/nuttx/video/isx012_reg.h b/include/nuttx/video/isx012_reg.h new file mode 100644 index 0000000000..15bd1a0a21 --- /dev/null +++ b/include/nuttx/video/isx012_reg.h @@ -0,0 +1,1392 @@ +/**************************************************************************** + * drivers/video/isx012_reg.h + * + * Copyright 2018 Sony Semiconductor Solutions Corporation + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name of Sony Semiconductor Solutions Corporation nor + * the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#ifndef __DRIVERS_VIDEO_ISX012_REG_H +#define __DRIVERS_VIDEO_ISX012_REG_H + +#define ISX012_I2C_SLV_ADDR (0x1A) + +/* I2C BASE ADDRESS */ + +#define USERCTRL_BASE (0x0000) +#define POST_VIF_BASE (0x1E00) +#define CPUCONF_BASE (0x5000) +#define CTRL_BASE (0x5200) +#define SENSMIPI_BASE (0x5C00) +#define AE_BASE (0x5E00) +#define AWB_BASE (0x6200) +#define AF_BASE (0x6600) +#define ADJ_BASE (0x6800) +#define MODE_BASE (0x6A00) +#define PICT_BASE (0x6C00) +#define GAMMA_BASE (0x7000) +#define JPEG_BASE (0x7800) +#define AUTOCOM_BASE (0x7C00) +#define VFRMPARA_BASE (0x8800) +#define SOUT_BASE (0x8A00) +#define PICT_GAIN0_BASE (0x9200) +#define CXC_DATA_BASE (0xEB00) +#define SHD_DATA_BASE (0xED00) + +/* USERCTRL OFFSET */ + +#define ROM_VERSION (USERCTRL_BASE+0x0000) +#define PARAM_VERSION (USERCTRL_BASE+0x0002) +#define I2C_ADR_SEL (USERCTRL_BASE+0x0004) +#define CHIPSTNBY (USERCTRL_BASE+0x0005) +#define INCK_SET (USERCTRL_BASE+0x0006) +#define PLL_CKSEL (USERCTRL_BASE+0x0007) +#define SRCCK_DIV (USERCTRL_BASE+0x0008) +#define AF_EXT (USERCTRL_BASE+0x000B) +#define DRIVABILITY (USERCTRL_BASE+0x000C) +#define PULLCNT (USERCTRL_BASE+0x000D) +#define INTSTS0 (USERCTRL_BASE+0x000E) +#define INTEN0 (USERCTRL_BASE+0x0010) +#define INTCLR0 (USERCTRL_BASE+0x0012) +#define DEVICESTS (USERCTRL_BASE+0x0014) +#define GPIO_DATA (USERCTRL_BASE+0x0015) +#define GPIO_FUNCSEL (USERCTRL_BASE+0x0016) +#define GPIO_SEL (USERCTRL_BASE+0x0018) +#define GPIO_STS (USERCTRL_BASE+0x0019) +#define PWMCK_DIV (USERCTRL_BASE+0x0034) +#define PREFLASH (USERCTRL_BASE+0x0037) +#define OTP_CHIPID_L (USERCTRL_BASE+0x0038) +#define OTP_CHIPID_H (USERCTRL_BASE+0x003C) +#define OTP0_A0 (USERCTRL_BASE+0x0040) +#define OTP0_A1 (USERCTRL_BASE+0x0041) +#define OTP0_A2 (USERCTRL_BASE+0x0042) +#define OTP0_A3 (USERCTRL_BASE+0x0043) +#define OTP0_A4 (USERCTRL_BASE+0x0044) +#define OTP0_B0 (USERCTRL_BASE+0x0045) +#define OTP0_B1 (USERCTRL_BASE+0x0046) +#define OTP0_B2 (USERCTRL_BASE+0x0047) +#define OTP0_B3 (USERCTRL_BASE+0x0048) +#define OTP0_B4 (USERCTRL_BASE+0x0049) +#define OTP0_C0 (USERCTRL_BASE+0x004A) +#define OTP0_C1 (USERCTRL_BASE+0x004B) +#define OTP0_C2 (USERCTRL_BASE+0x004C) +#define OTP0_C3 (USERCTRL_BASE+0x004D) +#define OTP0_C4 (USERCTRL_BASE+0x004E) +#define OTP1_A0 (USERCTRL_BASE+0x004F) +#define OTP1_A1 (USERCTRL_BASE+0x0050) +#define OTP1_A2 (USERCTRL_BASE+0x0051) +#define OTP1_A3 (USERCTRL_BASE+0x0052) +#define OTP1_A4 (USERCTRL_BASE+0x0053) +#define OTP1_B0 (USERCTRL_BASE+0x0054) +#define OTP1_B1 (USERCTRL_BASE+0x0055) +#define OTP1_B2 (USERCTRL_BASE+0x0056) +#define OTP1_B3 (USERCTRL_BASE+0x0057) +#define OTP1_B4 (USERCTRL_BASE+0x0058) +#define OTP1_C0 (USERCTRL_BASE+0x0059) +#define OTP1_C1 (USERCTRL_BASE+0x005A) +#define OTP1_C2 (USERCTRL_BASE+0x005B) +#define OTP1_C3 (USERCTRL_BASE+0x005C) +#define OTP1_C4 (USERCTRL_BASE+0x005D) +#define OTP_FLG (USERCTRL_BASE+0x0060) +#define OTP_CTRL (USERCTRL_BASE+0x0061) +#define OTP_CLOCK (USERCTRL_BASE+0x0062) +#define OTPSTS (USERCTRL_BASE+0x0063) +#define OTP_WRITE_A0 (USERCTRL_BASE+0x0064) +#define OTP_WRITE_A1 (USERCTRL_BASE+0x0065) +#define OTP_WRITE_A2 (USERCTRL_BASE+0x0066) +#define OTP_WRITE_A3 (USERCTRL_BASE+0x0067) +#define OTP_WRITE_A4 (USERCTRL_BASE+0x0068) +#define OTP_WRITE_B0 (USERCTRL_BASE+0x0069) +#define OTP_WRITE_B1 (USERCTRL_BASE+0x006A) +#define OTP_WRITE_B2 (USERCTRL_BASE+0x006B) +#define OTP_WRITE_B3 (USERCTRL_BASE+0x006C) +#define OTP_WRITE_B4 (USERCTRL_BASE+0x006D) +#define OTP_WRITE_C0 (USERCTRL_BASE+0x006E) +#define OTP_WRITE_C1 (USERCTRL_BASE+0x006F) +#define OTP_WRITE_C2 (USERCTRL_BASE+0x0070) +#define OTP_WRITE_C3 (USERCTRL_BASE+0x0071) +#define OTP_WRITE_C4 (USERCTRL_BASE+0x0072) +#define MODESEL_FIX (USERCTRL_BASE+0x0080) +#define MODESEL (USERCTRL_BASE+0x0081) +#define MONI_REFRESH (USERCTRL_BASE+0x0082) +#define SENSMODE_MONI (USERCTRL_BASE+0x0083) +#define SENSMODE_CAP (USERCTRL_BASE+0x0084) +#define SENSMODE_MOVIE (USERCTRL_BASE+0x0085) +#define FPSTYPE_MONI (USERCTRL_BASE+0x0086) +#define FPSTYPE_CAP (USERCTRL_BASE+0x0087) +#define FPSTYPE_MOVIE (USERCTRL_BASE+0x0088) +#define OUTFMT_MONI (USERCTRL_BASE+0x0089) +#define OUTFMT_CAP (USERCTRL_BASE+0x008A) +#define OUTFMT_MOVIE (USERCTRL_BASE+0x008B) +#define READVECT_MONI (USERCTRL_BASE+0x008C) +#define READVECT_CAP (USERCTRL_BASE+0x008D) +#define READVECT_MOVIE (USERCTRL_BASE+0x008E) +#define HSIZE_MONI (USERCTRL_BASE+0x0090) +#define HSIZE_CAP (USERCTRL_BASE+0x0092) +#define HSIZE_MOVIE (USERCTRL_BASE+0x0094) +#define VSIZE_MONI (USERCTRL_BASE+0x0096) +#define VSIZE_CAP (USERCTRL_BASE+0x0098) +#define VSIZE_MOVIE (USERCTRL_BASE+0x009A) +#define HSIZE_TN (USERCTRL_BASE+0x009C) +#define VSIZE_TN (USERCTRL_BASE+0x009E) +#define VEXPAND_SEL (USERCTRL_BASE+0x00A0) +#define HVFREEZOOM (USERCTRL_BASE+0x00A1) +#define EZOOM_MAG (USERCTRL_BASE+0x00A2) +#define EZOOM_HMAG (USERCTRL_BASE+0x00A4) +#define EZOOM_VMAG (USERCTRL_BASE+0x00A6) +#define OFFSET_X (USERCTRL_BASE+0x00A8) +#define OFFSET_Y (USERCTRL_BASE+0x00AA) +#define PLL_CHG_SEL (USERCTRL_BASE+0x00AC) +#define EXT_MODE_SEL (USERCTRL_BASE+0x00AD) +#define VADD_MODE (USERCTRL_BASE+0x00AE) +#define HSENS_MODE_SEL (USERCTRL_BASE+0x00AF) +#define CLP_HADD_SEL (USERCTRL_BASE+0x00B0) +#define AF_RESTART_F (USERCTRL_BASE+0x00B1) +#define AFMODE_MONI (USERCTRL_BASE+0x00B2) +#define AFMODE_HREL (USERCTRL_BASE+0x00B3) +#define AFMODE_MOVIE (USERCTRL_BASE+0x00B4) +#define CAP_CARRY_OVER_F (USERCTRL_BASE+0x00B5) +#define CAPNUM (USERCTRL_BASE+0x00B6) +#define LED_ON (USERCTRL_BASE+0x00B7) +#define VIFOUTMASK (USERCTRL_BASE+0x00C0) +#define VIFCONFIG (USERCTRL_BASE+0x00C2) +#define VIF_CLKCONFIG1 (USERCTRL_BASE+0x00C4) +#define VIF_CLKCONFIG2 (USERCTRL_BASE+0x00C5) +#define VIF_CLKCONFIG3 (USERCTRL_BASE+0x00C6) +#define VIF_CLKCONFIG4 (USERCTRL_BASE+0x00C7) +#define VIF_CLKCONFIG5 (USERCTRL_BASE+0x00C8) +#define VIF_CLKCONFIG6 (USERCTRL_BASE+0x00C9) +#define VIF_CLKCONFIG7 (USERCTRL_BASE+0x00CA) +#define VIF_CLKCONFIG8 (USERCTRL_BASE+0x00CB) +#define VIF_CLKCONFIG9 (USERCTRL_BASE+0x00CC) +#define VIF_CLKCONFIG10 (USERCTRL_BASE+0x00CD) +#define VIF_CLKCONFIG11 (USERCTRL_BASE+0x00CE) +#define VIF_CLKCONFIG12 (USERCTRL_BASE+0x00CF) +#define VIF_CLKCONFIG_EXIT1 (USERCTRL_BASE+0x00D0) +#define VIF_CLKCONFIG_EXIT2 (USERCTRL_BASE+0x00D1) +#define VIF_CLKCONFIG_EXIT3 (USERCTRL_BASE+0x00D2) +#define VIF_CLKCONFIG_EXIT4 (USERCTRL_BASE+0x00D3) +#define VIF_CLKCONFIG_EXIT5 (USERCTRL_BASE+0x00D4) +#define VIF_CLKCONFIG_EXIT6 (USERCTRL_BASE+0x00D5) +#define VIF_CLKCONFIG_EXIT7 (USERCTRL_BASE+0x00D6) +#define VIF_CLKCONFIG_EXIT8 (USERCTRL_BASE+0x00D7) +#define VIF_CLKCONFIG_EXIT9 (USERCTRL_BASE+0x00D8) +#define VIF_CLKCONFIG_EXIT10 (USERCTRL_BASE+0x00D9) +#define VIF_CLKCONFIG_EXIT11 (USERCTRL_BASE+0x00DA) +#define VIF_CLKCONFIG_EXIT12 (USERCTRL_BASE+0x00DB) +#define PICT_OUT_INFO_NOW (USERCTRL_BASE+0x00DC) +#define PICT_OUT_INFO_PRE (USERCTRL_BASE+0x00DD) +#define YUVCONFIG (USERCTRL_BASE+0x00DE) +#define YUVCONFIG_TN (USERCTRL_BASE+0x00E0) +#define JPEGMAXMODE (USERCTRL_BASE+0x00E3) +#define JPEGMAXMODE_FIX (USERCTRL_BASE+0x00E4) +#define SIZE_HOLD_EN (USERCTRL_BASE+0x00E5) +#define SIZE_HOLD_EN_FIX (USERCTRL_BASE+0x00E6) +#define SIZE_HOLD_HOUT (USERCTRL_BASE+0x00E8) +#define SIZE_HOLD_HOUT_FIX (USERCTRL_BASE+0x00EA) +#define SIZE_HOLD_VOUT (USERCTRL_BASE+0x00EC) +#define SIZE_HOLD_VOUT_FIX (USERCTRL_BASE+0x00EE) +#define JPG_CODE (USERCTRL_BASE+0x00F0) +#define JPGBUF_LINEFIX_F (USERCTRL_BASE+0x00F1) +#define VIF_PDDT (USERCTRL_BASE+0x00F2) +#define JPG_DRI (USERCTRL_BASE+0x00F4) +#define JPG_QLTY (USERCTRL_BASE+0x00F6) +#define INT_QLTY0 (USERCTRL_BASE+0x00F7) +#define INT_QLTY1 (USERCTRL_BASE+0x00F8) +#define INT_QLTY2 (USERCTRL_BASE+0x00F9) +#define UPPER_SIZE_LIMIT0 (USERCTRL_BASE+0x00FC) +#define UPPER_SIZE_LIMIT1 (USERCTRL_BASE+0x00FE) +#define UPPER_SIZE_LIMIT2 (USERCTRL_BASE+0x0100) +#define SCENE_SELECT (USERCTRL_BASE+0x0280) +#define LOWER_SIZE_LIMIT0 (USERCTRL_BASE+0x0102) +#define LOWER_SIZE_LIMIT1 (USERCTRL_BASE+0x0104) +#define LOWER_SIZE_LIMIT2 (USERCTRL_BASE+0x0106) +#define MIN_QLTY0 (USERCTRL_BASE+0x0108) +#define MIN_QLTY1 (USERCTRL_BASE+0x0109) +#define MIN_QLTY2 (USERCTRL_BASE+0x010A) +#define PRED_SIZE_COEF (USERCTRL_BASE+0x010C) +#define PRED_UPPER_SIZE_LIMIT0 (USERCTRL_BASE+0x010E) +#define PRED_UPPER_SIZE_LIMIT1 (USERCTRL_BASE+0x0110) +#define PRED_UPPER_SIZE_LIMIT2 (USERCTRL_BASE+0x0112) +#define PRED_LOWER_SIZE_LIMIT0 (USERCTRL_BASE+0x0114) +#define PRED_LOWER_SIZE_LIMIT1 (USERCTRL_BASE+0x0116) +#define PRED_LOWER_SIZE_LIMIT2 (USERCTRL_BASE+0x0118) +#define JPEG_PRED_MODE (USERCTRL_BASE+0x011A) +#define JPEG_PRED_STS (USERCTRL_BASE+0x011B) +#define JPEG_PRED_RESTART (USERCTRL_BASE+0x011C) +#define JPEG_PRED_ERRLEVEL_COUNT (USERCTRL_BASE+0x011D) +#define JPEG_PRED_ERRLEVEL_ABS_DIFF (USERCTRL_BASE+0x011E) +#define JPEG_PRED_SEL (USERCTRL_BASE+0x011F) +#define JPEG_PRED_MAX (USERCTRL_BASE+0x0120) +#define JPEG_PRED_SIZELIMIT (USERCTRL_BASE+0x0122) +#define JPG_STS (USERCTRL_BASE+0x0126) +#define JPG_HSMODE (USERCTRL_BASE+0x0127) +#define HS_JPG_STS (USERCTRL_BASE+0x0128) +#define HS_JPG_QLTY_VAL (USERCTRL_BASE+0x0129) +#define HS_JPG_DATA (USERCTRL_BASE+0x012C) +#define HS_SHT_TIME_L (USERCTRL_BASE+0x0130) +#define HS_SHT_TIME_H (USERCTRL_BASE+0x0132) +#define HS_ISOSENS (USERCTRL_BASE+0x0134) +#define VIF_ILMODESEL (USERCTRL_BASE+0x0136) +#define VIFADRDUMP_MODE (USERCTRL_BASE+0x0137) +#define VIFADRDUMP_CODE (USERCTRL_BASE+0x0138) +#define ILCODELEN (USERCTRL_BASE+0x013A) +#define VIFIL (USERCTRL_BASE+0x013C) +#define VIFMDATAID (USERCTRL_BASE+0x013E) +#define VIFMDATAIDIL (USERCTRL_BASE+0x013F) +#define VIFMCTRL1 (USERCTRL_BASE+0x0140) +#define VIFMFRMCLR (USERCTRL_BASE+0x0141) +#define VIFMFRMMAX1 (USERCTRL_BASE+0x0142) +#define VIFFRMMAX2 (USERCTRL_BASE+0x0143) +#define VIFMIPICORERG01 (USERCTRL_BASE+0x0144) +#define RAW_SYSTEM (USERCTRL_BASE+0x0145) +#define RAW_SENS_HOLD_F (USERCTRL_BASE+0x0146) +#define RAW_SHT_LINE (USERCTRL_BASE+0x0148) +#define RAW_AGC_STEP (USERCTRL_BASE+0x014A) +#define RAW_GAIN_R (USERCTRL_BASE+0x014C) +#define RAW_GAIN_GR (USERCTRL_BASE+0x014E) +#define RAW_GAIN_GB (USERCTRL_BASE+0x0150) +#define RAW_GAIN_B (USERCTRL_BASE+0x0152) +#define RAW_HBLL_OFFSET (USERCTRL_BASE+0x0154) +#define RAW_HBLR_OFFSET (USERCTRL_BASE+0x0155) +#define RAW_SENS_DELAY_1_1 (USERCTRL_BASE+0x0156) +#define RAW_SENS_DELAY_1_2 (USERCTRL_BASE+0x0158) +#define RAW_SENS_DELAY_1_4 (USERCTRL_BASE+0x015A) +#define RAW_SENS_DELAY_1_8 (USERCTRL_BASE+0x015C) +#define RAW_SENS_DELAY_HD_1_1 (USERCTRL_BASE+0x015E) +#define RAW_SENS_DELAY_HD_1_2 (USERCTRL_BASE+0x0160) +#define EVSEL (USERCTRL_BASE+0x0180) +#define CAP_HALF_AE_CTRL (USERCTRL_BASE+0x0181) +#define CAP_SHT (USERCTRL_BASE+0x0182) +#define CAP_AGC (USERCTRL_BASE+0x0184) +#define CAP_GAINOFFSET (USERCTRL_BASE+0x0186) +#define VADJ_SENS_1_1 (USERCTRL_BASE+0x018C) +#define VADJ_SENS_1_2 (USERCTRL_BASE+0x018E) +#define VADJ_SENS_1_4 (USERCTRL_BASE+0x0190) +#define VADJ_SENS_1_8 (USERCTRL_BASE+0x0192) +#define VADJ_SENS_HD_1_1 (USERCTRL_BASE+0x0194) +#define VADJ_SENS_HD_1_2 (USERCTRL_BASE+0x0196) +#define ISOSENS_OUT (USERCTRL_BASE+0x019A) +#define SHT_TIME_OUT_L (USERCTRL_BASE+0x019C) +#define SHT_TIME_OUT_H (USERCTRL_BASE+0x019E) +#define SHT_TIME_AUTO_L (USERCTRL_BASE+0x01A0) +#define SHT_TIME_AUTO_H (USERCTRL_BASE+0x01A2) +#define USER_GAIN_LEVEL_AUTO (USERCTRL_BASE+0x01A4) +#define USER_GAIN_LEVEL_NOW (USERCTRL_BASE+0x01A5) +#define ERRLEVEL_AUTO (USERCTRL_BASE+0x01A8) +#define ERRLEVEL_NOW (USERCTRL_BASE+0x01A9) +#define CAP_AWB_CTRL (USERCTRL_BASE+0x01AF) +#define HALF_MOVE_STS (USERCTRL_BASE+0x01B0) +#define RATIO_R_AUTO (USERCTRL_BASE+0x01B2) +#define RATIO_B_AUTO (USERCTRL_BASE+0x01B4) +#define RATIO_R_NOW (USERCTRL_BASE+0x01B6) +#define RATIO_B_NOW (USERCTRL_BASE+0x01B8) +#define AWB_STS_AUTO (USERCTRL_BASE+0x01BA) +#define AWB_STS_NOW (USERCTRL_BASE+0x01BB) +#define SHD_EN (USERCTRL_BASE+0x01BC) +#define SHD_CAP_R2_WAIGHT (USERCTRL_BASE+0x01BE) +#define SHD_CAP_GAIN_WAIGHT (USERCTRL_BASE+0x01C0) +#define SHD_CAP_RB_WAIGHT (USERCTRL_BASE+0x01C2) +#define FMODE (USERCTRL_BASE+0x01C5) +#define UIBRIGHTNESS (USERCTRL_BASE+0x01C6) +#define UICONTRAST (USERCTRL_BASE+0x01C7) +#define ERRSCL_AUTO (USERCTRL_BASE+0x01CA) +#define ERRSCL_NOW (USERCTRL_BASE+0x01CC) +#define USER_AESCL_AUTO (USERCTRL_BASE+0x01CE) +#define USER_AESCL_NOW (USERCTRL_BASE+0x01D0) +#define SCENE_SELECT_FIX (USERCTRL_BASE+0x0281) +#define AWB_SN1 (USERCTRL_BASE+0x0282) +#define AWB_SN2 (USERCTRL_BASE+0x0283) +#define AWB_SN3 (USERCTRL_BASE+0x0284) +#define AWB_SN4 (USERCTRL_BASE+0x0285) +#define AWB_SN5 (USERCTRL_BASE+0x0286) +#define AWB_SN6 (USERCTRL_BASE+0x0287) +#define AWB_SN7 (USERCTRL_BASE+0x0288) +#define AWB_SN8 (USERCTRL_BASE+0x0289) +#define AWB_SN9 (USERCTRL_BASE+0x028A) +#define AWB_SN10 (USERCTRL_BASE+0x028B) +#define AWB_SN11 (USERCTRL_BASE+0x028C) +#define HALF_AWB_CTRL (USERCTRL_BASE+0x01AE) +#define AWB_SN12 (USERCTRL_BASE+0x028D) +#define AF_SN1_2 (USERCTRL_BASE+0x028E) +#define AF_SN3_4 (USERCTRL_BASE+0x028F) +#define AF_SN5_6 (USERCTRL_BASE+0x0290) +#define AF_SN7_8 (USERCTRL_BASE+0x0291) +#define AF_SN9_10 (USERCTRL_BASE+0x0292) +#define AF_SN11_12 (USERCTRL_BASE+0x0293) +#define AE_SN1 (USERCTRL_BASE+0x0294) +#define AE_SN2 (USERCTRL_BASE+0x0295) +#define AE_SN3 (USERCTRL_BASE+0x0296) +#define AE_SN4 (USERCTRL_BASE+0x0297) +#define AE_SN5 (USERCTRL_BASE+0x0298) +#define AE_SN6 (USERCTRL_BASE+0x0299) +#define AE_SN7 (USERCTRL_BASE+0x029A) +#define AE_SN8 (USERCTRL_BASE+0x029B) +#define AE_SN9 (USERCTRL_BASE+0x029C) +#define AE_SN10 (USERCTRL_BASE+0x029D) +#define AE_SN11 (USERCTRL_BASE+0x029E) +#define AE_SN12 (USERCTRL_BASE+0x029F) +#define SHT_PREMODE_TYPE1 (USERCTRL_BASE+0x02A0) +#define SHT_PREMODE_TYPE2 (USERCTRL_BASE+0x02A2) +#define SHT_PREMODE_TYPE3 (USERCTRL_BASE+0x02A4) +#define SHT_PREMODE_TYPE4 (USERCTRL_BASE+0x02A6) +#define ISO_TYPE1 (USERCTRL_BASE+0x02A8) +#define ISO_TYPE2 (USERCTRL_BASE+0x02A9) +#define ISO_TYPE3 (USERCTRL_BASE+0x02AA) +#define ISO_TYPE4 (USERCTRL_BASE+0x02AB) +#define AE_SUB_SN1 (USERCTRL_BASE+0x02AC) +#define AE_SUB_SN2 (USERCTRL_BASE+0x02AD) +#define AE_SUB_SN3 (USERCTRL_BASE+0x02AE) +#define AE_SUB_SN4 (USERCTRL_BASE+0x02AF) +#define AE_SUB_SN5 (USERCTRL_BASE+0x02B0) +#define AE_SUB_SN6 (USERCTRL_BASE+0x02B1) +#define AE_SUB_SN7 (USERCTRL_BASE+0x02B2) +#define AE_SUB_SN8 (USERCTRL_BASE+0x02B3) +#define AE_SUB_SN9 (USERCTRL_BASE+0x02B4) +#define AE_SUB_SN10 (USERCTRL_BASE+0x02B5) +#define AE_SUB_SN11 (USERCTRL_BASE+0x02B6) +#define AE_SUB_SN12 (USERCTRL_BASE+0x02B7) +#define AE_OPD_WIDTH_TYPE1 (USERCTRL_BASE+0x02B8) +#define AE_OPD_HEIGHT_TYPE1 (USERCTRL_BASE+0x02BA) +#define AE_OPD_WIDTH_TYPE2 (USERCTRL_BASE+0x02BC) +#define AE_OPD_HEIGHT_TYPE2 (USERCTRL_BASE+0x02BE) +#define AE_OPD_WIDTH_TYPE3 (USERCTRL_BASE+0x02C0) +#define AE_OPD_HEIGHT_TYPE3 (USERCTRL_BASE+0x02C2) +#define AE_OPD_WIDTH_TYPE4 (USERCTRL_BASE+0x02C4) +#define AE_OPD_HEIGHT_TYPE4 (USERCTRL_BASE+0x02C6) +#define FRM_FIX_SN1_2 (USERCTRL_BASE+0x02C8) +#define FRM_FIX_SN3_4 (USERCTRL_BASE+0x02C9) +#define FRM_FIX_SN5_6 (USERCTRL_BASE+0x02CA) +#define FRM_FIX_SN7_8 (USERCTRL_BASE+0x02CB) +#define FRM_FIX_SN9_10 (USERCTRL_BASE+0x02CC) +#define FRM_FIX_SN11_12 (USERCTRL_BASE+0x02CD) +#define FRMFIX_AGCLIMIT_SN1 (USERCTRL_BASE+0x02CF) +#define FRMFIX_AGCLIMIT_SN2 (USERCTRL_BASE+0x02D0) +#define FRMFIX_AGCLIMIT_SN3 (USERCTRL_BASE+0x02D1) +#define FRMFIX_AGCLIMIT_SN4 (USERCTRL_BASE+0x02D2) +#define FRMFIX_AGCLIMIT_SN5 (USERCTRL_BASE+0x02D3) +#define FRMFIX_AGCLIMIT_SN6 (USERCTRL_BASE+0x02D4) +#define FRMFIX_AGCLIMIT_SN7 (USERCTRL_BASE+0x02D5) +#define FRMFIX_AGCLIMIT_SN8 (USERCTRL_BASE+0x02D6) +#define FRMFIX_AGCLIMIT_SN9 (USERCTRL_BASE+0x02D7) +#define FRMFIX_AGCLIMIT_SN10 (USERCTRL_BASE+0x02D8) +#define FRMFIX_AGCLIMIT_SN11 (USERCTRL_BASE+0x02D9) +#define FRMFIX_AGCLIMIT_SN12 (USERCTRL_BASE+0x02DA) +#define VADD_SHTGAIN_CTRL_SN1_2 (USERCTRL_BASE+0x02DB) +#define VADD_SHTGAIN_CTRL_SN3_4 (USERCTRL_BASE+0x02DC) +#define VADD_SHTGAIN_CTRL_SN5_6 (USERCTRL_BASE+0x02DD) +#define VADD_SHTGAIN_CTRL_SN7_8 (USERCTRL_BASE+0x02DE) +#define VADD_SHTGAIN_CTRL_SN9_10 (USERCTRL_BASE+0x02DF) +#define VADD_SHTGAIN_CTRL_SN11_12 (USERCTRL_BASE+0x02E0) +#define HADD_SHTGAIN_CTRL_SN1_2 (USERCTRL_BASE+0x02E1) +#define HADD_SHTGAIN_CTRL_SN3_4 (USERCTRL_BASE+0x02E2) +#define HADD_SHTGAIN_CTRL_SN5_6 (USERCTRL_BASE+0x02E3) +#define HADD_SHTGAIN_CTRL_SN7_8 (USERCTRL_BASE+0x02E4) +#define HADD_SHTGAIN_CTRL_SN9_10 (USERCTRL_BASE+0x02E5) +#define HADD_SHTGAIN_CTRL_SN11_12 (USERCTRL_BASE+0x02E6) +#define EVREF_CTRL_SEL (USERCTRL_BASE+0x02E8) +#define EVREF_MONI_SN1_2 (USERCTRL_BASE+0x02EA) +#define EVREF_MONI_SN3_4 (USERCTRL_BASE+0x02EB) +#define EVREF_MONI_SN5_6 (USERCTRL_BASE+0x02EC) +#define EVREF_MONI_SN7_8 (USERCTRL_BASE+0x02ED) +#define EVREF_MONI_SN9_10 (USERCTRL_BASE+0x02EE) +#define EVREF_MONI_SN11_12 (USERCTRL_BASE+0x02EF) +#define EVREF_CAP_SN1_2 (USERCTRL_BASE+0x02F0) +#define EVREF_CAP_SN3_4 (USERCTRL_BASE+0x02F1) +#define EVREF_CAP_SN5_6 (USERCTRL_BASE+0x02F2) +#define EVREF_CAP_SN7_8 (USERCTRL_BASE+0x02F3) +#define EVREF_CAP_SN9_10 (USERCTRL_BASE+0x02F4) +#define EVREF_CAP_SN11_12 (USERCTRL_BASE+0x02F5) +#define EVREF_MOVIE_SN1_2 (USERCTRL_BASE+0x02F6) +#define EVREF_MOVIE_SN3_4 (USERCTRL_BASE+0x02F7) +#define EVREF_MOVIE_SN5_6 (USERCTRL_BASE+0x02F8) +#define EVREF_MOVIE_SN7_8 (USERCTRL_BASE+0x02F9) +#define EVREF_MOVIE_SN9_10 (USERCTRL_BASE+0x02FA) +#define EVREF_MOVIE_SN11_12 (USERCTRL_BASE+0x02FB) +#define EVREF_TYPE1 (USERCTRL_BASE+0x02FC) +#define EVREF_TYPE2 (USERCTRL_BASE+0x02FE) +#define EVREF_TYPE3 (USERCTRL_BASE+0x0300) +#define EVREF_TYPE4 (USERCTRL_BASE+0x0302) +#define EVREF_TYPE5 (USERCTRL_BASE+0x0304) +#define EVREF_TYPE6 (USERCTRL_BASE+0x0306) +#define AELINE_MONI_SN1_2 (USERCTRL_BASE+0x0308) +#define AELINE_MONI_SN3_4 (USERCTRL_BASE+0x0309) +#define AELINE_MONI_SN5_6 (USERCTRL_BASE+0x030A) +#define AELINE_MONI_SN7_8 (USERCTRL_BASE+0x030B) +#define AELINE_MONI_SN9_10 (USERCTRL_BASE+0x030C) +#define AELINE_MONI_SN11_12 (USERCTRL_BASE+0x030D) +#define AELINE_HALF_SN1_2 (USERCTRL_BASE+0x030E) +#define AELINE_HALF_SN3_4 (USERCTRL_BASE+0x030F) +#define AELINE_HALF_SN5_6 (USERCTRL_BASE+0x0310) +#define AELINE_HALF_SN7_8 (USERCTRL_BASE+0x0311) +#define AELINE_HALF_SN9_10 (USERCTRL_BASE+0x0312) +#define AELINE_HALF_SN11_12 (USERCTRL_BASE+0x0313) +#define AELINE_HALF_AFEND_SN1_2 (USERCTRL_BASE+0x0314) +#define AELINE_HALF_AFEND_SN3_4 (USERCTRL_BASE+0x0315) +#define AELINE_HALF_AFEND_SN5_6 (USERCTRL_BASE+0x0316) +#define AELINE_HALF_AFEND_SN7_8 (USERCTRL_BASE+0x0317) +#define AELINE_HALF_AFEND_SN9_10 (USERCTRL_BASE+0x0318) +#define AELINE_HALF_AFEND_SN11_12 (USERCTRL_BASE+0x0319) +#define AELINE_CAP_SN1_2 (USERCTRL_BASE+0x031A) +#define AELINE_CAP_SN3_4 (USERCTRL_BASE+0x031B) +#define AELINE_CAP_SN5_6 (USERCTRL_BASE+0x031C) +#define AELINE_CAP_SN7_8 (USERCTRL_BASE+0x031D) +#define AELINE_CAP_SN9_10 (USERCTRL_BASE+0x031E) +#define AELINE_CAP_SN11_12 (USERCTRL_BASE+0x031F) +#define AELINE_MOVIE_SN1_2 (USERCTRL_BASE+0x0320) +#define AELINE_MOVIE_SN3_4 (USERCTRL_BASE+0x0321) +#define AELINE_MOVIE_SN5_6 (USERCTRL_BASE+0x0322) +#define AELINE_MOVIE_SN7_8 (USERCTRL_BASE+0x0323) +#define AELINE_MOVIE_SN9_10 (USERCTRL_BASE+0x0324) +#define AELINE_MOVIE_SN11_12 (USERCTRL_BASE+0x0325) +#define SHCTRL_TIME1_TYPE1 (USERCTRL_BASE+0x0326) +#define AGCAIN1_TYPE1 (USERCTRL_BASE+0x0327) +#define SHCTRL_TIME2_TYPE1 (USERCTRL_BASE+0x0328) +#define AGCAIN2_TYPE1 (USERCTRL_BASE+0x0329) +#define SHCTRL_TIME3_TYPE1 (USERCTRL_BASE+0x032A) +#define AGCAIN3_TYPE1 (USERCTRL_BASE+0x032B) +#define SHCTRL_TIME1_TYPE2 (USERCTRL_BASE+0x032C) +#define AGCAIN1_TYPE2 (USERCTRL_BASE+0x032D) +#define SHCTRL_TIME2_TYPE2 (USERCTRL_BASE+0x032E) +#define AGCAIN2_TYPE2 (USERCTRL_BASE+0x032F) +#define SHCTRL_TIME3_TYPE2 (USERCTRL_BASE+0x0330) +#define AGCAIN3_TYPE2 (USERCTRL_BASE+0x0331) +#define SHCTRL_TIME1_TYPE3 (USERCTRL_BASE+0x0332) +#define AGCAIN1_TYPE3 (USERCTRL_BASE+0x0333) +#define SHCTRL_TIME2_TYPE3 (USERCTRL_BASE+0x0334) +#define AGCAIN2_TYPE3 (USERCTRL_BASE+0x0335) +#define SHCTRL_TIME3_TYPE3 (USERCTRL_BASE+0x0336) +#define AGCAIN3_TYPE3 (USERCTRL_BASE+0x0337) +#define SHCTRL_TIME1_TYPE4 (USERCTRL_BASE+0x0338) +#define AGCAIN1_TYPE4 (USERCTRL_BASE+0x0339) +#define SHCTRL_TIME2_TYPE4 (USERCTRL_BASE+0x033A) +#define AGCAIN2_TYPE4 (USERCTRL_BASE+0x033B) +#define SHCTRL_TIME3_TYPE4 (USERCTRL_BASE+0x033C) +#define AGCAIN3_TYPE4 (USERCTRL_BASE+0x033D) +#define SHCTRL_TIME1_TYPE5 (USERCTRL_BASE+0x033E) +#define AGCAIN1_TYPE5 (USERCTRL_BASE+0x033F) +#define SHCTRL_TIME2_TYPE5 (USERCTRL_BASE+0x0340) +#define AGCAIN2_TYPE5 (USERCTRL_BASE+0x0341) +#define SHCTRL_TIME3_TYPE5 (USERCTRL_BASE+0x0342) +#define AGCAIN3_TYPE5 (USERCTRL_BASE+0x0343) +#define SHCTRL_TIME1_TYPE6 (USERCTRL_BASE+0x0344) +#define AGCAIN1_TYPE6 (USERCTRL_BASE+0x0345) +#define SHCTRL_TIME2_TYPE6 (USERCTRL_BASE+0x0346) +#define AGCAIN2_TYPE6 (USERCTRL_BASE+0x0347) +#define SHCTRL_TIME3_TYPE6 (USERCTRL_BASE+0x0348) +#define AGCAIN3_TYPE6 (USERCTRL_BASE+0x0349) +#define SHCTRL_TIME1_TYPE7 (USERCTRL_BASE+0x034A) +#define AGCAIN1_TYPE7 (USERCTRL_BASE+0x034B) +#define SHCTRL_TIME2_TYPE7 (USERCTRL_BASE+0x034C) +#define AGCAIN2_TYPE7 (USERCTRL_BASE+0x034D) +#define SHCTRL_TIME3_TYPE7 (USERCTRL_BASE+0x034E) +#define AGCAIN3_TYPE7 (USERCTRL_BASE+0x034F) +#define SHCTRL_TIME1_TYPE8 (USERCTRL_BASE+0x0350) +#define AGCAIN1_TYPE8 (USERCTRL_BASE+0x0351) +#define SHCTRL_TIME2_TYPE8 (USERCTRL_BASE+0x0352) +#define AGCAIN2_TYPE8 (USERCTRL_BASE+0x0353) +#define SHCTRL_TIME3_TYPE8 (USERCTRL_BASE+0x0354) +#define AGCAIN3_TYPE8 (USERCTRL_BASE+0x0355) +#define SHCTRL_TIME1_TYPE9 (USERCTRL_BASE+0x0356) +#define AGCAIN1_TYPE9 (USERCTRL_BASE+0x0357) +#define SHCTRL_TIME2_TYPE9 (USERCTRL_BASE+0x0358) +#define AGCAIN2_TYPE9 (USERCTRL_BASE+0x0359) +#define SHCTRL_TIME3_TYPE9 (USERCTRL_BASE+0x035A) +#define AGCAIN3_TYPE9 (USERCTRL_BASE+0x035B) +#define SHCTRL_TIME1_TYPE10 (USERCTRL_BASE+0x035C) +#define AGCAIN1_TYPE10 (USERCTRL_BASE+0x035D) +#define SHCTRL_TIME2_TYPE10 (USERCTRL_BASE+0x035E) +#define AGCAIN2_TYPE10 (USERCTRL_BASE+0x035F) +#define SHCTRL_TIME3_TYPE10 (USERCTRL_BASE+0x0360) +#define AGCAIN3_TYPE10 (USERCTRL_BASE+0x0361) +#define PICT3_GAMMA_MONI0 (USERCTRL_BASE+0x0362) +#define PICT3_GAMMA_MONI1 (USERCTRL_BASE+0x0363) +#define PICT3_GAMMA_MONI2 (USERCTRL_BASE+0x0364) +#define PICT3_GAMMA_CAP0 (USERCTRL_BASE+0x0365) +#define PICT3_GAMMA_CAP1 (USERCTRL_BASE+0x0366) +#define PICT3_GAMMA_CAP2 (USERCTRL_BASE+0x0367) +#define PICT3_GAMMA_MOVIE0 (USERCTRL_BASE+0x0368) +#define PICT3_GAMMA_MOVIE1 (USERCTRL_BASE+0x0369) +#define PICT3_GAMMA_MOVIE2 (USERCTRL_BASE+0x036A) +#define LM_MODE_SN_1 (USERCTRL_BASE+0x036B) +#define LM_MODE_SN_2 (USERCTRL_BASE+0x036C) +#define LM_MODE_SN_3 (USERCTRL_BASE+0x036D) +#define LM_MODE_SN_4 (USERCTRL_BASE+0x036E) +#define LM_MODE_SN_5 (USERCTRL_BASE+0x036F) +#define LM_MODE_SN_6 (USERCTRL_BASE+0x0370) +#define LM_MODE_SN_7 (USERCTRL_BASE+0x0371) +#define LM_MODE_SN_8 (USERCTRL_BASE+0x0372) +#define LM_MODE_SN_9 (USERCTRL_BASE+0x0373) +#define LM_MODE_SN_10 (USERCTRL_BASE+0x0374) +#define LM_MODE_SN_11 (USERCTRL_BASE+0x0375) +#define LM_MODE_SN_12 (USERCTRL_BASE+0x0376) +#define HUEGAIN_MODE_SN_1 (USERCTRL_BASE+0x0377) +#define HUEGAIN_MODE_SN_2 (USERCTRL_BASE+0x0378) +#define HUEGAIN_MODE_SN_3 (USERCTRL_BASE+0x0379) +#define HUEGAIN_MODE_SN_4 (USERCTRL_BASE+0x037A) +#define HUEGAIN_MODE_SN_5 (USERCTRL_BASE+0x037B) +#define HUEGAIN_MODE_SN_6 (USERCTRL_BASE+0x037C) +#define HUEGAIN_MODE_SN_7 (USERCTRL_BASE+0x037D) +#define HUEGAIN_MODE_SN_8 (USERCTRL_BASE+0x037E) +#define HUEGAIN_MODE_SN_9 (USERCTRL_BASE+0x037F) +#define HUEGAIN_MODE_SN_10 (USERCTRL_BASE+0x0380) +#define HUEGAIN_MODE_SN_11 (USERCTRL_BASE+0x0381) +#define HUEGAIN_MODE_SN_12 (USERCTRL_BASE+0x0382) +#define MC3_MODE_SN_1 (USERCTRL_BASE+0x0383) +#define MC3_MODE_SN_2 (USERCTRL_BASE+0x0384) +#define MC3_MODE_SN_3 (USERCTRL_BASE+0x0385) +#define MC3_MODE_SN_4 (USERCTRL_BASE+0x0386) +#define MC3_MODE_SN_5 (USERCTRL_BASE+0x0387) +#define MC3_MODE_SN_6 (USERCTRL_BASE+0x0388) +#define MC3_MODE_SN_7 (USERCTRL_BASE+0x0389) +#define MC3_MODE_SN_8 (USERCTRL_BASE+0x038A) +#define MC3_MODE_SN_9 (USERCTRL_BASE+0x038B) +#define MC3_MODE_SN_10 (USERCTRL_BASE+0x038C) +#define MC3_MODE_SN_11 (USERCTRL_BASE+0x038D) +#define MC3_MODE_SN_12 (USERCTRL_BASE+0x038E) +#define PICT1_SN_1 (USERCTRL_BASE+0x038F) +#define PICT1_SN_2 (USERCTRL_BASE+0x0390) +#define PICT1_SN_3 (USERCTRL_BASE+0x0391) +#define PICT1_SN_4 (USERCTRL_BASE+0x0392) +#define PICT1_SN_5 (USERCTRL_BASE+0x0393) +#define PICT1_SN_6 (USERCTRL_BASE+0x0394) +#define PICT1_SN_7 (USERCTRL_BASE+0x0395) +#define PICT1_SN_8 (USERCTRL_BASE+0x0396) +#define PICT1_SN_9 (USERCTRL_BASE+0x0397) +#define PICT1_SN_10 (USERCTRL_BASE+0x0398) +#define PICT1_SN_11 (USERCTRL_BASE+0x0399) +#define PICT1_SN_12 (USERCTRL_BASE+0x039A) +#define UIHUE_TYPE1 (USERCTRL_BASE+0x039B) +#define UIHUE_TYPE2 (USERCTRL_BASE+0x039C) +#define UIHUE_TYPE3 (USERCTRL_BASE+0x039D) +#define UISATURATION_TYPE1 (USERCTRL_BASE+0x039E) +#define UISATURATION_TYPE2 (USERCTRL_BASE+0x039F) +#define UISATURATION_TYPE3 (USERCTRL_BASE+0x03A0) +#define UISHARPNESS_POS_TYPE1 (USERCTRL_BASE+0x03A1) +#define UISHARPNESS_POS_TYPE2 (USERCTRL_BASE+0x03A2) +#define UISHARPNESS_POS_TYPE3 (USERCTRL_BASE+0x03A3) +#define UISHARPNESS_NEG_TYPE1 (USERCTRL_BASE+0x03A4) +#define UISHARPNESS_NEG_TYPE2 (USERCTRL_BASE+0x03A5) +#define UISHARPNESS_NEG_TYPE3 (USERCTRL_BASE+0x03A6) + +/* POST VIF OFFSET */ + +#define VIFMODE (POST_VIF_BASE+0x0000) +#define VIFPOUTEN (POST_VIF_BASE+0x0004) +#define VIFRAW (POST_VIF_BASE+0x0008) +#define VIFYUV (POST_VIF_BASE+0x000C) +#define VIFRGB (POST_VIF_BASE+0x0010) +#define VIFJPEG (POST_VIF_BASE+0x0014) +#define VIFIL_VBASE (POST_VIF_BASE+0x0018) +#define VIFHSET1 (POST_VIF_BASE+0x001C) +#define VIFHSET2 (POST_VIF_BASE+0x0020) +#define VIFVSET1 (POST_VIF_BASE+0x0024) +#define VIFVSET2 (POST_VIF_BASE+0x0028) +#define VIFDLY (POST_VIF_BASE+0x002C) +#define VIFMDCLSET (POST_VIF_BASE+0x0030) +#define VIF_REG1 (POST_VIF_BASE+0x0034) +#define VIF_REG2 (POST_VIF_BASE+0x0038) +#define VIF_REG3 (POST_VIF_BASE+0x003C) +#define VIFMIPICORERG0 (POST_VIF_BASE+0x0040) +#define VIFMIPICORERG1 (POST_VIF_BASE+0x0050) +#define VIFMIPICORERG2 (POST_VIF_BASE+0x0060) +#define VIFYUV2 (POST_VIF_BASE+0x0064) +#define VIFADRDUMP (POST_VIF_BASE+0x0068) + +/* CPUCONF OFFSET */ + +#define CPUEXT (CPUCONF_BASE+0x0000) +#define MUTECNT (CPUCONF_BASE+0x0001) +#define WDT_EN (CPUCONF_BASE+0x0002) +#define Z1_SEL1 (CPUCONF_BASE+0x0003) +#define DM_SW2 (CPUCONF_BASE+0x0006) +#define ENDIAN_SEL (CPUCONF_BASE+0x0008) +#define CPUSLEEP_EN (CPUCONF_BASE+0x0009) +#define FAST_MODECHG_EN (CPUCONF_BASE+0x000A) +#define FAST_SHT_MODE_SEL (CPUCONF_BASE+0x000B) +#define FAST_SHT_LIMIT_COUNT (CPUCONF_BASE+0x000C) +#define SYSINT3_VDLY_1_2 (CPUCONF_BASE+0x0010) +#define SENS_REVERSE_CTRL (CPUCONF_BASE+0x001A) +#define EEP_ADDRESS (CPUCONF_BASE+0x001B) +#define PG_SEL (CPUCONF_BASE+0x0020) +#define PG_GAIN_SEL (CPUCONF_BASE+0x0021) +#define PG_WIDTH_SEL (CPUCONF_BASE+0x0022) +#define PG_MODE_SEL (CPUCONF_BASE+0x0023) +#define PG_LEVEL_SEL (CPUCONF_BASE+0x0024) +#define PG_DATEN_OFF_SEL (CPUCONF_BASE+0x0026) + +/* CTRL OFFSET */ + +#define ROM_WAIT (CTRL_BASE+0x0000) +#define I2C_M_CTRL (CTRL_BASE+0x0001) +#define SENS_SEND_F (CTRL_BASE+0x0002) +#define INTMSK_HREL (CTRL_BASE+0x0004) +#define INTMSK_OTHER (CTRL_BASE+0x0006) +#define INTMSK_BUF (CTRL_BASE+0x0008) +#define INTMSK_EXT (CTRL_BASE+0x000A) +#define WAKEUP_SENS_TRNS (CTRL_BASE+0x000C) +#define MODE_SEL_SFT (CTRL_BASE+0x000D) +#define GPIO_SNOOP (CTRL_BASE+0x000E) +#define STANDBY_DCK_EN (CTRL_BASE+0x000F) + +/* SENSMIPI OFFSET */ + +#define RGLANESEL (SENSMIPI_BASE+0x0001) +#define RGTLPX (SENSMIPI_BASE+0x0004) +#define RGTCLKPREPARE (SENSMIPI_BASE+0x0005) +#define RGTCLKZERO (SENSMIPI_BASE+0x0006) +#define RGTCLKPRE (SENSMIPI_BASE+0x0007) +#define RGTCLKPOST (SENSMIPI_BASE+0x0008) +#define RGTCLKTRAIL (SENSMIPI_BASE+0x0009) +#define RGTHSEXIT (SENSMIPI_BASE+0x000A) +#define RGTHSPREPARE (SENSMIPI_BASE+0x000B) +#define RGTHSZERO (SENSMIPI_BASE+0x000C) +#define RGTHSTRAIL (SENSMIPI_BASE+0x000D) +#define RGTLPXESC (SENSMIPI_BASE+0x000E) + +/* AE OFFSET */ + +#define AE_INIT_MASK_CNT (AE_BASE+0x002B) +#define AESPEED_INIT (AE_BASE+0x0031) +#define AESPEED_FAST (AE_BASE+0x0032) +#define FASTMOVE_TIMEOUT (AE_BASE+0x003D) + +/* AWB OFFSET */ + +#define ATW_INITMASK (AWB_BASE+0x0004) +#define INIT_GAINS (AWB_BASE+0x0023) +#define INIT_SFTLMT (AWB_BASE+0x002C) + +/* AF OFFSET */ + +#define AF_SYSTEM (AF_BASE+0x0005) +#define AF_OPDDATA_SAVE (AF_BASE+0x001B) +#define CAP_AF_CANCEL_F (AF_BASE+0x0075) + +/* ADJ OFFSET */ + +#define NORMR (ADJ_BASE+0x0004) +#define NORMB (ADJ_BASE+0x0006) +#define AWBPRER (ADJ_BASE+0x0008) +#define AWBPREB (ADJ_BASE+0x000A) +#define SHD_NORMR_OFFSET_R2 (ADJ_BASE+0X0026) +#define SHD_PRER_OFFSET_R2 (ADJ_BASE+0X0028) +#define SHD_NORMR_OFFSET_RB (ADJ_BASE+0X002A) +#define SHD_PRER_OFFSET_RB (ADJ_BASE+0X002C) +#define SHD_NORMB_OFFSET_RB (ADJ_BASE+0X002E) +#define SHD_PREB_OFFSET_RB (ADJ_BASE+0X0030) + +/* MODE OFFSET */ + +#define RO_MASK_NUM (MODE_BASE+0x0001) +#define VIF_CLKCONFIG13 (MODE_BASE+0x0012) +#define VIF_CLKCONFIG14 (MODE_BASE+0x0013) +#define VIF_CLKCONFIG15 (MODE_BASE+0x0014) +#define VIF_CLKCONFIG16 (MODE_BASE+0x0015) +#define FLC_OPD_HEIGHT_NORMAL_1_1 (MODE_BASE+0x0016) +#define FLC_OPD_HEIGHT_NORMAL_1_2 (MODE_BASE+0x0018) +#define FLC_OPD_HEIGHT_NORMAL_1_4 (MODE_BASE+0x001A) +#define FLC_OPD_HEIGHT_NORMAL_1_8 (MODE_BASE+0x001C) +#define FLC_OPD_HEIGHT_HD_1_1 (MODE_BASE+0x001E) +#define FLC_OPD_HEIGHT_HD_1_2 (MODE_BASE+0x0020) + +#define AF_OPD0_HDELAY (MODE_BASE+0x0030) +#define AF_OPD0_VDELAY (MODE_BASE+0x0032) +#define AF_OPD0_HVALID (MODE_BASE+0x0034) +#define AF_OPD0_VVALID (MODE_BASE+0x0036) +#define AF_OPD1_HDELAY (MODE_BASE+0x0038) +#define AF_OPD1_VDELAY (MODE_BASE+0x003A) +#define AF_OPD1_HVALID (MODE_BASE+0x003C) +#define AF_OPD1_VVALID (MODE_BASE+0x003E) +#define AF_OPD2_HDELAY (MODE_BASE+0x0040) +#define AF_OPD2_VDELAY (MODE_BASE+0x0042) +#define AF_OPD2_HVALID (MODE_BASE+0x0044) +#define AF_OPD2_VVALID (MODE_BASE+0x0046) +#define AF_OPD3_HDELAY (MODE_BASE+0x0048) +#define AF_OPD3_VDELAY (MODE_BASE+0x004A) +#define AF_OPD3_HVALID (MODE_BASE+0x004C) +#define AF_OPD3_VVALID (MODE_BASE+0x004E) +#define AF_OPD4_HDELAY (MODE_BASE+0x0050) +#define AF_OPD4_VDELAY (MODE_BASE+0x0052) +#define AF_OPD4_HVALID (MODE_BASE+0x0054) +#define AF_OPD4_VVALID (MODE_BASE+0x0056) +#define AF_OPD5_HDELAY (MODE_BASE+0x0058) +#define AF_OPD5_VDELAY (MODE_BASE+0x005A) +#define AF_OPD5_HVALID (MODE_BASE+0x005C) +#define AF_OPD5_VVALID (MODE_BASE+0x005E) +#define AF_OPD6_HDELAY (MODE_BASE+0x0060) +#define AF_OPD6_VDELAY (MODE_BASE+0x0062) +#define AF_OPD6_HVALID (MODE_BASE+0x0064) +#define AF_OPD6_VVALID (MODE_BASE+0x0066) +#define AF_OPD7_HDELAY (MODE_BASE+0x0068) +#define AF_OPD7_VDELAY (MODE_BASE+0x006A) +#define AF_OPD7_HVALID (MODE_BASE+0x006C) +#define AF_OPD7_VVALID (MODE_BASE+0x006E) +#define AF_OPD8_HDELAY (MODE_BASE+0x0070) +#define AF_OPD8_VDELAY (MODE_BASE+0x0072) +#define AF_OPD8_HVALID (MODE_BASE+0x0074) +#define AF_OPD8_VVALID (MODE_BASE+0x0076) +#define AF_OPD9_HDELAY (MODE_BASE+0x0078) +#define AF_OPD9_VDELAY (MODE_BASE+0x007A) +#define AF_OPD9_HVALID (MODE_BASE+0x007C) +#define AF_OPD9_VVALID (MODE_BASE+0x007E) + +#define VIF_REC601_Y (MODE_BASE+0x008C) +#define VIF_REC601_C (MODE_BASE+0x008E) + +/* PICT OFFSET */ + +#define SHD_INP_TH_HB_H_R2 (PICT_BASE+0x0032) +#define SHD_INP_TH_HB_L_R2 (PICT_BASE+0x0034) +#define SHD_INP_TH_LB_H_R2 (PICT_BASE+0x0036) +#define SHD_INP_TH_LB_L_R2 (PICT_BASE+0x0038) +#define SHD_INP_TH_HB_H_RB (PICT_BASE+0x003C) +#define SHD_INP_TH_HB_L_RB (PICT_BASE+0x003E) +#define SHD_INP_TH_LB_H_RB (PICT_BASE+0x0040) +#define SHD_INP_TH_LB_L_RB (PICT_BASE+0x0042) +#define YGAMMA_MODE (PICT_BASE+0x0093) + +/* GAMMA OFFSET */ + +#define G0_LOWGM_ON_R (GAMMA_BASE+0x003A) +#define G0_0CLIP_R (GAMMA_BASE+0x003C) +#define G0_LOWGM_ON_G (GAMMA_BASE+0x003E) +#define G0_0CLIP_G (GAMMA_BASE+0x0040) +#define G0_LOWGM_ON_B (GAMMA_BASE+0x0042) +#define G0_0CLIP_B (GAMMA_BASE+0x0044) +#define G0_KNOT_GAINCTRL_TH_L (GAMMA_BASE+0x0046) +#define G0_KNOT_GAINCTRL_TH_H (GAMMA_BASE+0x0047) + +/* JPEG OFFSET */ + +#define JPG_CTL (JPEG_BASE+0x0000) +#define JPG_FMT (JPEG_BASE+0x0002) +#define JPG_FIL (JPEG_BASE+0x0003) +#define JPG_FMT2 (JPEG_BASE+0x0004) +#define JPG_CONV_CTRL (JPEG_BASE+0x0005) +#define JPG_DATA (JPEG_BASE+0x000C) +#define QLTY_LIMIT (JPEG_BASE+0x0010) +#define JPG_CLK_SEL (JPEG_BASE+0x0011) +#define JPG_PRED_COUNT (JPEG_BASE+0x0012) + +/* AUTOCOM OFFSET */ + +#define MIPIOUT_EN (AUTOCOM_BASE+0x0031) + +/* VFRMPARA OFFSET */ + +#define VPARA_TRG (VFRMPARA_BASE+0x0000) +#define VPARA1_ADRS0L (VFRMPARA_BASE+0x0001) +#define VPARA1_ADRS0H (VFRMPARA_BASE+0x0002) +#define VPARA1_DATA0 (VFRMPARA_BASE+0x0003) +#define VPARA1_ADRS1L (VFRMPARA_BASE+0x0004) +#define VPARA1_ADRS1H (VFRMPARA_BASE+0x0005) +#define VPARA1_DATA1 (VFRMPARA_BASE+0x0006) +#define VPARA1_ADRS2L (VFRMPARA_BASE+0x0007) +#define VPARA1_ADRS2H (VFRMPARA_BASE+0x0008) +#define VPARA1_DATA2 (VFRMPARA_BASE+0x0009) +#define VPARA1_ADRS3L (VFRMPARA_BASE+0x000A) +#define VPARA1_ADRS3H (VFRMPARA_BASE+0x000B) +#define VPARA1_DATA3 (VFRMPARA_BASE+0x000C) +#define VPARA1_ADRS4L (VFRMPARA_BASE+0x000D) +#define VPARA1_ADRS4H (VFRMPARA_BASE+0x000E) +#define VPARA1_DATA4 (VFRMPARA_BASE+0x000F) +#define VPARA1_ADRS5L (VFRMPARA_BASE+0x0010) +#define VPARA1_ADRS5H (VFRMPARA_BASE+0x0011) +#define VPARA1_DATA5 (VFRMPARA_BASE+0x0012) +#define VPARA1_ADRS6L (VFRMPARA_BASE+0x0013) +#define VPARA1_ADRS6H (VFRMPARA_BASE+0x0014) +#define VPARA1_DATA6 (VFRMPARA_BASE+0x0015) +#define VPARA1_ADRS7L (VFRMPARA_BASE+0x0016) +#define VPARA1_ADRS7H (VFRMPARA_BASE+0x0017) +#define VPARA1_DATA7 (VFRMPARA_BASE+0x0018) +#define VPARA1_ADRS8L (VFRMPARA_BASE+0x0019) +#define VPARA1_ADRS8H (VFRMPARA_BASE+0x001A) +#define VPARA1_DATA8 (VFRMPARA_BASE+0x001B) +#define VPARA1_ADRS9L (VFRMPARA_BASE+0x001C) +#define VPARA1_ADRS9H (VFRMPARA_BASE+0x001D) +#define VPARA1_DATA9 (VFRMPARA_BASE+0x001E) +#define VPARA1_ADRS10L (VFRMPARA_BASE+0x001F) +#define VPARA1_ADRS10H (VFRMPARA_BASE+0x0020) +#define VPARA1_DATA10 (VFRMPARA_BASE+0x0021) +#define VPARA1_ADRS11L (VFRMPARA_BASE+0x0022) +#define VPARA1_ADRS11H (VFRMPARA_BASE+0x0023) +#define VPARA1_DATA11 (VFRMPARA_BASE+0x0024) +#define VPARA1_ADRS12L (VFRMPARA_BASE+0x0025) +#define VPARA1_ADRS12H (VFRMPARA_BASE+0x0026) +#define VPARA1_DATA12 (VFRMPARA_BASE+0x0027) +#define VPARA1_ADRS13L (VFRMPARA_BASE+0x0028) +#define VPARA1_ADRS13H (VFRMPARA_BASE+0x0029) +#define VPARA1_DATA13 (VFRMPARA_BASE+0x002A) +#define VPARA1_ADRS14L (VFRMPARA_BASE+0x002B) +#define VPARA1_ADRS14H (VFRMPARA_BASE+0x002C) +#define VPARA1_DATA14 (VFRMPARA_BASE+0x002D) +#define VPARA1_ADRS15L (VFRMPARA_BASE+0x002E) +#define VPARA1_ADRS15H (VFRMPARA_BASE+0x002F) +#define VPARA1_DATA15 (VFRMPARA_BASE+0x0030) +#define VPARA1_ADRS16L (VFRMPARA_BASE+0x0031) +#define VPARA1_ADRS16H (VFRMPARA_BASE+0x0032) +#define VPARA1_DATA16 (VFRMPARA_BASE+0x0033) +#define VPARA1_ADRS17L (VFRMPARA_BASE+0x0034) +#define VPARA1_ADRS17H (VFRMPARA_BASE+0x0035) +#define VPARA1_DATA17 (VFRMPARA_BASE+0x0036) +#define VPARA1_ADRS18L (VFRMPARA_BASE+0x0037) +#define VPARA1_ADRS18H (VFRMPARA_BASE+0x0038) +#define VPARA1_DATA18 (VFRMPARA_BASE+0x0039) +#define VPARA1_ADRS19L (VFRMPARA_BASE+0x003A) +#define VPARA1_ADRS19H (VFRMPARA_BASE+0x003B) +#define VPARA1_DATA19 (VFRMPARA_BASE+0x003C) +#define VPARA1_ADRS20L (VFRMPARA_BASE+0x003D) +#define VPARA1_ADRS20H (VFRMPARA_BASE+0x003E) +#define VPARA1_DATA20 (VFRMPARA_BASE+0x003F) +#define VPARA1_ADRS21L (VFRMPARA_BASE+0x0040) +#define VPARA1_ADRS21H (VFRMPARA_BASE+0x0041) +#define VPARA1_DATA21 (VFRMPARA_BASE+0x0042) +#define VPARA1_ADRS22L (VFRMPARA_BASE+0x0043) +#define VPARA1_ADRS22H (VFRMPARA_BASE+0x0044) +#define VPARA1_DATA22 (VFRMPARA_BASE+0x0045) +#define VPARA1_ADRS23L (VFRMPARA_BASE+0x0046) +#define VPARA1_ADRS23H (VFRMPARA_BASE+0x0047) +#define VPARA1_DATA23 (VFRMPARA_BASE+0x0048) +#define VPARA1_ADRS24L (VFRMPARA_BASE+0x0049) +#define VPARA1_ADRS24H (VFRMPARA_BASE+0x004A) +#define VPARA1_DATA24 (VFRMPARA_BASE+0x004B) +#define VPARA1_ADRS25L (VFRMPARA_BASE+0x004C) +#define VPARA1_ADRS25H (VFRMPARA_BASE+0x004D) +#define VPARA1_DATA25 (VFRMPARA_BASE+0x004E) +#define VPARA1_ADRS26L (VFRMPARA_BASE+0x004F) +#define VPARA1_ADRS26H (VFRMPARA_BASE+0x0050) +#define VPARA1_DATA26 (VFRMPARA_BASE+0x0051) +#define VPARA1_ADRS27L (VFRMPARA_BASE+0x0052) +#define VPARA1_ADRS27H (VFRMPARA_BASE+0x0053) +#define VPARA1_DATA27 (VFRMPARA_BASE+0x0054) +#define VPARA1_ADRS28L (VFRMPARA_BASE+0x0055) +#define VPARA1_ADRS28H (VFRMPARA_BASE+0x0056) +#define VPARA1_DATA28 (VFRMPARA_BASE+0x0057) +#define VPARA1_ADRS29L (VFRMPARA_BASE+0x0058) +#define VPARA1_ADRS29H (VFRMPARA_BASE+0x0059) +#define VPARA1_DATA29 (VFRMPARA_BASE+0x005A) +#define VPARA1_ADRS30L (VFRMPARA_BASE+0x005B) +#define VPARA1_ADRS30H (VFRMPARA_BASE+0x005C) +#define VPARA1_DATA30 (VFRMPARA_BASE+0x005D) +#define VPARA1_ADRS31L (VFRMPARA_BASE+0x005E) +#define VPARA1_ADRS31H (VFRMPARA_BASE+0x005F) +#define VPARA1_DATA31 (VFRMPARA_BASE+0x0060) +#define VPARA1_ADRS32L (VFRMPARA_BASE+0x0061) +#define VPARA1_ADRS32H (VFRMPARA_BASE+0x0062) +#define VPARA1_DATA32 (VFRMPARA_BASE+0x0063) +#define VPARA1_ADRS33L (VFRMPARA_BASE+0x0064) +#define VPARA1_ADRS33H (VFRMPARA_BASE+0x0065) +#define VPARA1_DATA33 (VFRMPARA_BASE+0x0066) +#define VPARA1_ADRS34L (VFRMPARA_BASE+0x0067) +#define VPARA1_ADRS34H (VFRMPARA_BASE+0x0068) +#define VPARA1_DATA34 (VFRMPARA_BASE+0x0069) +#define VPARA1_ADRS35L (VFRMPARA_BASE+0x006A) +#define VPARA1_ADRS35H (VFRMPARA_BASE+0x006B) +#define VPARA1_DATA35 (VFRMPARA_BASE+0x006C) +#define VPARA1_ADRS36L (VFRMPARA_BASE+0x006D) +#define VPARA1_ADRS36H (VFRMPARA_BASE+0x006E) +#define VPARA1_DATA36 (VFRMPARA_BASE+0x006F) +#define VPARA1_ADRS37L (VFRMPARA_BASE+0x0070) +#define VPARA1_ADRS37H (VFRMPARA_BASE+0x0071) +#define VPARA1_DATA37 (VFRMPARA_BASE+0x0072) +#define VPARA1_ADRS38L (VFRMPARA_BASE+0x0073) +#define VPARA1_ADRS38H (VFRMPARA_BASE+0x0074) +#define VPARA1_DATA38 (VFRMPARA_BASE+0x0075) +#define VPARA1_ADRS39L (VFRMPARA_BASE+0x0076) +#define VPARA1_ADRS39H (VFRMPARA_BASE+0x0077) +#define VPARA1_DATA39 (VFRMPARA_BASE+0x0078) +#define VPARA1_ADRS40L (VFRMPARA_BASE+0x0079) +#define VPARA1_ADRS40H (VFRMPARA_BASE+0x007A) +#define VPARA1_DATA40 (VFRMPARA_BASE+0x007B) +#define VPARA1_ADRS41L (VFRMPARA_BASE+0x007C) +#define VPARA1_ADRS41H (VFRMPARA_BASE+0x007D) +#define VPARA1_DATA41 (VFRMPARA_BASE+0x007E) +#define VPARA1_ADRS42L (VFRMPARA_BASE+0x007F) +#define VPARA1_ADRS42H (VFRMPARA_BASE+0x0080) +#define VPARA1_DATA42 (VFRMPARA_BASE+0x0081) +#define VPARA1_ADRS43L (VFRMPARA_BASE+0x0082) +#define VPARA1_ADRS43H (VFRMPARA_BASE+0x0083) +#define VPARA1_DATA43 (VFRMPARA_BASE+0x0084) +#define VPARA1_ADRS44L (VFRMPARA_BASE+0x0085) +#define VPARA1_ADRS44H (VFRMPARA_BASE+0x0086) +#define VPARA1_DATA44 (VFRMPARA_BASE+0x0087) +#define VPARA1_ADRS45L (VFRMPARA_BASE+0x0088) +#define VPARA1_ADRS45H (VFRMPARA_BASE+0x0089) +#define VPARA1_DATA45 (VFRMPARA_BASE+0x008A) +#define VPARA1_ADRS46L (VFRMPARA_BASE+0x008B) +#define VPARA1_ADRS46H (VFRMPARA_BASE+0x008C) +#define VPARA1_DATA46 (VFRMPARA_BASE+0x008D) +#define VPARA1_ADRS47L (VFRMPARA_BASE+0x008E) +#define VPARA1_ADRS47H (VFRMPARA_BASE+0x008F) +#define VPARA1_DATA47 (VFRMPARA_BASE+0x0090) +#define VPARA1_ADRS48L (VFRMPARA_BASE+0x0091) +#define VPARA1_ADRS48H (VFRMPARA_BASE+0x0092) +#define VPARA1_DATA48 (VFRMPARA_BASE+0x0093) +#define VPARA1_ADRS49L (VFRMPARA_BASE+0x0094) +#define VPARA1_ADRS49H (VFRMPARA_BASE+0x0095) +#define VPARA1_DATA49 (VFRMPARA_BASE+0x0096) +#define VPARA1_ADRS50L (VFRMPARA_BASE+0x0097) +#define VPARA1_ADRS50H (VFRMPARA_BASE+0x0098) +#define VPARA1_DATA50 (VFRMPARA_BASE+0x0099) +#define VPARA1_ADRS51L (VFRMPARA_BASE+0x009A) +#define VPARA1_ADRS51H (VFRMPARA_BASE+0x009B) +#define VPARA1_DATA51 (VFRMPARA_BASE+0x009C) +#define VPARA1_ADRS52L (VFRMPARA_BASE+0x009D) +#define VPARA1_ADRS52H (VFRMPARA_BASE+0x009E) +#define VPARA1_DATA52 (VFRMPARA_BASE+0x009F) +#define VPARA1_ADRS53L (VFRMPARA_BASE+0x00A0) +#define VPARA1_ADRS53H (VFRMPARA_BASE+0x00A1) +#define VPARA1_DATA53 (VFRMPARA_BASE+0x00A2) +#define VPARA1_ADRS54L (VFRMPARA_BASE+0x00A3) +#define VPARA1_ADRS54H (VFRMPARA_BASE+0x00A4) +#define VPARA1_DATA54 (VFRMPARA_BASE+0x00A5) +#define VPARA1_ADRS55L (VFRMPARA_BASE+0x00A6) +#define VPARA1_ADRS55H (VFRMPARA_BASE+0x00A7) +#define VPARA1_DATA55 (VFRMPARA_BASE+0x00A8) +#define VPARA1_ADRS56L (VFRMPARA_BASE+0x00A9) +#define VPARA1_ADRS56H (VFRMPARA_BASE+0x00AA) +#define VPARA1_DATA56 (VFRMPARA_BASE+0x00AB) +#define VPARA1_ADRS57L (VFRMPARA_BASE+0x00AC) +#define VPARA1_ADRS57H (VFRMPARA_BASE+0x00AD) +#define VPARA1_DATA57 (VFRMPARA_BASE+0x00AE) +#define VPARA1_ADRS58L (VFRMPARA_BASE+0x00AF) +#define VPARA1_ADRS58H (VFRMPARA_BASE+0x00B0) +#define VPARA1_DATA58 (VFRMPARA_BASE+0x00B1) +#define VPARA1_ADRS59L (VFRMPARA_BASE+0x00B2) +#define VPARA1_ADRS59H (VFRMPARA_BASE+0x00B3) +#define VPARA1_DATA59 (VFRMPARA_BASE+0x00B4) +#define VPARA1_ADRS60L (VFRMPARA_BASE+0x00B5) +#define VPARA1_ADRS60H (VFRMPARA_BASE+0x00B6) +#define VPARA1_DATA60 (VFRMPARA_BASE+0x00B7) +#define VPARA1_ADRS61L (VFRMPARA_BASE+0x00B8) +#define VPARA1_ADRS61H (VFRMPARA_BASE+0x00B9) +#define VPARA1_DATA61 (VFRMPARA_BASE+0x00BA) +#define VPARA1_ADRS62L (VFRMPARA_BASE+0x00BB) +#define VPARA1_ADRS62H (VFRMPARA_BASE+0x00BC) +#define VPARA1_DATA62 (VFRMPARA_BASE+0x00BD) +#define VPARA1_ADRS63L (VFRMPARA_BASE+0x00BE) +#define VPARA1_ADRS63H (VFRMPARA_BASE+0x00BF) +#define VPARA1_DATA63 (VFRMPARA_BASE+0x00C0) +#define VPARA2_ADRS0L (VFRMPARA_BASE+0x00C1) +#define VPARA2_ADRS0H (VFRMPARA_BASE+0x00C2) +#define VPARA2_DATA0L (VFRMPARA_BASE+0x00C3) +#define VPARA2_DATA0H (VFRMPARA_BASE+0x00C4) +#define VPARA2_ADRS1L (VFRMPARA_BASE+0x00C5) +#define VPARA2_ADRS1H (VFRMPARA_BASE+0x00C6) +#define VPARA2_DATA1L (VFRMPARA_BASE+0x00C7) +#define VPARA2_DATA1H (VFRMPARA_BASE+0x00C8) +#define VPARA2_ADRS2L (VFRMPARA_BASE+0x00C9) +#define VPARA2_ADRS2H (VFRMPARA_BASE+0x00CA) +#define VPARA2_DATA2L (VFRMPARA_BASE+0x00CB) +#define VPARA2_DATA2H (VFRMPARA_BASE+0x00CC) +#define VPARA2_ADRS3L (VFRMPARA_BASE+0x00CD) +#define VPARA2_ADRS3H (VFRMPARA_BASE+0x00CE) +#define VPARA2_DATA3L (VFRMPARA_BASE+0x00CF) +#define VPARA2_DATA3H (VFRMPARA_BASE+0x00D0) +#define VPARA2_ADRS4L (VFRMPARA_BASE+0x00D1) +#define VPARA2_ADRS4H (VFRMPARA_BASE+0x00D2) +#define VPARA2_DATA4L (VFRMPARA_BASE+0x00D3) +#define VPARA2_DATA4H (VFRMPARA_BASE+0x00D4) +#define VPARA2_ADRS5L (VFRMPARA_BASE+0x00D5) +#define VPARA2_ADRS5H (VFRMPARA_BASE+0x00D6) +#define VPARA2_DATA5L (VFRMPARA_BASE+0x00D7) +#define VPARA2_DATA5H (VFRMPARA_BASE+0x00D8) +#define VPARA2_ADRS6L (VFRMPARA_BASE+0x00D9) +#define VPARA2_ADRS6H (VFRMPARA_BASE+0x00DA) +#define VPARA2_DATA6L (VFRMPARA_BASE+0x00DB) +#define VPARA2_DATA6H (VFRMPARA_BASE+0x00DC) +#define VPARA2_ADRS7L (VFRMPARA_BASE+0x00DD) +#define VPARA2_ADRS7H (VFRMPARA_BASE+0x00DE) +#define VPARA2_DATA7L (VFRMPARA_BASE+0x00DF) +#define VPARA2_DATA7H (VFRMPARA_BASE+0x00E0) +#define VPARA2_ADRS8L (VFRMPARA_BASE+0x00E1) +#define VPARA2_ADRS8H (VFRMPARA_BASE+0x00E2) +#define VPARA2_DATA8L (VFRMPARA_BASE+0x00E3) +#define VPARA2_DATA8H (VFRMPARA_BASE+0x00E4) +#define VPARA2_ADRS9L (VFRMPARA_BASE+0x00E5) +#define VPARA2_ADRS9H (VFRMPARA_BASE+0x00E6) +#define VPARA2_DATA9L (VFRMPARA_BASE+0x00E7) +#define VPARA2_DATA9H (VFRMPARA_BASE+0x00E8) +#define VPARA2_ADRS10L (VFRMPARA_BASE+0x00E9) +#define VPARA2_ADRS10H (VFRMPARA_BASE+0x00EA) +#define VPARA2_DATA10L (VFRMPARA_BASE+0x00EB) +#define VPARA2_DATA10H (VFRMPARA_BASE+0x00EC) +#define VPARA2_ADRS11L (VFRMPARA_BASE+0x00ED) +#define VPARA2_ADRS11H (VFRMPARA_BASE+0x00EE) +#define VPARA2_DATA11L (VFRMPARA_BASE+0x00EF) +#define VPARA2_DATA11H (VFRMPARA_BASE+0x00F0) +#define VPARA2_ADRS12L (VFRMPARA_BASE+0x00F1) +#define VPARA2_ADRS12H (VFRMPARA_BASE+0x00F2) +#define VPARA2_DATA12L (VFRMPARA_BASE+0x00F3) +#define VPARA2_DATA12H (VFRMPARA_BASE+0x00F4) +#define VPARA2_ADRS13L (VFRMPARA_BASE+0x00F5) +#define VPARA2_ADRS13H (VFRMPARA_BASE+0x00F6) +#define VPARA2_DATA13L (VFRMPARA_BASE+0x00F7) +#define VPARA2_DATA13H (VFRMPARA_BASE+0x00F8) +#define VPARA2_ADRS14L (VFRMPARA_BASE+0x00F9) +#define VPARA2_ADRS14H (VFRMPARA_BASE+0x00FA) +#define VPARA2_DATA14L (VFRMPARA_BASE+0x00FB) +#define VPARA2_DATA14H (VFRMPARA_BASE+0x00FC) +#define VPARA2_ADRS15L (VFRMPARA_BASE+0x00FD) +#define VPARA2_ADRS15H (VFRMPARA_BASE+0x00FE) +#define VPARA2_DATA15L (VFRMPARA_BASE+0x00FF) +#define VPARA2_DATA15H (VFRMPARA_BASE+0x0100) +#define VPARA2_ADRS16L (VFRMPARA_BASE+0x0101) +#define VPARA2_ADRS16H (VFRMPARA_BASE+0x0102) +#define VPARA2_DATA16L (VFRMPARA_BASE+0x0103) +#define VPARA2_DATA16H (VFRMPARA_BASE+0x0104) +#define VPARA2_ADRS17L (VFRMPARA_BASE+0x0105) +#define VPARA2_ADRS17H (VFRMPARA_BASE+0x0106) +#define VPARA2_DATA17L (VFRMPARA_BASE+0x0107) +#define VPARA2_DATA17H (VFRMPARA_BASE+0x0108) +#define VPARA2_ADRS18L (VFRMPARA_BASE+0x0109) +#define VPARA2_ADRS18H (VFRMPARA_BASE+0x010A) +#define VPARA2_DATA18L (VFRMPARA_BASE+0x010B) +#define VPARA2_DATA18H (VFRMPARA_BASE+0x010C) +#define VPARA2_ADRS19L (VFRMPARA_BASE+0x010D) +#define VPARA2_ADRS19H (VFRMPARA_BASE+0x010E) +#define VPARA2_DATA19L (VFRMPARA_BASE+0x010F) +#define VPARA2_DATA19H (VFRMPARA_BASE+0x0110) +#define VPARA2_ADRS20L (VFRMPARA_BASE+0x0111) +#define VPARA2_ADRS20H (VFRMPARA_BASE+0x0112) +#define VPARA2_DATA20L (VFRMPARA_BASE+0x0113) +#define VPARA2_DATA20H (VFRMPARA_BASE+0x0114) +#define VPARA2_ADRS21L (VFRMPARA_BASE+0x0115) +#define VPARA2_ADRS21H (VFRMPARA_BASE+0x0116) +#define VPARA2_DATA21L (VFRMPARA_BASE+0x0117) +#define VPARA2_DATA21H (VFRMPARA_BASE+0x0118) +#define VPARA2_ADRS22L (VFRMPARA_BASE+0x0119) +#define VPARA2_ADRS22H (VFRMPARA_BASE+0x011A) +#define VPARA2_DATA22L (VFRMPARA_BASE+0x011B) +#define VPARA2_DATA22H (VFRMPARA_BASE+0x011C) +#define VPARA2_ADRS23L (VFRMPARA_BASE+0x011D) +#define VPARA2_ADRS23H (VFRMPARA_BASE+0x011E) +#define VPARA2_DATA23L (VFRMPARA_BASE+0x011F) +#define VPARA2_DATA23H (VFRMPARA_BASE+0x0120) +#define VPARA2_ADRS24L (VFRMPARA_BASE+0x0121) +#define VPARA2_ADRS24H (VFRMPARA_BASE+0x0122) +#define VPARA2_DATA24L (VFRMPARA_BASE+0x0123) +#define VPARA2_DATA24H (VFRMPARA_BASE+0x0124) +#define VPARA2_ADRS25L (VFRMPARA_BASE+0x0125) +#define VPARA2_ADRS25H (VFRMPARA_BASE+0x0126) +#define VPARA2_DATA25L (VFRMPARA_BASE+0x0127) +#define VPARA2_DATA25H (VFRMPARA_BASE+0x0128) +#define VPARA2_ADRS26L (VFRMPARA_BASE+0x0129) +#define VPARA2_ADRS26H (VFRMPARA_BASE+0x012A) +#define VPARA2_DATA26L (VFRMPARA_BASE+0x012B) +#define VPARA2_DATA26H (VFRMPARA_BASE+0x012C) +#define VPARA2_ADRS27L (VFRMPARA_BASE+0x012D) +#define VPARA2_ADRS27H (VFRMPARA_BASE+0x012E) +#define VPARA2_DATA27L (VFRMPARA_BASE+0x012F) +#define VPARA2_DATA27H (VFRMPARA_BASE+0x0130) +#define VPARA2_ADRS28L (VFRMPARA_BASE+0x0131) +#define VPARA2_ADRS28H (VFRMPARA_BASE+0x0132) +#define VPARA2_DATA28L (VFRMPARA_BASE+0x0133) +#define VPARA2_DATA28H (VFRMPARA_BASE+0x0134) +#define VPARA2_ADRS29L (VFRMPARA_BASE+0x0135) +#define VPARA2_ADRS29H (VFRMPARA_BASE+0x0136) +#define VPARA2_DATA29L (VFRMPARA_BASE+0x0137) +#define VPARA2_DATA29H (VFRMPARA_BASE+0x0138) +#define VPARA2_ADRS30L (VFRMPARA_BASE+0x0139) +#define VPARA2_ADRS30H (VFRMPARA_BASE+0x013A) +#define VPARA2_DATA30L (VFRMPARA_BASE+0x013B) +#define VPARA2_DATA30H (VFRMPARA_BASE+0x013C) +#define VPARA2_ADRS31L (VFRMPARA_BASE+0x013D) +#define VPARA2_ADRS31H (VFRMPARA_BASE+0x013E) +#define VPARA2_DATA31L (VFRMPARA_BASE+0x013F) +#define VPARA2_DATA31H (VFRMPARA_BASE+0x0140) +#define VPARA2_ADRS32L (VFRMPARA_BASE+0x0141) +#define VPARA2_ADRS32H (VFRMPARA_BASE+0x0142) +#define VPARA2_DATA32L (VFRMPARA_BASE+0x0143) +#define VPARA2_DATA32H (VFRMPARA_BASE+0x0144) +#define VPARA2_ADRS33L (VFRMPARA_BASE+0x0145) +#define VPARA2_ADRS33H (VFRMPARA_BASE+0x0146) +#define VPARA2_DATA33L (VFRMPARA_BASE+0x0147) +#define VPARA2_DATA33H (VFRMPARA_BASE+0x0148) +#define VPARA2_ADRS34L (VFRMPARA_BASE+0x0149) +#define VPARA2_ADRS34H (VFRMPARA_BASE+0x014A) +#define VPARA2_DATA34L (VFRMPARA_BASE+0x014B) +#define VPARA2_DATA34H (VFRMPARA_BASE+0x014C) +#define VPARA2_ADRS35L (VFRMPARA_BASE+0x014D) +#define VPARA2_ADRS35H (VFRMPARA_BASE+0x014E) +#define VPARA2_DATA35L (VFRMPARA_BASE+0x014F) +#define VPARA2_DATA35H (VFRMPARA_BASE+0x0150) +#define VPARA2_ADRS36L (VFRMPARA_BASE+0x0151) +#define VPARA2_ADRS36H (VFRMPARA_BASE+0x0152) +#define VPARA2_DATA36L (VFRMPARA_BASE+0x0153) +#define VPARA2_DATA36H (VFRMPARA_BASE+0x0154) +#define VPARA2_ADRS37L (VFRMPARA_BASE+0x0155) +#define VPARA2_ADRS37H (VFRMPARA_BASE+0x0156) +#define VPARA2_DATA37L (VFRMPARA_BASE+0x0157) +#define VPARA2_DATA37H (VFRMPARA_BASE+0x0158) +#define VPARA2_ADRS38L (VFRMPARA_BASE+0x0159) +#define VPARA2_ADRS38H (VFRMPARA_BASE+0x015A) +#define VPARA2_DATA38L (VFRMPARA_BASE+0x015B) +#define VPARA2_DATA38H (VFRMPARA_BASE+0x015C) +#define VPARA2_ADRS39L (VFRMPARA_BASE+0x015D) +#define VPARA2_ADRS39H (VFRMPARA_BASE+0x015E) +#define VPARA2_DATA39L (VFRMPARA_BASE+0x015F) +#define VPARA2_DATA39H (VFRMPARA_BASE+0x0160) +#define VPARA2_ADRS40L (VFRMPARA_BASE+0x0161) +#define VPARA2_ADRS40H (VFRMPARA_BASE+0x0162) +#define VPARA2_DATA40L (VFRMPARA_BASE+0x0163) +#define VPARA2_DATA40H (VFRMPARA_BASE+0x0164) +#define VPARA2_ADRS41L (VFRMPARA_BASE+0x0165) +#define VPARA2_ADRS41H (VFRMPARA_BASE+0x0166) +#define VPARA2_DATA41L (VFRMPARA_BASE+0x0167) +#define VPARA2_DATA41H (VFRMPARA_BASE+0x0168) +#define VPARA2_ADRS42L (VFRMPARA_BASE+0x0169) +#define VPARA2_ADRS42H (VFRMPARA_BASE+0x016A) +#define VPARA2_DATA42L (VFRMPARA_BASE+0x016B) +#define VPARA2_DATA42H (VFRMPARA_BASE+0x016C) +#define VPARA2_ADRS43L (VFRMPARA_BASE+0x016D) +#define VPARA2_ADRS43H (VFRMPARA_BASE+0x016E) +#define VPARA2_DATA43L (VFRMPARA_BASE+0x016F) +#define VPARA2_DATA43H (VFRMPARA_BASE+0x0170) +#define VPARA2_ADRS44L (VFRMPARA_BASE+0x0171) +#define VPARA2_ADRS44H (VFRMPARA_BASE+0x0172) +#define VPARA2_DATA44L (VFRMPARA_BASE+0x0173) +#define VPARA2_DATA44H (VFRMPARA_BASE+0x0174) +#define VPARA2_ADRS45L (VFRMPARA_BASE+0x0175) +#define VPARA2_ADRS45H (VFRMPARA_BASE+0x0176) +#define VPARA2_DATA45L (VFRMPARA_BASE+0x0177) +#define VPARA2_DATA45H (VFRMPARA_BASE+0x0178) +#define VPARA2_ADRS46L (VFRMPARA_BASE+0x0179) +#define VPARA2_ADRS46H (VFRMPARA_BASE+0x017A) +#define VPARA2_DATA46L (VFRMPARA_BASE+0x017B) +#define VPARA2_DATA46H (VFRMPARA_BASE+0x017C) +#define VPARA2_ADRS47L (VFRMPARA_BASE+0x017D) +#define VPARA2_ADRS47H (VFRMPARA_BASE+0x017E) +#define VPARA2_DATA47L (VFRMPARA_BASE+0x017F) +#define VPARA2_DATA47H (VFRMPARA_BASE+0x0180) +#define VPARA2_ADRS48L (VFRMPARA_BASE+0x0181) +#define VPARA2_ADRS48H (VFRMPARA_BASE+0x0182) +#define VPARA2_DATA48L (VFRMPARA_BASE+0x0183) +#define VPARA2_DATA48H (VFRMPARA_BASE+0x0184) +#define VPARA2_ADRS49L (VFRMPARA_BASE+0x0185) +#define VPARA2_ADRS49H (VFRMPARA_BASE+0x0186) +#define VPARA2_DATA49L (VFRMPARA_BASE+0x0187) +#define VPARA2_DATA49H (VFRMPARA_BASE+0x0188) +#define VPARA2_ADRS50L (VFRMPARA_BASE+0x0189) +#define VPARA2_ADRS50H (VFRMPARA_BASE+0x018A) +#define VPARA2_DATA50L (VFRMPARA_BASE+0x018B) +#define VPARA2_DATA50H (VFRMPARA_BASE+0x018C) +#define VPARA2_ADRS51L (VFRMPARA_BASE+0x018D) +#define VPARA2_ADRS51H (VFRMPARA_BASE+0x018E) +#define VPARA2_DATA51L (VFRMPARA_BASE+0x018F) +#define VPARA2_DATA51H (VFRMPARA_BASE+0x0190) +#define VPARA2_ADRS52L (VFRMPARA_BASE+0x0191) +#define VPARA2_ADRS52H (VFRMPARA_BASE+0x0192) +#define VPARA2_DATA52L (VFRMPARA_BASE+0x0193) +#define VPARA2_DATA52H (VFRMPARA_BASE+0x0194) +#define VPARA2_ADRS53L (VFRMPARA_BASE+0x0195) +#define VPARA2_ADRS53H (VFRMPARA_BASE+0x0196) +#define VPARA2_DATA53L (VFRMPARA_BASE+0x0197) +#define VPARA2_DATA53H (VFRMPARA_BASE+0x0198) +#define VPARA2_ADRS54L (VFRMPARA_BASE+0x0199) +#define VPARA2_ADRS54H (VFRMPARA_BASE+0x019A) +#define VPARA2_DATA54L (VFRMPARA_BASE+0x019B) +#define VPARA2_DATA54H (VFRMPARA_BASE+0x019C) +#define VPARA2_ADRS55L (VFRMPARA_BASE+0x019D) +#define VPARA2_ADRS55H (VFRMPARA_BASE+0x019E) +#define VPARA2_DATA55L (VFRMPARA_BASE+0x019F) +#define VPARA2_DATA55H (VFRMPARA_BASE+0x01A0) +#define VPARA2_ADRS56L (VFRMPARA_BASE+0x01A1) +#define VPARA2_ADRS56H (VFRMPARA_BASE+0x01A2) +#define VPARA2_DATA56L (VFRMPARA_BASE+0x01A3) +#define VPARA2_DATA56H (VFRMPARA_BASE+0x01A4) +#define VPARA2_ADRS57L (VFRMPARA_BASE+0x01A5) +#define VPARA2_ADRS57H (VFRMPARA_BASE+0x01A6) +#define VPARA2_DATA57L (VFRMPARA_BASE+0x01A7) +#define VPARA2_DATA57H (VFRMPARA_BASE+0x01A8) +#define VPARA2_ADRS58L (VFRMPARA_BASE+0x01A9) +#define VPARA2_ADRS58H (VFRMPARA_BASE+0x01AA) +#define VPARA2_DATA58L (VFRMPARA_BASE+0x01AB) +#define VPARA2_DATA58H (VFRMPARA_BASE+0x01AC) +#define VPARA2_ADRS59L (VFRMPARA_BASE+0x01AD) +#define VPARA2_ADRS59H (VFRMPARA_BASE+0x01AE) +#define VPARA2_DATA59L (VFRMPARA_BASE+0x01AF) +#define VPARA2_DATA59H (VFRMPARA_BASE+0x01B0) +#define VPARA2_ADRS60L (VFRMPARA_BASE+0x01B1) +#define VPARA2_ADRS60H (VFRMPARA_BASE+0x01B2) +#define VPARA2_DATA60L (VFRMPARA_BASE+0x01B3) +#define VPARA2_DATA60H (VFRMPARA_BASE+0x01B4) +#define VPARA2_ADRS61L (VFRMPARA_BASE+0x01B5) +#define VPARA2_ADRS61H (VFRMPARA_BASE+0x01B6) +#define VPARA2_DATA61L (VFRMPARA_BASE+0x01B7) +#define VPARA2_DATA61H (VFRMPARA_BASE+0x01B8) +#define VPARA2_ADRS62L (VFRMPARA_BASE+0x01B9) +#define VPARA2_ADRS62H (VFRMPARA_BASE+0x01BA) +#define VPARA2_DATA62L (VFRMPARA_BASE+0x01BB) +#define VPARA2_DATA62H (VFRMPARA_BASE+0x01BC) +#define VPARA2_ADRS63L (VFRMPARA_BASE+0x01BD) +#define VPARA2_ADRS63H (VFRMPARA_BASE+0x01BE) +#define VPARA2_DATA63L (VFRMPARA_BASE+0x01BF) +#define VPARA2_DATA63H (VFRMPARA_BASE+0x01C0) + +/* SOUT OFFSET */ + +#define CAP_END_F (SOUT_BASE+0x0078) +#define AF_STATE (SOUT_BASE+0x018A) +#define AF_RESULT (SOUT_BASE+0x018B) +#define AF_FOCUSED_WND (SOUT_BASE+0x018C) +#define AF_LENSPOS (SOUT_BASE+0x018E) + +/* PICT GAIN0 OFFSET */ + +#define INTERLOCK_TYPE0 (PICT_GAIN0_BASE+0x0000) +#define INTERLOCK_TYPE1 (PICT_GAIN0_BASE+0x0001) +#define INTERLOCK_TYPE2 (PICT_GAIN0_BASE+0x0002) +#define INTERLOCK_TYPE3 (PICT_GAIN0_BASE+0x0003) +#define INTERLOCK_TYPE4 (PICT_GAIN0_BASE+0x0004) +#define INTERLOCK_TYPE5 (PICT_GAIN0_BASE+0x0005) +#define INTERLOCK_TYPE6 (PICT_GAIN0_BASE+0x0006) +#define INTERLOCK_TYPE7 (PICT_GAIN0_BASE+0x0007) + +/* CXC_DATA OFFSET */ + +#define CXC_VALID (CXC_DATA_BASE+0x0000) +#define CXC_RGB_UNIT(x, y) (CXC_DATA_BASE+0x0002 + (((x) * 7) + (y))) +#define CXC_GRB_UNIT(x, y) (CXC_DATA_BASE+0x00BF + (((x) * 7) + (y))) + +/* SHD_DATA OFFSET */ + +#define SHD_VALID (SHD_DATA_BASE+0x0000) +#define SHD_RGB_UNIT(x,y) (SHD_DATA_BASE+0x0002 + (((x) * 11) + (y))) +#define SHD_GRB_UNIT(x, y) (SHD_DATA_BASE+0x012B + (((x) * 11) + (y))) +#define SHD_R1_UNIT(x, y) (SHD_DATA_BASE+0x0254 + (((x) * 11) + (y))) +#define SHD_R2_UNIT(x, y) (SHD_DATA_BASE+0x02EE + (((x) * 11) + (y))) +#define SHD_B2_UNIT(x, y) (SHD_DATA_BASE+0x0388 + (((x) * 11) + (y))) + +/* Status bit */ + +#define OM_CHANGED_STS (1<<0) +#define CM_CHANGED_STS (1<<1) +#define JPEG_UPDATE_STS (1<<2) +#define CAPNUM_END_STS (1<<3) +#define AF_LOCK_STS (1<<4) +#define VINT_STS (1<<5) + +#define AF_EXT_AFRAMDRVFIN (0x02) + +/* Register set value */ + +#define REGVAL_VIFMODE_YUV_PARALLEL (0x00000002) +#define REGVAL_VIFMODE_JPEG_PARALLEL (0x0000000A) +#define REGVAL_VIFMODE_INTERLEAVE_PARALLEL (0x0000000E) +#define REGVAL_VIFMODE_RGB_PARALLEL (0x00000006) + +#define REGVAL_OUTFMT_YUV (0) +#define REGVAL_OUTFMT_RGB (0x04) +#define REGVAL_OUTFMT_JPEG (0x08) +#define REGVAL_OUTFMT_INTERLEAVE (0x18) + +#define REGVAL_CHIPSTNBY_ACT (0) +#define REGVAL_CHIPSTNBY_STN (1) + +#define REGVAL_MODESEL_MON (0) +#define REGVAL_MODESEL_HREL (1) +#define REGVAL_MODESEL_CAP (2) +#define REGVAL_MODESEL_MOV (3) + +#define REGVAL_SENSMODE_ALLPIX (0) +#define REGVAL_SENSMODE_1_2 (1) +#define REGVAL_SENSMODE_1_4 (2) +#define REGVAL_SENSMODE_1_8 (3) + +#define REGVAL_FPSTYPE_120FPS (0) +#define REGVAL_FPSTYPE_60FPS (1) +#define REGVAL_FPSTYPE_30FPS (2) +#define REGVAL_FPSTYPE_15FPS (3) +#define REGVAL_FPSTYPE_10FPS (4) +#define REGVAL_FPSTYPE_7_5FPS (5) +#define REGVAL_FPSTYPE_6FPS (6) +#define REGVAL_FPSTYPE_5FPS (7) + +#define REGVAL_CPUEXT_BIT_AESTOP (0x01) +#define REGVAL_CPUEXT_BIT_AWBSTOP (0x02) + +#define REGVAL_READVECT_BIT_V (0x01) +#define REGVAL_READVECT_BIT_H (0x02) + +#define REGVAL_EFFECT_NONE (0) +#define REGVAL_EFFECT_SOLARIZATION (1) +#define REGVAL_EFFECT_NEGPOS (2) +#define REGVAL_EFFECT_SEPIA (3) +#define REGVAL_EFFECT_MONOTONE (4) +#define REGVAL_EFFECT_PASTEL (5) +#define REGVAL_EFFECT_SKETCH (6) + +#define REGVAL_AWB_ATM (0x20) +#define REGVAL_AWB_CLEARWEATHER (0x04) +#define REGVAL_AWB_SHADE (0x05) +#define REGVAL_AWB_CLOUDYWEATHER (0x06) +#define REGVAL_AWB_FLUORESCENTLIGHT (0x07) +#define REGVAL_AWB_LIGHTBULB (0x08) + +#define REGVAL_EXPOSURETIME_AUTO (0) + +#define REGVAL_PHOTOMETRY_AVERAGE (0) +#define REGVAL_PHOTOMETRY_CENTERWEIGHT (1) +#define REGVAL_PHOTOMETRY_SPOT (2) +#define REGVAL_PHOTOMETRY_MULTIPATTERN (3) + +#define REGVAL_ISO_AUTO (0) +#define REGVAL_ISO_25 (1) +#define REGVAL_ISO_32 (2) +#define REGVAL_ISO_40 (3) +#define REGVAL_ISO_50 (4) +#define REGVAL_ISO_64 (5) +#define REGVAL_ISO_80 (6) +#define REGVAL_ISO_100 (7) +#define REGVAL_ISO_125 (8) +#define REGVAL_ISO_160 (9) +#define REGVAL_ISO_200 (10) +#define REGVAL_ISO_250 (11) +#define REGVAL_ISO_320 (12) +#define REGVAL_ISO_400 (13) +#define REGVAL_ISO_500 (14) +#define REGVAL_ISO_640 (15) +#define REGVAL_ISO_800 (16) +#define REGVAL_ISO_1000 (17) +#define REGVAL_ISO_1250 (18) +#define REGVAL_ISO_1600 (19) + +#define REGVAL_YGAMMA_AUTO (0) +#define REGVAL_YGAMMA_OFF (1) + +#define REGVAL_INTCLR0_ALLCLEAR (0x3F) + +#endif /* __INCLUDE_NUTTX_VIDEO_ISX012_REG_H */