MIPS: Move address environment switch from the task switchers to the interrupt handler. That may save doing the action multiple times per interrupt
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0fa16abd49
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9c6fea03d0
@ -138,19 +138,11 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
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rtcb = (struct tcb_s*)g_readytorun.head;
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rtcb = (struct tcb_s*)g_readytorun.head;
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/* Then switch contexts */
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/* Then switch contexts. Any necessary address environment
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* changes will be made when the interrupt returns.
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*/
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up_restorestate(rtcb->xcp.regs);
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up_restorestate(rtcb->xcp.regs);
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#ifdef CONFIG_ARCH_ADDRENV
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/* Make sure that the address environment for the previously
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* running task is closed down gracefully (data caches dump,
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* MMU flushed) and set up the address environment for the new
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* thread at the head of the ready-to-run list.
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*/
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(void)group_addrenv(rtcb);
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#endif
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}
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}
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/* No, then we will need to perform the user context switch */
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/* No, then we will need to perform the user context switch */
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@ -1,7 +1,7 @@
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/****************************************************************************
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/****************************************************************************
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* arch/mips/src/mips32/up_doirq.c
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* arch/mips/src/mips32/up_doirq.c
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*
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Copyright (C) 2011, 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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@ -49,6 +49,8 @@
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#include "up_arch.h"
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#include "up_arch.h"
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#include "up_internal.h"
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#include "up_internal.h"
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#include "group/group.h"
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/****************************************************************************
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/****************************************************************************
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* Pre-processor Definitions
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* Pre-processor Definitions
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****************************************************************************/
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****************************************************************************/
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@ -75,25 +77,17 @@ uint32_t *up_doirq(int irq, uint32_t *regs)
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#ifdef CONFIG_SUPPRESS_INTERRUPTS
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#ifdef CONFIG_SUPPRESS_INTERRUPTS
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PANIC();
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PANIC();
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#else
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#else
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uint32_t *savestate;
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/* Nested interrupts are not supported in this implementation. If you want
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* to implement nested interrupts, you would have to (1) change the way that
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* current_regs is handled and (2) the design associated with
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* CONFIG_ARCH_INTERRUPTSTACK. The savestate variable will not work for
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* that purpose as implemented here because only the outermost nested
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* interrupt can result in a context switch (it can probably be deleted).
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*/
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/* Current regs non-zero indicates that we are processing an interrupt;
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/* Current regs non-zero indicates that we are processing an interrupt;
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* current_regs is also used to manage interrupt level context switches.
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* current_regs is also used to manage interrupt level context switches.
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*
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* Nested interrupts are not supported
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*/
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*/
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savestate = (uint32_t*)current_regs;
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DEBUGASSERT(current_regs == NULL);
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current_regs = regs;
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current_regs = regs;
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/* Disable further occurences of this interrupt (until the interrupt sources
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/* Disable further occurrences of this interrupt (until the interrupt sources
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* have been clear by the driver.
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* have been clear by the driver).
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*/
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*/
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up_disable_irq(irq);
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up_disable_irq(irq);
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@ -102,6 +96,34 @@ uint32_t *up_doirq(int irq, uint32_t *regs)
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irq_dispatch(irq, regs);
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irq_dispatch(irq, regs);
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#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
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/* Check for a context switch. If a context switch occurred, then
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* current_regs will have a different value than it did on entry. If an
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* interrupt level context switch has occurred, then restore the floating
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* point state and the establish the correct address environment before
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* returning from the interrupt.
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*/
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if (regs != current_regs)
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{
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#ifdef CONFIG_ARCH_FPU
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/* Restore floating point registers */
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up_restorefpu((uint32_t*)current_regs);
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#endif
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#ifdef CONFIG_ARCH_ADDRENV
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/* Make sure that the address environment for the previously
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* running task is closed down gracefully (data caches dump,
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* MMU flushed) and set up the address environment for the new
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* thread at the head of the ready-to-run list.
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*/
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(void)group_addrenv(rtcb);
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#endif
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}
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#endif
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/* If a context switch occurred while processing the interrupt then
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/* If a context switch occurred while processing the interrupt then
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* current_regs may have change value. If we return any value different
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* current_regs may have change value. If we return any value different
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* from the input regs, then the lower level will know that a context
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* from the input regs, then the lower level will know that a context
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@ -110,12 +132,11 @@ uint32_t *up_doirq(int irq, uint32_t *regs)
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regs = (uint32_t*)current_regs;
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regs = (uint32_t*)current_regs;
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/* Restore the previous value of current_regs. NULL would indicate that
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/* Set current_regs to NULL to indicate that we are no longer in an
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* we are no longer in an interrupt handler. It will be non-NULL if we
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* interrupt handler.
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* are returning from a nested interrupt.
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*/
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*/
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current_regs = savestate;
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current_regs = NULL;
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/* Unmask the last interrupt (global interrupts are still disabled) */
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/* Unmask the last interrupt (global interrupts are still disabled) */
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@ -129,19 +129,11 @@ void up_unblock_task(struct tcb_s *tcb)
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rtcb = (struct tcb_s*)g_readytorun.head;
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rtcb = (struct tcb_s*)g_readytorun.head;
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/* Then switch contexts */
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/* Then switch contexts. Any necessary address environment
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* changes will be made when the interrupt returns.
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*/
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up_restorestate(rtcb->xcp.regs);
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up_restorestate(rtcb->xcp.regs);
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#ifdef CONFIG_ARCH_ADDRENV
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/* Make sure that the address environment for the previously
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* running task is closed down gracefully (data caches dump,
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* MMU flushed) and set up the address environment for the new
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* thread at the head of the ready-to-run list.
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*/
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(void)group_addrenv(rtcb);
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#endif
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}
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}
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/* No, then we will need to perform the user context switch */
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/* No, then we will need to perform the user context switch */
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@ -1,7 +1,7 @@
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/****************************************************************************
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/****************************************************************************
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* arch/mips/src/pic32mx/pic32mx-decodeirq.c
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* arch/mips/src/pic32mx/pic32mx-decodeirq.c
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*
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Copyright (C) 2011, 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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@ -53,6 +53,8 @@
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#include "pic32mx-int.h"
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#include "pic32mx-int.h"
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#include "pic32mx-internal.h"
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#include "pic32mx-internal.h"
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#include "group/group.h"
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/****************************************************************************
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/****************************************************************************
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* Pre-processor Definitions
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* Pre-processor Definitions
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****************************************************************************/
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****************************************************************************/
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@ -77,7 +79,7 @@
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* Name: pic32mx_decodeirq
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* Name: pic32mx_decodeirq
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*
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*
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* Description:
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* Description:
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* Called from assembly language logic when an interrrupt exception occurs.
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* Called from assembly language logic when an interrupt exception occurs.
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* This function decodes and dispatches the interrupt.
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* This function decodes and dispatches the interrupt.
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*
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*
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****************************************************************************/
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****************************************************************************/
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@ -145,16 +147,42 @@ uint32_t *pic32mx_decodeirq(uint32_t *regs)
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regs = (uint32_t*)current_regs;
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regs = (uint32_t*)current_regs;
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#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
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/* Check for a context switch. If a context switch occurred, then
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* current_regs will have a different value than it did on entry. If an
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* interrupt level context switch has occurred, then restore the floating
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* point state and the establish the correct address environment before
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* returning from the interrupt.
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*/
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if (regs != current_regs)
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{
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#ifdef CONFIG_ARCH_FPU
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/* Restore floating point registers */
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up_restorefpu((uint32_t*)current_regs);
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#endif
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#ifdef CONFIG_ARCH_ADDRENV
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/* Make sure that the address environment for the previously
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* running task is closed down gracefully (data caches dump,
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* MMU flushed) and set up the address environment for the new
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* thread at the head of the ready-to-run list.
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*/
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(void)group_addrenv(rtcb);
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#endif
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}
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#endif
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#ifdef CONFIG_PIC32MX_NESTED_INTERRUPTS
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/* Restore the previous value of current_regs. NULL would indicate that
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/* Restore the previous value of current_regs. NULL would indicate that
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* we are no longer in an interrupt handler. It will be non-NULL if we
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* we are no longer in an interrupt handler. It will be non-NULL if we
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* are returning from a nested interrupt.
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* are returning from a nested interrupt.
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*/
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*
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* REVISIT: There are task switching issues! You should not enable
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#ifdef CONFIG_PIC32MX_NESTED_INTERRUPTS
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* nested interrupts unless you are ready to deal with the complexities
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/* I think there are some task switching issues here. You should not
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* of fixing nested context switching. The logic here is insufficient.
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* enable nested interrupts unless you are ready to deal with the
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* complexities of nested context switching. The logic here is probably
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* insufficient.
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*/
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*/
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current_regs = savestate;
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current_regs = savestate;
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