Tiva Timer: Add support to set the match regiser(s) relative to the timer counter (and prescale) registers. Enable match interrupts. These are one time interruprts: After the match interrupt is dispatched, further match interrupts are disabled
This commit is contained in:
Gregory Nutt
parent
fa4a54c5ad
commit
9cead4170b
@ -731,10 +731,10 @@
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#define TIMER_TnPMR_TnPSMR_MASK (0xff << TIMER_TnPMR_TnPSMR_SHIFT)
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# define TIMER_TnPMR_TnPSMR(n) ((uint32_t)(n) << TIMER_TnPMR_TnPSMR_SHIFT)
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/* GPTM Timer A (TAR) (32-bit value) */
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/* GPTM Timer B (TBR) (32-bit value) */
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/* GPTM Timer A Value (TAV) (32-bit value) */
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/* GPTM Timer B Value (TBV) (32-bit value) */
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/* GPTM Timer A (TAR) (16/32-bit value) */
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/* GPTM Timer B (TBR) (16/32-bit value) */
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/* GPTM Timer A Value (TAV) (16/32-bit value) */
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/* GPTM Timer B Value (TBV) (16/32-bit value) */
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/* GPTM RTC Predivide (RTCPD) */
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@ -446,8 +446,8 @@ static int tiva_timer32_interrupt(struct tiva_gptmstate_s *priv)
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DEBUGASSERT(priv && priv->attr && priv->config);
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/* Status flags are cleared by writing to the corresponding bits in the
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* GPTMICR register.
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/* Get the set of pending interrupts from the mask interrupt status
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* register.
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*/
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status = tiva_getreg(priv, TIVA_TIMER_MIS_OFFSET);
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@ -457,6 +457,16 @@ static int tiva_timer32_interrupt(struct tiva_gptmstate_s *priv)
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{
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tiva_putreg(priv, TIVA_TIMER_ICR_OFFSET, status);
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/* If this was a match interrupt, then disable further match
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* interrupts.
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*/
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if ((status & TIMER_INT_TAM) != 0)
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{
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priv->imr &= ~TIMER_INT_TAM;
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tiva_putreg(priv, TIVA_TIMER_IMR_OFFSET, priv->imr);
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}
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/* Get the timer configuration from the private state structure */
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config32 = (const struct tiva_gptm32config_s *)priv->config;
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@ -557,9 +567,7 @@ static int tiva_timer16_interrupt(struct tiva_gptmstate_s *priv, int tmndx)
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DEBUGASSERT(priv && priv->attr && priv->config && (unsigned)tmndx < 2);
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/* Status flags are cleared by writing to the corresponding bits in the
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* GPTMICR register.
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*/
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/* Read the masked interrupt status, masking out bits only for this timer. */
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intmask = tmndx ? TIMERB_INTS : TIMERA_INTS;
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status = tiva_getreg(priv, TIVA_TIMER_MIS_OFFSET) & intmask;
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@ -567,8 +575,20 @@ static int tiva_timer16_interrupt(struct tiva_gptmstate_s *priv, int tmndx)
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if (status != 0)
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{
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/* Clear all pending interrupts for this timer */
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tiva_putreg(priv, TIVA_TIMER_ICR_OFFSET, status);
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/* If this was a match interrupt, then disable further match
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* interrupts.
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*/
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if ((status & (TIMER_INT_TAM | TIMER_INT_TBM)) != 0)
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{
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priv->imr &= ~((TIMER_INT_TAM | TIMER_INT_TBM) & intmask);
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tiva_putreg(priv, TIVA_TIMER_IMR_OFFSET, priv->imr);
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}
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/* Get the timer configuration from the private state structure */
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config16 = (const struct tiva_gptm16config_s *)priv->config;
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@ -772,15 +792,31 @@ static int tiva_oneshot_periodic_mode32(struct tiva_gptmstate_s *priv,
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* starts from a value of 0.
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*/
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/* Setup defaults */
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/* Setup defaults */
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regval &= (TIMER_TnMR_TnCDIR | TIMER_TnMR_TnWOT | TIMER_TnMR_TnCDIR);
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regval |= TIMER_TnMR_TnCINTD;
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regval &= (TIMER_TnMR_TnCDIR | TIMER_TnMR_TnWOT | TIMER_TnMR_TnCDIR);
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regval |= TIMER_TnMR_TnCINTD;
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/* Enable snapshot mode? */
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/* Enable snapshot mode?
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*
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* In periodic, snap-shot mode (TnMR field is 0x2 and the TnSNAPS bit is
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* set in the GPTMTnMR register), the value of the timer at the time-out
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* event is loaded into the GPTMTnR register and the value of the
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* prescaler is loaded into the GPTMTnPS register. The free-running
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* counter value is shown in the GPTMTnV register. In this manner,
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* software can determine the time elapsed from the interrupt assertion
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* to the ISR entry by examining the snapshot values and the current value
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* of the free-running timer. Snapshot mode is not available when the
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* timer is configured in one-shot mode.
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*
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* TODO: Not implemented
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*/
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#warning Missing Logic
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/* Enable wait-on-trigger? */
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/* Enable wait-on-trigger?
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*
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* TODO: Not implemented
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*/
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#warning Missing Logic
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/* Enable one-shot/periodic interrupts? Enable interrupts only if an
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@ -826,13 +862,32 @@ static int tiva_oneshot_periodic_mode32(struct tiva_gptmstate_s *priv,
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* Writes to GPTMTBILR are ignored.
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*/
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tiva_putreg(priv, TIVA_TIMER_TAILR_OFFSET, timer->u.periodic.interval);
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regval = timer->u.periodic.interval;
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tiva_putreg(priv, TIVA_TIMER_TAILR_OFFSET, regval);
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/* Preload the timer counter register by setting the timer value register.
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* The timer value will be copied to the timer counter register on the
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* next clock cycle.
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*/
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if (timer->countup)
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{
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/* Count up from zero */
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tiva_putreg(priv, TIVA_TIMER_TAV_OFFSET, 0);
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}
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else
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{
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/* Count down from the timer reload value */
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tiva_putreg(priv, TIVA_TIMER_TAV_OFFSET, regval);
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}
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/* 6. If interrupts are required, set the appropriate bits in the GPTM
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* Interrupt Mask Register (GPTMIMR).
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*
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* NOTE: Interrupts are still disabled at the NVIC. Interrupts will
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* be enabled at the NVIC after ther timer is started.
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* be enabled at the NVIC after the timer is started.
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*/
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tiva_putreg(priv, TIVA_TIMER_IMR_OFFSET, priv->imr);
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@ -930,15 +985,31 @@ static int tiva_oneshot_periodic_mode16(struct tiva_gptmstate_s *priv,
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* starts from a value of 0.
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*/
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/* Setup defaults */
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/* Setup defaults */
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regval &= (TIMER_TnMR_TnCDIR | TIMER_TnMR_TnWOT | TIMER_TnMR_TnCDIR);
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regval |= TIMER_TnMR_TnCINTD;
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regval &= (TIMER_TnMR_TnCDIR | TIMER_TnMR_TnWOT | TIMER_TnMR_TnCDIR);
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regval |= TIMER_TnMR_TnCINTD;
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/* Enable snapshot mode? */
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/* Enable snapshot mode?
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*
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* In periodic, snap-shot mode (TnMR field is 0x2 and the TnSNAPS bit is
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* set in the GPTMTnMR register), the value of the timer at the time-out
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* event is loaded into the GPTMTnR register and the value of the
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* prescaler is loaded into the GPTMTnPS register. The free-running
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* counter value is shown in the GPTMTnV register. In this manner,
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* software can determine the time elapsed from the interrupt assertion
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* to the ISR entry by examining the snapshot values and the current value
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* of the free-running timer. Snapshot mode is not available when the
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* timer is configured in one-shot mode.
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*
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* TODO: Not implemented
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*/
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#warning Missing Logic
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/* Enable wait-on-trigger? */
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/* Enable wait-on-trigger?
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*
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* TODO: Not implemented
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*/
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#warning Missing Logic
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/* Enable one-shot/periodic interrupts? Enable interrupts only if an
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@ -984,14 +1055,34 @@ static int tiva_oneshot_periodic_mode16(struct tiva_gptmstate_s *priv,
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* (GPTMTnILR).
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*/
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regval = (uint32_t)timer->u.periodic.interval;
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regoffset = tmndx ? TIVA_TIMER_TBILR_OFFSET : TIVA_TIMER_TAILR_OFFSET;
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tiva_putreg(priv, regoffset, (uint32_t)timer->u.periodic.interval);
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tiva_putreg(priv, regoffset, regval);
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/* Preload the timer counter register by setting the timer value register.
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* The timer value will be copied to the timer counter register on the
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* next clock cycle.
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*/
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regoffset = tmndx ? TIVA_TIMER_TBV_OFFSET : TIVA_TIMER_TAV_OFFSET;
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if (timer->countup)
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{
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/* Count up from zero */
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tiva_putreg(priv, regoffset, 0);
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}
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else
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{
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/* Count down from the timer reload value */
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tiva_putreg(priv, regoffset, regval);
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}
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/* 6. If interrupts are required, set the appropriate bits in the GPTM
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* Interrupt Mask Register (GPTMIMR).
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*
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* NOTE: Interrupts are still disabled at the NVIC. Interrupts will
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* be enabled at the NVIC after ther timer is started.
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* be enabled at the NVIC after the timer is started.
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*/
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tiva_putreg(priv, TIVA_TIMER_IMR_OFFSET, priv->imr);
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@ -1793,3 +1884,255 @@ void tiva_timer16_stop(TIMER_HANDLE handle, int tmndx)
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clrbits = tmndx ? TIMER_CTL_TBEN : TIMER_CTL_TAEN;
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tiva_gptm_modifyreg(handle, TIVA_TIMER_CTL_OFFSET, clrbits, 0);
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}
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/****************************************************************************
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* Name: tiva_timer32_relmatch
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*
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* Description:
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* This function may be called at any time to change the timer interval
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* match value of a 32-bit timer. This function sets the match register
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* to the current timer counter register value PLUS the relative value
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* provided. The relative value then is some the offset to some timer
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* counter value in the future.
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*
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* If an interrupt handler is provided, then the match interrupt will also
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* be enabled. A single match interrupt will be generated; further match
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* interrupts will be disabled.
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*
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* NOTE: Use of this function is only meaningful for a free-runnning,
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* periodic timer.
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*
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* WARNING: For free-running timers, the relative match value should be
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* sufficiently far in the future to avoid race conditions.
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*
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* Input Parameters:
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* handle - The handle value returned by tiva_gptm_configure()
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* relmatch - The value to write to the timer match register
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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void tiva_timer32_relmatch(TIMER_HANDLE handle, uint32_t relmatch)
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{
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struct tiva_gptmstate_s *priv = (struct tiva_gptmstate_s *)handle;
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const struct tiva_timer32config_s *config;
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uintptr_t base;
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irqstate_t flags;
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uint32_t counter;
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uint32_t match;
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DEBUGASSERT(priv && priv->attr && priv->config &&
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priv->config->mode != TIMER16_MODE);
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/* Update the saved IMR if an interrupt will be needed */
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config = (const struct tiva_timer32config_s *)priv->config;
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if (config->handler)
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{
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/* Enable the match interrupt */
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priv->imr |= TIMER_INT_TAM;
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}
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/* This must be done without interrupt or context switches to minimize
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* race conditions with the free-running timer. Note that we also
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* by-pass the normal register accesses to keep the latency to a
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* minimum.
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*/
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base = priv->attr->base;
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flags = irqsave();
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/* Set the match register to the current value of the timer counter plus
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* the provided relative match value.
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*
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* NOTE that the prescale match is not used with the 32-bit timer.
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*/
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counter = getreg32(base + TIVA_TIMER_TAR_OFFSET);
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match = counter + relmatch;
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putreg32(match, base + TIVA_TIMER_TAMATCHR_OFFSET);
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/* Enable interrupts as necessary */
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putreg32(priv->imr, base + TIVA_TIMER_IMR_OFFSET);
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irqrestore(flags);
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#ifdef CONFIG_TIVA_TIMER_REGDEBUG
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/* Generate low-level debug output outside of the critical section */
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lldbg("%08x->%08x\n", base + TIVA_TIMER_TAR_OFFSET, counter);
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lldbg("%08x<-%08x\n", base + TIVA_TIMER_TAMATCHR_OFFSET, match);
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lldbg("%08x<-%08x\n", base + TIVA_TIMER_IMR_OFFSET, priv->imr);
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#endif
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}
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/****************************************************************************
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* Name: tiva_timer16_relmatch
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*
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* Description:
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* This function may be called at any time to change the timer interval
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* match value of a 16-bit timer. This function sets the match register
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* to the current timer counter register value PLUS the relative value
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* provided. The relative value then is some the offset to some timer
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* counter value in the future.
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*
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* If an interrupt handler is provided, then the match interrupt will also
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* be enabled. A single match interrupt will be generated; further match
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* interrupts will be disabled.
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*
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* NOTE: Use of this function is only meaningful for a free-runnning,
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* periodic timer.
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*
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* NOTE: The relmatch input is a really a 24-bit value; it is the 16-bit
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* match counter match value AND the 8-bit prescaler value. From the
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* callers point of view the match value is the 24-bit time to match
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* driven at the timer input clock frequency.
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*
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* When counting down in periodic modes, the prescaler contains the
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* least-significant bits of the count. When counting up, the prescaler
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* holds the most-significant bits of the count. But the caller is
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* protected from this complexity.
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*
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* WARNING: For free-running timers, the relative match value should be
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* sufficiently far in the future to avoid race conditions.
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*
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* Input Parameters:
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* handle - The handle value returned by tiva_gptm_configure()
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* relmatch - The value to write to the timer match register
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* tmndx - Either TIMER16A or TIMER16B to select the 16-bit timer
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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void tiva_timer16_relmatch(TIMER_HANDLE handle, uint32_t relmatch, int tmndx)
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{
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struct tiva_gptmstate_s *priv = (struct tiva_gptmstate_s *)handle;
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const struct tiva_gptm16config_s *gptm;
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const struct tiva_timer16config_s *config;
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irqstate_t flags;
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uintptr_t base;
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uintptr_t timerr;
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uintptr_t prescr;
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uintptr_t matchr;
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uintptr_t prematchr;
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uintptr_t imr;
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uint32_t timerv;
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uint32_t prescv;
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uint32_t matchv;
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uint32_t prematchv;
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uint32_t counter;
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bool countup;
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DEBUGASSERT(priv && priv->attr && priv->config &&
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priv->config->mode == TIMER16_MODE && (unsigned)tmndx < 2);
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/* Precalculate as much as possible before entering the critical section */
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gptm = (const struct tiva_gptm16config_s *)priv->config;
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base = priv->attr->base;
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if (tmndx)
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{
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/* Update the saved IMR if an interrupt will be needed */
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config = &gptm->config[TIMER16B];
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if (config->handler)
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{
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/* Enable the Timer B match interrupt */
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priv->imr |= TIMER_INT_TBM;
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}
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/* Get Timer B register addresses */
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timerr = base + TIVA_TIMER_TBR_OFFSET;
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prescr = base + TIVA_TIMER_TBPR_OFFSET;
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matchr = base + TIVA_TIMER_TBMATCHR_OFFSET;
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prematchr = base + TIVA_TIMER_TBPMR_OFFSET;
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}
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else
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{
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/* Update the saved IMR if an interrupt will be needed */
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config = &gptm->config[TIMER16A];
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if (config->handler)
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{
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/* Enable the Timer A match interrupt */
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priv->imr |= TIMER_INT_TAM;
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}
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/* Get Timer B register addresses */
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timerr = base + TIVA_TIMER_TAR_OFFSET;
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prescr = base + TIVA_TIMER_TAPR_OFFSET;
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matchr = base + TIVA_TIMER_TAMATCHR_OFFSET;
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prematchr = base + TIVA_TIMER_TAPMR_OFFSET;
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}
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imr = base + TIVA_TIMER_IMR_OFFSET;
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countup = config->countup;
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/* This must be done without interrupt or context switches to minimize
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* race conditions with the free-running timer. Note that we also
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* by-pass the normal register accesses to keep the latency to a
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* minimum.
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*/
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flags = irqsave();
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timerv = getreg32(timerr) & 0xffff;
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prescv = getreg32(prescr) & 0xff;
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/* Are we counting up or down? */
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if (countup)
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{
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/* When counting up in one-shot or periodic modes, the prescaler
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* acts as a timer extension and holds the most-significant bits
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* of the count
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*/
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counter = prescv << 16 | timerv;
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counter += relmatch;
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matchv = counter & 0xffff;
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prematchv = (counter >> 8) & 0xff;
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}
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else
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{
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/* When counting down in one-shot or periodic modes, the prescaler
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* acts as a true prescaler and contains the least-significant bits
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* of the count.
|
||||
*/
|
||||
|
||||
counter = timerv << 8 | prescv;
|
||||
counter += relmatch;
|
||||
matchv = (counter >> 8) & 0xffff;
|
||||
prematchv = counter & 0xff;
|
||||
}
|
||||
|
||||
/* Set the match and prescacle match registers */
|
||||
|
||||
putreg32(matchv, matchr);
|
||||
putreg32(prematchv, prematchr);
|
||||
|
||||
/* Enable interrupts as necessary */
|
||||
|
||||
putreg32(priv->imr, imr);
|
||||
irqrestore(flags);
|
||||
|
||||
#ifdef CONFIG_TIVA_TIMER_REGDEBUG
|
||||
/* Generate low-level debug output outside of the critical section */
|
||||
|
||||
lldbg("%08x->%08x\n", timerr, timerv);
|
||||
lldbg("%08x->%08x\n", prescr, prescv);
|
||||
lldbg("%08x<-%08x\n", matchr, matchv);
|
||||
lldbg("%08x<-%08x\n", prematchr, prematchv);
|
||||
lldbg("%08x<-%08x\n", imr, priv->imr);
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -476,62 +476,141 @@ static inline void tiva_timer16b_setload(TIMER_HANDLE handle, uint16_t load)
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: tiva_timer32_setmatch
|
||||
* Name: tiva_timer32_absmatch
|
||||
*
|
||||
* Description:
|
||||
* This function may be called at any time to change the timer interval
|
||||
* match value of a 32-bit timer.
|
||||
* match value of a 32-bit timer. This function sets the match register
|
||||
* the the absolute value specified.
|
||||
*
|
||||
* Input Parameters:
|
||||
* handle - The handle value returned by tiva_gptm_configure()
|
||||
* match - The value to write to the timer match register
|
||||
* handle - The handle value returned by tiva_gptm_configure()
|
||||
* absmatch - The absolute value to write to the timer match register
|
||||
*
|
||||
* Returned Value:
|
||||
* None.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void tiva_timer32_setmatch(TIMER_HANDLE handle, uint32_t match)
|
||||
static inline void tiva_timer32_absmatch(TIMER_HANDLE handle,
|
||||
uint32_t absmatch)
|
||||
{
|
||||
tiva_gptm_putreg(handle, TIVA_TIMER0_TAMATCHR, match);
|
||||
tiva_gptm_putreg(handle, TIVA_TIMER_TAMATCHR_OFFSET, absmatch);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: tiva_timer16_setmatch
|
||||
* Name: tiva_timer16_absmatch
|
||||
*
|
||||
* Description:
|
||||
* This function may be called at any time to change the timer interval
|
||||
* match value of a 16-bit timer.
|
||||
* match value of a 16-bit timer. This function sets the match register
|
||||
* the the absolute value specified.
|
||||
*
|
||||
* Input Parameters:
|
||||
* handle - The handle value returned by tiva_gptm_configure()
|
||||
* match - The value to write to the timer match register
|
||||
* tmndx - Either TIMER16A or TIMER16B to select the 16-bit timer
|
||||
* handle - The handle value returned by tiva_gptm_configure()
|
||||
* absmatch - The value to write to the timer match register
|
||||
* tmndx - Either TIMER16A or TIMER16B to select the 16-bit timer
|
||||
*
|
||||
* Returned Value:
|
||||
* None.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void tiva_timer16_setmatch(TIMER_HANDLE handle, uint16_t match,
|
||||
int tmndx)
|
||||
static inline void tiva_timer16_absmatch(TIMER_HANDLE handle,
|
||||
uint16_t absmatch, int tmndx)
|
||||
{
|
||||
unsigned int regoffset =
|
||||
tmndx ? TIVA_TIMER0_TBMATCHR : TIVA_TIMER0_TAMATCHR;
|
||||
tmndx ? TIVA_TIMER_TBMATCHR_OFFSET : TIVA_TIMER_TAMATCHR_OFFSET;
|
||||
|
||||
tiva_gptm_putreg(handle, regoffset, match);
|
||||
tiva_gptm_putreg(handle, regoffset, absmatch);
|
||||
}
|
||||
|
||||
static inline void tiva_timer16a_setmatch(TIMER_HANDLE handle, uint16_t match)
|
||||
static inline void tiva_timer16a_absmatch(TIMER_HANDLE handle, uint16_t absmatch)
|
||||
{
|
||||
tiva_gptm_putreg(handle, TIVA_TIMER0_TAMATCHR, match);
|
||||
tiva_gptm_putreg(handle, TIVA_TIMER_TAMATCHR_OFFSET, absmatch);
|
||||
}
|
||||
|
||||
static inline void tiva_timer16b_setmatch(TIMER_HANDLE handle, uint16_t match)
|
||||
static inline void tiva_timer16b_absmatch(TIMER_HANDLE handle, uint16_t absmatch)
|
||||
{
|
||||
tiva_gptm_putreg(handle, TIVA_TIMER0_TBMATCHR, match);
|
||||
tiva_gptm_putreg(handle, TIVA_TIMER_TBMATCHR_OFFSET, absmatch);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: tiva_timer32_relmatch
|
||||
*
|
||||
* Description:
|
||||
* This function may be called at any time to change the timer interval
|
||||
* match value of a 32-bit timer. This function sets the match register
|
||||
* to the current timer counter register value PLUS the relative value
|
||||
* provided. The relative value then is some the offset to some timer
|
||||
* counter value in the future.
|
||||
*
|
||||
* If an interrupt handler is provided, then the match interrupt will also
|
||||
* be enabled. A single match interrupt will be generated; further match
|
||||
* interrupts will be disabled.
|
||||
*
|
||||
* NOTE: Use of this function is only meaningful for a free-runnning,
|
||||
* periodic timer.
|
||||
*
|
||||
* WARNING: For free-running timers, the relative match value should be
|
||||
* sufficiently far in the future to avoid race conditions.
|
||||
*
|
||||
* Input Parameters:
|
||||
* handle - The handle value returned by tiva_gptm_configure()
|
||||
* relmatch - The value to write to the timer match register
|
||||
*
|
||||
* Returned Value:
|
||||
* None.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void tiva_timer32_relmatch(TIMER_HANDLE handle, uint32_t relmatch);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: tiva_timer16_relmatch
|
||||
*
|
||||
* Description:
|
||||
* This function may be called at any time to change the timer interval
|
||||
* match value of a 16-bit timer. This function sets the match register
|
||||
* to the current timer counter register value PLUS the relative value
|
||||
* provided. The relative value then is some the offset to some timer
|
||||
* counter value in the future.
|
||||
*
|
||||
* If an interrupt handler is provided, then the match interrupt will also
|
||||
* be enabled. A single match interrupt will be generated; further match
|
||||
* interrupts will be disabled.
|
||||
*
|
||||
* NOTE: Use of this function is only meaningful for a free-runnning,
|
||||
* periodic timer.
|
||||
*
|
||||
* NOTE: The relmatch input is a really a 24-bit value; it is the 16-bit
|
||||
* match counter match value AND the 8-bit prescaler value. From the
|
||||
* callers point of view the match value is the 24-bit time to match
|
||||
* driven at the timer input clock frequency.
|
||||
*
|
||||
* When counting down in periodic modes, the prescaler contains the
|
||||
* least-significant bits of the count. When counting up, the prescaler
|
||||
* holds the most-significant bits of the count. But the caller is
|
||||
* protected from this complexity.
|
||||
*
|
||||
* WARNING: For free-running timers, the relative match value should be
|
||||
* sufficiently far in the future to avoid race conditions.
|
||||
*
|
||||
* Input Parameters:
|
||||
* handle - The handle value returned by tiva_gptm_configure()
|
||||
* relmatch - The value to write to the timer match register
|
||||
* tmndx - Either TIMER16A or TIMER16B to select the 16-bit timer
|
||||
*
|
||||
* Returned Value:
|
||||
* None.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void tiva_timer16_relmatch(TIMER_HANDLE handle, uint32_t relmatch, int tmndx);
|
||||
|
||||
#define tiva_timer16a_relmatch(h,r) tiva_timer16_relmatch(h,r,TIMER16A)
|
||||
#define tiva_timer16b_relmatch(h,r) tiva_timer16_relmatch(h,r,TIMER16B)
|
||||
|
||||
/****************************************************************************
|
||||
* Name: tiva_gptm0_synchronize
|
||||
*
|
||||
|
||||
Loading…
Reference in New Issue
Block a user