From 9cf942bcb21b9e910ba2407005d5b17d106ae9b6 Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Thu, 13 Jun 2013 16:18:25 -0600
Subject: [PATCH] SAM3/4:  Loop counter for PLL delay must be volatile or it
 may get optimized away

---
 arch/arm/src/sam34/sam3u_clockconfig.c | 3 ++-
 configs/sam3u-ek/src/up_touchscreen.c  | 1 +
 drivers/serial/serialirq.c             | 7 ++++++-
 3 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/arch/arm/src/sam34/sam3u_clockconfig.c b/arch/arm/src/sam34/sam3u_clockconfig.c
index 71d918b8c2..500ed28391 100644
--- a/arch/arm/src/sam34/sam3u_clockconfig.c
+++ b/arch/arm/src/sam34/sam3u_clockconfig.c
@@ -151,7 +151,8 @@ static inline void sam_supcsetup(void)
 
 static void sam_pmcwait(uint32_t bit)
 {
-  uint32_t delay;
+  volatile uint32_t delay;
+
   for (delay = 0;
        (getreg32(SAM_PMC_SR) & bit) == 0 && delay < UINT32_MAX;
        delay++);
diff --git a/configs/sam3u-ek/src/up_touchscreen.c b/configs/sam3u-ek/src/up_touchscreen.c
index f8b465748e..ea2ad3d0ab 100644
--- a/configs/sam3u-ek/src/up_touchscreen.c
+++ b/configs/sam3u-ek/src/up_touchscreen.c
@@ -195,6 +195,7 @@ static bool tsc_busy(FAR struct ads7843e_config_s *state)
       last = busy;
     }
 #endif
+
   return busy;
 }
 
diff --git a/drivers/serial/serialirq.c b/drivers/serial/serialirq.c
index fda5b4afb5..8e3f80ead7 100644
--- a/drivers/serial/serialirq.c
+++ b/drivers/serial/serialirq.c
@@ -84,7 +84,7 @@ void uart_xmitchars(FAR uart_dev_t *dev)
 {
   uint16_t nbytes = 0;
 
-  /* Send while we still have data & room in the fifo */
+  /* Send while we still have data in the TX buffer & room in the fifo */
 
   while (dev->xmit.head != dev->xmit.tail && uart_txready(dev))
     {
@@ -103,6 +103,11 @@ void uart_xmitchars(FAR uart_dev_t *dev)
 
   /* When all of the characters have been sent from the buffer disable the TX
    * interrupt.
+   *
+   * Potential bug?  If nbytes == 0 && (dev->xmit.head == dev->xmit.tail) &&
+   * dev->xmitwaiting == true, then disabling the TX interrupt will leave
+   * the uart_write() logic waiting to TX to complete with no TX interrupts.
+   * Can that happen?
    */
 
   if (dev->xmit.head == dev->xmit.tail)