From 9d0ecedf7de8d0333b49fcf57eafbf96a0a22e8e Mon Sep 17 00:00:00 2001 From: Juha Niskanen Date: Thu, 20 Apr 2017 06:30:26 -0600 Subject: [PATCH] Add support for STM32L152CC, STM32L152RC and STM32L152VC. Update some bits and comments for other STM32L1 parts in chip.h --- arch/arm/include/stm32/chip.h | 109 ++++++++++++++++++++++++---- arch/arm/src/stm32/Kconfig | 130 +++++++++++++++++++++------------- 2 files changed, 176 insertions(+), 63 deletions(-) diff --git a/arch/arm/include/stm32/chip.h b/arch/arm/include/stm32/chip.h index df921df4b8..b56a6b3d61 100644 --- a/arch/arm/include/stm32/chip.h +++ b/arch/arm/include/stm32/chip.h @@ -108,7 +108,7 @@ # define STM32_NLCD 0 /* No LCD */ # define STM32_NUSBOTG 0 /* No USB OTG FS/HS (only USB 2.0 device) */ # define STM32_NGPIO 37 /* GPIOA-E,H */ -# define STM32_NADC 1 /* ADC1, 16-channels */ +# define STM32_NADC 1 /* ADC1, 14-channels */ # define STM32_NDAC 2 /* DAC 1-2, 2 channels */ /* (2) Comparators */ # define STM32_NCAPSENSE 13 /* Capacitive sensing channels */ @@ -228,10 +228,10 @@ # define STM32_NI2C 2 /* I2C1-2 */ # define STM32_NCAN 0 /* No CAN */ # define STM32_NSDIO 0 /* No SDIO */ -# define STM32_NLCD 1 /* LCD 4x16 */ +# define STM32_NLCD 1 /* LCD 4x18 */ # define STM32_NUSBOTG 0 /* No USB OTG FS/HS (only USB 2.0 device) */ # define STM32_NGPIO 37 /* GPIOA-E,H */ -# define STM32_NADC 1 /* ADC1, 16-channels */ +# define STM32_NADC 1 /* ADC1, 14-channels */ # define STM32_NDAC 2 /* DAC 1-2, 2 channels */ /* (2) Comparators */ # define STM32_NCAPSENSE 13 /* Capacitive sensing channels */ @@ -310,7 +310,7 @@ # define STM32_NI2C 2 /* I2C1-2 */ # define STM32_NCAN 0 /* No CAN */ # define STM32_NSDIO 0 /* No SDIO */ -# define STM32_NLCD 1 /* LCD 4x44, 8x40*/ +# define STM32_NLCD 1 /* LCD 4x44, 8x40 */ # define STM32_NUSBOTG 0 /* No USB OTG FS/HS (only USB 2.0 device) */ # define STM32_NGPIO 83 /* GPIOA-E,H */ # define STM32_NADC 1 /* ADC1, 24-channels */ @@ -322,6 +322,46 @@ # define STM32_NRNG 0 /* No random number generator (RNG) */ # define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ +#elif defined(CONFIG_ARCH_CHIP_STM32L152CC) +# define CONFIG_STM32_STM32L15XX 1 /* STM32L151xx and STM32L152xx family */ +# define CONFIG_STM32_ENERGYLITE 1 /* STM32L EnergyLite family */ +# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */ +# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes + * and STM32L15xxx */ +# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ +# define CONFIG_STM32_MEDIUMPLUSDENSITY 1 /* STM32L15xxC w/ 32/256 Kbytes */ +# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */ +# undef CONFIG_STM32_VALUELINE /* STM32F100x */ +# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */ +# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ +# undef CONFIG_STM32_STM32F30XX /* STM32F30xxx family */ +# undef CONFIG_STM32_STM32F33XX /* STM32F33xxx family */ +# undef CONFIG_STM32_STM32F37XX /* STM32F37xxx family */ +# undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx families */ +# define STM32_NFSMC 0 /* No FSMC */ +# define STM32_NATIM 0 /* No advanced timers */ +# define STM32_NGTIM 3 /* 16-bit general up/down timers TIM2-4 with DMA */ +# define STM32_NGTIMNDMA 3 /* 16-bit general timers TIM9-11 without DMA */ +# define STM32_NBTIM 2 /* 2 basic timers: TIM6, TIM7 with DMA */ +# define STM32_NDMA 2 /* DMA1, 7-channels, DMA2 (5 channels) */ +# define STM32_NSPI 3 /* SPI1-3 */ +# define STM32_NI2S 2 /* I2S1-2, overlapping with SPI2-3 */ +# define STM32_NUSART 3 /* USART1-3 */ +# define STM32_NI2C 2 /* I2C1-2 */ +# define STM32_NCAN 0 /* No CAN */ +# define STM32_NSDIO 0 /* No SDIO */ +# define STM32_NLCD 1 /* LCD 4x18 */ +# define STM32_NUSBOTG 1 /* USB OTG FS/HS (only USB 2.0 device) */ +# define STM32_NGPIO 37 /* GPIOA-E,H */ +# define STM32_NADC 1 /* ADC1, 14-channels */ +# define STM32_NDAC 2 /* DAC 1-2, 2 channels */ + /* (2) Comparators */ +# define STM32_NCAPSENSE 16 /* Capacitive sensing channels */ +# define STM32_NCRC 1 /* CRC */ +# define STM32_NETHERNET 0 /* No ethernet */ +# define STM32_NRNG 0 /* No random number generator (RNG) */ +# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ + #elif defined(CONFIG_ARCH_CHIP_STM32L152RC) # define CONFIG_STM32_STM32L15XX 1 /* STM32L151xx and STM32L152xx family */ # define CONFIG_STM32_ENERGYLITE 1 /* STM32L EnergyLite family */ @@ -336,6 +376,7 @@ # undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ # undef CONFIG_STM32_STM32F30XX /* STM32F30xxx family */ # undef CONFIG_STM32_STM32F33XX /* STM32F33xxx family */ +# undef CONFIG_STM32_STM32F37XX /* STM32F37xxx family */ # undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx families */ # define STM32_NFSMC 0 /* No FSMC */ # define STM32_NATIM 0 /* No advanced timers */ @@ -349,13 +390,53 @@ # define STM32_NI2C 2 /* I2C1-2 */ # define STM32_NCAN 0 /* No CAN */ # define STM32_NSDIO 0 /* No SDIO */ -# define STM32_NLCD 1 /* LCD 4x44, 8x40*/ +# define STM32_NLCD 1 /* LCD 4x32, 8x28 */ # define STM32_NUSBOTG 1 /* USB OTG FS/HS (only USB 2.0 device) */ -# define STM32_NGPIO 83 /* GPIOA-E,H */ -# define STM32_NADC 1 /* ADC1, 24-channels */ +# define STM32_NGPIO 51 /* GPIOA-E,H */ +# define STM32_NADC 1 /* ADC1, 21-channels */ # define STM32_NDAC 2 /* DAC 1-2, 2 channels */ /* (2) Comparators */ -# define STM32_NCAPSENSE 20 /* Capacitive sensing channels */ +# define STM32_NCAPSENSE 23 /* Capacitive sensing channels */ +# define STM32_NCRC 1 /* CRC */ +# define STM32_NETHERNET 0 /* No ethernet */ +# define STM32_NRNG 0 /* No random number generator (RNG) */ +# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ + +#elif defined(CONFIG_ARCH_CHIP_STM32L152VC) +# define CONFIG_STM32_STM32L15XX 1 /* STM32L151xx and STM32L152xx family */ +# define CONFIG_STM32_ENERGYLITE 1 /* STM32L EnergyLite family */ +# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */ +# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes + * and STM32L15xxx */ +# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ +# define CONFIG_STM32_MEDIUMPLUSDENSITY 1 /* STM32L15xxC w/ 32/256 Kbytes */ +# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */ +# undef CONFIG_STM32_VALUELINE /* STM32F100x */ +# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */ +# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ +# undef CONFIG_STM32_STM32F30XX /* STM32F30xxx family */ +# undef CONFIG_STM32_STM32F33XX /* STM32F33xxx family */ +# undef CONFIG_STM32_STM32F37XX /* STM32F37xxx family */ +# undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx families */ +# define STM32_NFSMC 0 /* No FSMC */ +# define STM32_NATIM 0 /* No advanced timers */ +# define STM32_NGTIM 3 /* 16-bit general up/down timers TIM2-4 with DMA */ +# define STM32_NGTIMNDMA 3 /* 16-bit general timers TIM9-11 without DMA */ +# define STM32_NBTIM 2 /* 2 basic timers: TIM6, TIM7 with DMA */ +# define STM32_NDMA 2 /* DMA1, 7-channels, DMA2 (5 channels) */ +# define STM32_NSPI 3 /* SPI1-3 */ +# define STM32_NI2S 2 /* I2S1-2, overlapping with SPI2-3 */ +# define STM32_NUSART 3 /* USART1-3 */ +# define STM32_NI2C 2 /* I2C1-2 */ +# define STM32_NCAN 0 /* No CAN */ +# define STM32_NSDIO 0 /* No SDIO */ +# define STM32_NLCD 1 /* LCD 4x44, 8x40 */ +# define STM32_NUSBOTG 1 /* USB OTG FS/HS (only USB 2.0 device) */ +# define STM32_NGPIO 83 /* GPIOA-E,H */ +# define STM32_NADC 1 /* ADC1, 25-channels */ +# define STM32_NDAC 2 /* DAC 1-2, 2 channels */ + /* (2) Comparators */ +# define STM32_NCAPSENSE 23 /* Capacitive sensing channels */ # define STM32_NCRC 1 /* CRC */ # define STM32_NETHERNET 0 /* No ethernet */ # define STM32_NRNG 0 /* No random number generator (RNG) */ @@ -375,6 +456,7 @@ # undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ # undef CONFIG_STM32_STM32F30XX /* STM32F30xxx family */ # undef CONFIG_STM32_STM32F33XX /* STM32F33xxx family */ +# undef CONFIG_STM32_STM32F37XX /* STM32F37xxx family */ # undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx families */ # define STM32_NFSMC 1 /* FSMC */ # define STM32_NATIM 0 /* No advanced timers */ @@ -389,13 +471,13 @@ # define STM32_NI2C 2 /* I2C1-2 */ # define STM32_NCAN 0 /* No CAN */ # define STM32_NSDIO 1 /* SDIO */ -# define STM32_NLCD 1 /* LCD 4x44, 8x40*/ +# define STM32_NLCD 1 /* LCD 4x44, 8x40 */ # define STM32_NUSBOTG 1 /* USB OTG FS/HS (only USB 2.0 device) */ # define STM32_NGPIO 115 /* GPIOA-G,H */ -# define STM32_NADC 1 /* ADC1, 24-channels */ +# define STM32_NADC 1 /* ADC1, 40-channels */ # define STM32_NDAC 2 /* DAC 1-2, 2 channels */ /* (2) Comparators */ -# define STM32_NCAPSENSE 20 /* Capacitive sensing channels */ +# define STM32_NCAPSENSE 34 /* Capacitive sensing channels */ # define STM32_NCRC 1 /* CRC */ # define STM32_NETHERNET 0 /* No ethernet */ # define STM32_NRNG 0 /* No random number generator (RNG) */ @@ -415,6 +497,7 @@ # undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ # undef CONFIG_STM32_STM32F30XX /* STM32F30xxx family */ # undef CONFIG_STM32_STM32F33XX /* STM32F33xxx family */ +# undef CONFIG_STM32_STM32F37XX /* STM32F37xxx family */ # undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx families */ # define STM32_NFSMC 0 /* No FSMC */ # define STM32_NATIM 0 /* No advanced timers */ @@ -433,8 +516,8 @@ # define STM32_NUSBOTG 1 /* USB OTG FS/HS (only USB 2.0 device) */ # define STM32_NGPIO 83 /* GPIOA-G,H */ -# define STM32_NADC 1 /* ADC1, up to 40-channels (medium+ and high density). See for more information RM0038 Reference manual */ -# define STM32_NDAC 1 /* DAC 1, 2 channels. See for more information RM0038 Reference manual */ +# define STM32_NADC 1 /* ADC1, 25-channels */ +# define STM32_NDAC 2 /* DAC 1-2, 2 channels */ /* (2) Comparators */ # define STM32_NCAPSENSE 23 /* Capacitive sensing channels */ # define STM32_NCRC 1 /* CRC */ diff --git a/arch/arm/src/stm32/Kconfig b/arch/arm/src/stm32/Kconfig index 79c103ea9c..262017a34b 100644 --- a/arch/arm/src/stm32/Kconfig +++ b/arch/arm/src/stm32/Kconfig @@ -16,7 +16,7 @@ config ARCH_CHIP_STM32L151C6 select STM32_STM32L15XX select STM32_ENERGYLITE ---help--- - STM32L 48-pin EnergyLite, 32KB FLASH, 10KB SRAM, 4KB EEPRROM + STM32L 48-pin EnergyLite, 32KB FLASH, 10KB SRAM, 4KB EEPROM config ARCH_CHIP_STM32L151C8 bool "STM32L151C8" @@ -24,7 +24,7 @@ config ARCH_CHIP_STM32L151C8 select STM32_STM32L15XX select STM32_ENERGYLITE ---help--- - STM32L 48-pin EnergyLite, 64KB FLASH, 10KB SRAM, 4KB EEPRROM + STM32L 48-pin EnergyLite, 64KB FLASH, 10KB SRAM, 4KB EEPROM config ARCH_CHIP_STM32L151CB bool "STM32L151CB" @@ -32,7 +32,7 @@ config ARCH_CHIP_STM32L151CB select STM32_STM32L15XX select STM32_ENERGYLITE ---help--- - STM32L 48-pin EnergyLite, 128KB FLASH, 16KB SRAM, 4KB EEPRROM + STM32L 48-pin EnergyLite, 128KB FLASH, 16KB SRAM, 4KB EEPROM config ARCH_CHIP_STM32L151R6 bool "STM32L151R6" @@ -40,7 +40,7 @@ config ARCH_CHIP_STM32L151R6 select STM32_STM32L15XX select STM32_ENERGYLITE ---help--- - STM32L 64-pin EnergyLite, 32KB FLASH, 10KB SRAM, 4KB EEPRROM + STM32L 64-pin EnergyLite, 32KB FLASH, 10KB SRAM, 4KB EEPROM config ARCH_CHIP_STM32L151R8 bool "STM32L151R8" @@ -48,7 +48,7 @@ config ARCH_CHIP_STM32L151R8 select STM32_STM32L15XX select STM32_ENERGYLITE ---help--- - STM32L 64-pin EnergyLite, 64KB FLASH, 10KB SRAM, 4KB EEPRROM + STM32L 64-pin EnergyLite, 64KB FLASH, 10KB SRAM, 4KB EEPROM config ARCH_CHIP_STM32L151RB bool "STM32L151RB" @@ -56,7 +56,7 @@ config ARCH_CHIP_STM32L151RB select STM32_STM32L15XX select STM32_ENERGYLITE ---help--- - STM32L 64-pin EnergyLite, 128KB FLASH, 16KB SRAM, 4KB EEPRROM + STM32L 64-pin EnergyLite, 128KB FLASH, 16KB SRAM, 4KB EEPROM config ARCH_CHIP_STM32L151V6 bool "STM32L151V6" @@ -64,7 +64,7 @@ config ARCH_CHIP_STM32L151V6 select STM32_STM32L15XX select STM32_ENERGYLITE ---help--- - STM32L 100-pin EnergyLite, 32KB FLASH, 10KB SRAM, 4KB EEPRROM + STM32L 100-pin EnergyLite, 32KB FLASH, 10KB SRAM, 4KB EEPROM config ARCH_CHIP_STM32L151V8 bool "STM32L151V8" @@ -72,7 +72,7 @@ config ARCH_CHIP_STM32L151V8 select STM32_STM32L15XX select STM32_ENERGYLITE ---help--- - STM32L 100-pin EnergyLite, 64KB FLASH, 10KB SRAM, 4KB EEPRROM + STM32L 100-pin EnergyLite, 64KB FLASH, 10KB SRAM, 4KB EEPROM config ARCH_CHIP_STM32L151VB bool "STM32L151VB" @@ -80,7 +80,7 @@ config ARCH_CHIP_STM32L151VB select STM32_STM32L15XX select STM32_ENERGYLITE ---help--- - STM32L 100-pin EnergyLite, 128KB FLASH, 16KB SRAM, 4KB EEPRROM + STM32L 100-pin EnergyLite, 128KB FLASH, 16KB SRAM, 4KB EEPROM config ARCH_CHIP_STM32L152C6 bool "STM32L152C6" @@ -88,8 +88,8 @@ config ARCH_CHIP_STM32L152C6 select STM32_STM32L15XX select STM32_ENERGYLITE ---help--- - STM32L 48-pin EnergyLite, 32KB FLASH, 10KB SRAM, 4KB EEPRROM with - 4x16 LCD interface + STM32L 48-pin EnergyLite, 32KB FLASH, 10KB SRAM, 4KB EEPROM with + 4x18 LCD interface config ARCH_CHIP_STM32L152C8 bool "STM32L152C8" @@ -97,8 +97,8 @@ config ARCH_CHIP_STM32L152C8 select STM32_STM32L15XX select STM32_ENERGYLITE ---help--- - STM32L 48-pin EnergyLite, 64KB FLASH, 10KB SRAM, 4KB EEPRROM with - 4x16 LCD interface + STM32L 48-pin EnergyLite, 64KB FLASH, 10KB SRAM, 4KB EEPROM with + 4x18 LCD interface config ARCH_CHIP_STM32L152CB bool "STM32L152CB" @@ -106,8 +106,8 @@ config ARCH_CHIP_STM32L152CB select STM32_STM32L15XX select STM32_ENERGYLITE ---help--- - STM32L 48-pin EnergyLite, 128KB FLASH, 16KB SRAM, 4KB EEPRROM with - 4x16 LCD interface + STM32L 48-pin EnergyLite, 128KB FLASH, 16KB SRAM, 4KB EEPROM with + 4x18 LCD interface config ARCH_CHIP_STM32L152R6 bool "STM32L152R6" @@ -115,7 +115,7 @@ config ARCH_CHIP_STM32L152R6 select STM32_STM32L15XX select STM32_ENERGYLITE ---help--- - STM32L 64-pin EnergyLite, 32KB FLASH, 10KB SRAM, 4KB EEPRROM with + STM32L 64-pin EnergyLite, 32KB FLASH, 10KB SRAM, 4KB EEPROM with 4x32/8x28 LCD interface config ARCH_CHIP_STM32L152R8 @@ -124,7 +124,7 @@ config ARCH_CHIP_STM32L152R8 select STM32_STM32L15XX select STM32_ENERGYLITE ---help--- - STM32L 64-pin EnergyLite, 64KB FLASH, 10KB SRAM, 4KB EEPRROM with + STM32L 64-pin EnergyLite, 64KB FLASH, 10KB SRAM, 4KB EEPROM with 4x32/8x28 LCD interface config ARCH_CHIP_STM32L152RB @@ -133,7 +133,7 @@ config ARCH_CHIP_STM32L152RB select STM32_STM32L15XX select STM32_ENERGYLITE ---help--- - STM32L 64-pin EnergyLite, 128KB FLASH, 16KB SRAM, 4KB EEPRROM with + STM32L 64-pin EnergyLite, 128KB FLASH, 16KB SRAM, 4KB EEPROM with 4x32/8x28 LCD interface config ARCH_CHIP_STM32L152V6 @@ -142,7 +142,7 @@ config ARCH_CHIP_STM32L152V6 select STM32_STM32L15XX select STM32_ENERGYLITE ---help--- - STM32L 100-pin EnergyLite, 32KB FLASH, 10KB SRAM, 4KB EEPRROM with + STM32L 100-pin EnergyLite, 32KB FLASH, 10KB SRAM, 4KB EEPROM with 4x44/8x40 LCD interface config ARCH_CHIP_STM32L152V8 @@ -151,7 +151,7 @@ config ARCH_CHIP_STM32L152V8 select STM32_STM32L15XX select STM32_ENERGYLITE ---help--- - STM32L 100-pin EnergyLite, 64KB FLASH, 10KB SRAM, 4KB EEPRROM with + STM32L 100-pin EnergyLite, 64KB FLASH, 10KB SRAM, 4KB EEPROM with 4x44/8x40 LCD interface config ARCH_CHIP_STM32L152VB @@ -160,7 +160,37 @@ config ARCH_CHIP_STM32L152VB select STM32_STM32L15XX select STM32_ENERGYLITE ---help--- - STM32L 100-pin EnergyLite, 128KB FLASH, 16KB SRAM, 4KB EEPRROM with + STM32L 100-pin EnergyLite, 128KB FLASH, 16KB SRAM, 4KB EEPROM with + 4x44/8x40 LCD interface + +config ARCH_CHIP_STM32L152CC + bool "STM32L152CC" + select ARCH_CORTEXM3 + select STM32_STM32L15XX + select STM32_ENERGYLITE + select STM32_MEDIUMPLUSDENSITY + ---help--- + STM32L 48-pin EnergyLite, 256KB FLASH, 32KB SRAM, 8KB EEPROM with + 4x18 LCD interface + +config ARCH_CHIP_STM32L152RC + bool "STM32L152RC" + select ARCH_CORTEXM3 + select STM32_STM32L15XX + select STM32_ENERGYLITE + select STM32_MEDIUMPLUSDENSITY + ---help--- + STM32L 64-pin EnergyLite, 256KB FLASH, 32KB SRAM, 8KB EEPROM with + 4x32/8x28 LCD interface + +config ARCH_CHIP_STM32L152VC + bool "STM32L152VC" + select ARCH_CORTEXM3 + select STM32_STM32L15XX + select STM32_ENERGYLITE + select STM32_MEDIUMPLUSDENSITY + ---help--- + STM32L 100-pin EnergyLite, 256KB FLASH, 32KB SRAM, 8KB EEPROM with 4x44/8x40 LCD interface config ARCH_CHIP_STM32L162ZD @@ -171,8 +201,8 @@ config ARCH_CHIP_STM32L162ZD select STM32_HIGHDENSITY select STM32_HAVE_AES ---help--- - STM32L 144-pin EnergyLite, 384KB FLASH, 48KB SRAM, 12KB EEPRROM with - 8x40 LCD interface + STM32L 144-pin EnergyLite, 384KB FLASH, 48KB SRAM, 12KB EEPROM with + 4x44/8x40 LCD interface config ARCH_CHIP_STM32L162VE bool "STM32L162VE" @@ -182,8 +212,8 @@ config ARCH_CHIP_STM32L162VE select STM32_HIGHDENSITY select STM32_HAVE_AES ---help--- - STM32L 100-pin EnergyLite, 512KB FLASH, 80KB SRAM, 16KB EEPRROM with - 8x40 LCD interface + STM32L 100-pin EnergyLite, 512KB FLASH, 80KB SRAM, 16KB EEPROM with + 4x44/8x40 LCD interface config ARCH_CHIP_STM32F100C8 bool "STM32F100C8" @@ -1445,7 +1475,7 @@ config STM32_STM32F303 config STM32_STM32F33XX bool - default n + default n select STM32_HAVE_HRTIM1 select STM32_HAVE_COMP2 select STM32_HAVE_COMP4 @@ -1715,8 +1745,8 @@ config STM32_STM32F469 select STM32_HAVE_SPI4 select STM32_HAVE_SPI5 select STM32_HAVE_SPI6 - select STM32_HAVE_SAIPLL - select STM32_HAVE_I2SPLL + select STM32_HAVE_SAIPLL + select STM32_HAVE_I2SPLL config STM32_DFU @@ -1909,32 +1939,32 @@ config STM32_HAVE_CAN2 default n config STM32_HAVE_COMP1 - bool - default n + bool + default n config STM32_HAVE_COMP2 - bool - default n + bool + default n config STM32_HAVE_COMP3 - bool - default n + bool + default n config STM32_HAVE_COMP4 - bool - default n + bool + default n config STM32_HAVE_COMP5 - bool - default n + bool + default n config STM32_HAVE_COMP6 - bool - default n + bool + default n config STM32_HAVE_COMP7 - bool - default n + bool + default n config STM32_HAVE_DAC1 bool @@ -1989,20 +2019,20 @@ config STM32_HAVE_I2SPLL default n config STM32_HAVE_OPAMP1 - bool - default n + bool + default n config STM32_HAVE_OPAMP2 - bool - default n + bool + default n config STM32_HAVE_OPAMP3 - bool - default n + bool + default n config STM32_HAVE_OPAMP4 - bool - default n + bool + default n # These are the peripheral selections proper