Open1788 OpenOCD support
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5730 42af7a65-404d-4744-a932-0658087f49c3
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patacongo
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@ -11,6 +11,7 @@ CONTENTS
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o LEDs
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o Buttons
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o FPU
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o Using OpenOCD with the Olimex ARM-USB-OCD
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o Configuration
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LEDs
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@ -152,8 +153,122 @@ See the section above on Toolchains, NOTE 2, for explanations for some of
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the configuration settings. Some of the usual settings are just not supported
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by the "Lite" version of the Atollic toolchain.
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CONFIGURURATION
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===============
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Using OpenOCD with the Olimex ARM-USB-OCD
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=========================================
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Building OpenOCD under Cygwin:
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Refer to configs/olimex-lpc1766stk/README.txt
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Installing OpenOCD in Ubuntu Linux:
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sudo apt-get install openocd
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Helper Scripts.
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I have been using the Olimex ARM-USB-OCD debugger. OpenOCD
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requires a configuration file. I keep the one I used last here:
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configs/open1788/tools/open1788.cfg
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However, the "correct" configuration script to use with OpenOCD may
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change as the features of OpenOCD evolve. So you should at least
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compare that open1788.cfg file with configuration files in
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/usr/share/openocd/scripts. As of this writing, the configuration
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files of interest were:
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/usr/local/share/openocd/scripts/interface/openocd-usb.cfg
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This is the configuration file for the Olimex ARM-USB-OCD
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debugger. Select a different file if you are using some
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other debugger supported by OpenOCD.
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/usr/local/share/openocd/scripts/board/?
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I don't see a board configuration file for the WaveShare
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Open1788 board.
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/usr/local/share/openocd/scripts/target/lpc1788.cfg
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This is the configuration file for the the LPC1788 target.
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It just sets up a few parameters then sources lpc17xx.cfg
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/usr/local/share/openocd/scripts/target/lpc17xx.cfg
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This is the generic LPC configuration for the LPC17xx
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family. It is included by lpc1788.cfg.
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NOTE: These files could also be located under /usr/share in some
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installations. They could be most anywhwere if you are using a
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windows version of OpenOCD.
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configs/open1788/tools/open1788.cfg
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This is simply openocd-usb.cfg, lpc1788.cfg, and lpc17xx.cfg
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concatenated into one file for convenience. Don't use it
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unless you have to.
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There is also a script on the tools/ directory that I use to start
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the OpenOCD daemon on my system called oocd.sh. That script will
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probably require some modifications to work in another environment:
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- Possibly the value of OPENOCD_PATH and TARGET_PATH
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- It assumes that the correct script to use is the one at
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configs/open1788/tools/open1788.cfg
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Starting OpenOCD
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Then you should be able to start the OpenOCD daemon as follows. This
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assumes that you have already CD'ed to the NuttX build directory:
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. ./setenv.sh
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oocd.sh $PWD
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The setenv.sh script is a convenience script that you may choose to
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use or not. It simply sets up the PATH variable so that you can
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automatically find oocd.sh. You could also do:
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configs/open1788/tools/oocd.sh $PWD
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Connecting GDB
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Once the OpenOCD daemon has been started, you can connect to it via
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GDB using the following GDB command:
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arm-nuttx-elf-gdb
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(gdb) target remote localhost:3333
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NOTE: The name of your GDB program may differ. For example, with the
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CodeSourcery toolchain, the ARM GDB would be called arm-none-eabi-gdb.
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OpenOCD will support several special 'monitor' sub-commands. You can
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use the 'monitor' (or simply 'mon') command to invoke these sub-
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commands. These GDB commands will send comments to the OpenOCD monitor.
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Here are a couple that you will need to use:
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(gdb) monitor reset
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(gdb) monitor halt
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NOTES:
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1. The MCU must be halted using 'monitor halt' prior to loading code.
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2. 'monitor reset' will restart the processor after loading code.
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3. The 'monitor' command can be abbreviated as just 'mon'.
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After starting GDB, you can load the NuttX ELF file:
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(gdb) mon halt
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(gdb) load nuttx
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NOTES:
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1. NuttX should have been built so that it has debugging symbols
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(by setting CONFIG_DEBUG_SYMBOLS=y in the .config file).
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2. The MCU must be halted prior to loading code.
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3. I find that there are often undetected write failures. I usually
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load nuttx twice to assure good FLASH contents:
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(gdb) mon halt
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(gdb) load nuttx
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(gdb) mon reset
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(gdb) mon halt
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(gdb) load nuttx
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CONFIGURATION
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=============
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ostest
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------
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57
configs/open1788/tools/oocd.sh
Executable file
57
configs/open1788/tools/oocd.sh
Executable file
@ -0,0 +1,57 @@
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#!/bin/sh
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#
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# See configs/open1788/README.txt for information about
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# this file.
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TOPDIR=$1
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USAGE="$0 <TOPDIR> [-d]"
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if [ -z "${TOPDIR}" ]; then
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echo "Missing argument"
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echo $USAGE
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exit 1
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fi
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# Assume that OpenOCD was installed and at /usr/local/bin. Uncomment
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# the following to run directly from the build directory
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# OPENOCD_PATH="/home/OpenOCD/openocd/src"
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# OPENOCD_PATH="/usr/bin"
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OPENOCD_PATH="/usr/local/bin"
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# TARGET_PATH="/home/OpenOCD/openocd/tcl"
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# TARGET_PATH="/usr/share/openocd/scripts"
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TARGET_PATH="/usr/local/share/openocd/scripts"
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# Assume a Unix development environment. Uncomment to use a Windows
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# like environment
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OPENOCD_EXE=openocd.exe
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# OPENOCD_EXE=openocd
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OPENOCD_CFG="${TOPDIR}/configs/open1788/tools/open1788.cfg"
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OPENOCD_ARGS="-f ${OPENOCD_CFG} -s ${TARGET_PATH}"
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if [ "X$2" = "X-d" ]; then
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OPENOCD_ARGS=$OPENOCD_ARGS" -d3"
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set -x
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fi
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if [ ! -d ${OPENOCD_PATH} ]; then
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echo "OpenOCD path does not exist: ${OPENOCD_PATH}"
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exit 1
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fi
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if [ ! -x ${OPENOCD_PATH}/${OPENOCD_EXE} ]; then
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echo "OpenOCD does not exist: ${OPENOCD_PATH}/${OPENOCD_EXE}"
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exit 1
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fi
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if [ ! -f ${OPENOCD_CFG} ]; then
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echo "OpenOCD config file does not exist: ${OPENOCD_CFG}"
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exit 1
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fi
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echo "Starting OpenOCD"
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cd ${OPENOCD_PATH} || { echo "Failed to CD to ${OPENOCD_PATH}"; exit 1; }
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${OPENOCD_EXE} ${OPENOCD_ARGS} &
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echo "OpenOCD daemon started"
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ps -ef | grep openocd
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echo "In GDB: target remote localhost:3333"
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122
configs/open1788/tools/open1788.cfg
Executable file
122
configs/open1788/tools/open1788.cfg
Executable file
@ -0,0 +1,122 @@
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### From /usr/local/share/openocd/scripts/interface/olimex-arm-usb-ocd.cfg
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#
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# Olimex ARM-USB-OCD
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#
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# http://www.olimex.com/dev/arm-usb-ocd.html
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#
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interface ft2232
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ft2232_device_desc "Olimex OpenOCD JTAG A"
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ft2232_layout olimex-jtag
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ft2232_vid_pid 0x15ba 0x0003
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### From /usr/local/share/openocd/scripts/targets/lpc1788.cfg
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# NXP LPC1788 Cortex-M3 with 512kB Flash and 96kB Local On-Chip SRAM
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# remember to place in the same folder as lpc17xx.cfg
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set CHIPNAME lpc1788
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set CPUTAPID 0x4ba00477
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set CPURAMSIZE 0x18000
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set CPUROMSIZE 0x80000
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# After reset the chip is clocked by the ~4MHz internal RC oscillator.
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# When board-specific code (reset-init handler or device firmware)
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# configures another oscillator and/or PLL0, set CCLK to match; if
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# you don't, then flash erase and write operations may misbehave.
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# (The ROM code doing those updates cares about core clock speed...)
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#
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# CCLK is the core clock frequency in KHz
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set CCLK 12000
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### From /usr/local/share/openocd/scripts/targets/lpc17xx.cfg
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# Common LPC17xx logic
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# LPC17xx chips support both JTAG and SWD transports.
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# JTAG is hard-coded in this configuration
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# Adapt based on what transport is active.
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# source [find target/swj-dp.tcl]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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error "_CHIPNAME not set"
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}
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# After reset the chip is clocked by the ~4MHz internal RC oscillator.
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# When board-specific code (reset-init handler or device firmware)
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# configures another oscillator and/or PLL0, set CCLK to match; if
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# you don't, then flash erase and write operations may misbehave.
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# (The ROM code doing those updates cares about core clock speed...)
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#
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# CCLK is the core clock frequency in KHz
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if { [info exists CCLK] } {
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set _CCLK $CCLK
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} else {
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set _CCLK 4000
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}
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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error "_CPUTAPID not set"
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}
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if { [info exists CPURAMSIZE] } {
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set _CPURAMSIZE $CPURAMSIZE
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} else {
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error "_CPURAMSIZE not set"
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}
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if { [info exists CPUROMSIZE] } {
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set _CPUROMSIZE $CPUROMSIZE
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} else {
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error "_CPUROMSIZE not set"
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}
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#delays on reset lines
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adapter_nsrst_delay 500
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jtag_ntrst_delay 500
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# Use of JTAG is hard-coded
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#swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
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jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m3 -chain-position $_TARGETNAME
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# The LPC17xx devices have 8/16/32kB of SRAM In the ARMv7-M "Code" area (at 0x10000000)
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$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size $_CPURAMSIZE
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# The LPC17xx devices have 32/64/128/256/512kB of flash memory, managed by ROM code
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# (including a boot loader which verifies the flash exception table's checksum).
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# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME lpc2000 0x0 $_CPUROMSIZE 0 0 $_TARGETNAME \
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lpc1700 $_CCLK calc_checksum
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# Run with *real slow* clock by default since the
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# boot rom could have been playing with the PLL, so
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# we have no idea what clock the target is running at.
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adapter_khz 1000
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$_TARGETNAME configure -event reset-init {
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# Do not remap 0x0000-0x0020 to anything but the flash (i.e. select
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# "User Flash Mode" where interrupt vectors are _not_ remapped,
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# and reside in flash instead).
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#
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# See Table 612. Memory Mapping Control register (MEMMAP - 0x400F C040) bit description
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# Bit Symbol Value Description Reset
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# value
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# 0 MAP Memory map control. 0
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# 0 Boot mode. A portion of the Boot ROM is mapped to address 0.
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# 1 User mode. The on-chip Flash memory is mapped to address 0.
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# 31:1 - Reserved. The value read from a reserved bit is not defined. NA
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#
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# http://ics.nxp.com/support/documents/microcontrollers/?scope=LPC1768&type=user
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mww 0x4ba00477 0x01
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}
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# if srst is not fitted use VECTRESET to
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# perform a soft reset - SYSRESETREQ is not supported
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cortex_m3 reset_config vectreset
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