Fix offset to STM32 F1 AFIO EXTICR register
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4309 42af7a65-404d-4744-a932-0658087f49c3
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patacongo
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@ -2376,3 +2376,8 @@
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code complete, but still untested.
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* confgs/sim/*/Make.defs and arch/sim/src/Makefile: Add support for building
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a 32-bit executable on a 64-bit Linux target.
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* configs/sure-pic32mx/src/up_leds.c: Correct GPIOs used for LEDs. The wrong
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pins were being used.
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* arch/arm/src/stm32/chip/stm32f10xxx_gpio.h: Correct offset to one AFIO EXICR
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register.
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@ -1,8 +1,8 @@
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/************************************************************************************
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* arch/arm/src/stm32/chip/stm32f10xxx_gpio.h
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*
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* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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* Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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@ -136,7 +136,7 @@
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#define STM32_AFIO_MAPR (STM32_AFIO_BASE+STM32_AFIO_MAPR_OFFSET)
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#define STM32_AFIO_EXTICR(p) (STM32_AFIO_BASE+STM32_AFIO_EXTICR_OFFSET(p))
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#define STM32_AFIO_EXTICR1 (STM32_AFIO_BASE+STM32_AFIO_EXTICR1_OFFSET)
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#define STM32_AFIO_EXTICR2 (STM32_AFIO_BASE+STM32_AFIO_EXTICR3_OFFSET)
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#define STM32_AFIO_EXTICR2 (STM32_AFIO_BASE+STM32_AFIO_EXTICR2_OFFSET)
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#define STM32_AFIO_EXTICR3 (STM32_AFIO_BASE+STM32_AFIO_EXTICR3_OFFSET)
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#define STM32_AFIO_EXTICR4 (STM32_AFIO_BASE+STM32_AFIO_EXTICR4_OFFSET)
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@ -1,7 +1,7 @@
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/****************************************************************************
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* arch/arm/src/stm32/stm32_exti.c
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*
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* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
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* Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved.
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* Copyright (C) 2011 Uros Platise. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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* Uros Platise <uros.platise@isotel.eu>
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@ -81,9 +81,9 @@ static int stm32_exti0_isr(int irq, void *context)
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/* Clear the pending interrupt */
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putreg32(0x0001, STM32_EXTI_PR);
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/* And dispatch the interrupt to the handler */
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if (stm32_exti_callbacks[0])
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{
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ret = stm32_exti_callbacks[0](irq, context);
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@ -98,9 +98,9 @@ static int stm32_exti1_isr(int irq, void *context)
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/* Clear the pending interrupt */
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putreg32(0x0002, STM32_EXTI_PR);
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/* And dispatch the interrupt to the handler */
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if (stm32_exti_callbacks[1])
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{
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ret = stm32_exti_callbacks[1](irq, context);
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@ -115,9 +115,9 @@ static int stm32_exti2_isr(int irq, void *context)
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/* Clear the pending interrupt */
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putreg32(0x0004, STM32_EXTI_PR);
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/* And dispatch the interrupt to the handler */
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if (stm32_exti_callbacks[2])
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{
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ret = stm32_exti_callbacks[2](irq, context);
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@ -132,9 +132,9 @@ static int stm32_exti3_isr(int irq, void *context)
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/* Clear the pending interrupt */
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putreg32(0x0008, STM32_EXTI_PR);
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/* And dispatch the interrupt to the handler */
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if (stm32_exti_callbacks[3])
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{
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ret = stm32_exti_callbacks[3](irq, context);
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@ -149,9 +149,9 @@ static int stm32_exti4_isr(int irq, void *context)
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/* Clear the pending interrupt */
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putreg32(0x0010, STM32_EXTI_PR);
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/* And dispatch the interrupt to the handler */
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if (stm32_exti_callbacks[4])
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{
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ret = stm32_exti_callbacks[4](irq, context);
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@ -168,9 +168,9 @@ static int stm32_exti_multiisr(int irq, void *context, int first, int last)
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/* Examine the state of each pin in the group */
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pr = getreg32(STM32_EXTI_PR);
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/* And dispatch the interrupt to the handler */
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for (pin = first; pin <= last; pin++)
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{
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/* Is an interrupt pending on this pin? */
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@ -181,9 +181,9 @@ static int stm32_exti_multiisr(int irq, void *context, int first, int last)
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/* Clear the pending interrupt */
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putreg32(mask, STM32_EXTI_PR);
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/* And dispatch the interrupt to the handler */
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if (stm32_exti_callbacks[pin])
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{
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int tmp = stm32_exti_callbacks[pin](irq, context);
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@ -216,21 +216,21 @@ static int stm32_exti1510_isr(int irq, void *context)
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*
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* Description:
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* Sets/clears GPIO based event and interrupt triggers.
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*
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*
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* Parameters:
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* - pinset: gpio pin configuration
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* - rising/falling edge: enables
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* - event: generate event when set
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* - func: when non-NULL, generate interrupt
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*
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* Returns:
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*
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* Returns:
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* The previous value of the interrupt handler function pointer. This value may,
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* for example, be used to restore the previous handler when multiple handlers are
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* used.
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*
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****************************************************************************/
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xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
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xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
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bool event, xcpt_t func)
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{
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uint32_t pin = pinset & GPIO_PIN_MASK;
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@ -238,9 +238,9 @@ xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
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int irq;
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xcpt_t handler;
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xcpt_t oldhandler = NULL;
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/* Select the interrupt handler for this EXTI pin */
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if (pin < 5)
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{
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irq = pin + STM32_IRQ_EXTI0;
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@ -273,14 +273,14 @@ xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
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irq = STM32_IRQ_EXTI1510;
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handler = stm32_exti1510_isr;
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}
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/* Get the previous GPIO IRQ handler; Save the new IRQ handler. */
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oldhandler = stm32_exti_callbacks[pin];
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stm32_exti_callbacks[pin] = func;
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/* Install external interrupt handlers */
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if (func)
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{
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irq_attach(irq, handler);
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@ -292,12 +292,12 @@ xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
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}
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/* Configure GPIO, enable EXTI line enabled if event or interrupt is enabled */
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if (event || func)
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if (event || func)
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{
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pinset |= GPIO_EXTI;
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}
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stm32_configgpio(pinset);
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/* Configure rising/falling edges */
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