include/nuttx/lcd/edid.h: Add EDID definitions
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Gregory Nutt
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include/nuttx/lcd/edid.h
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include/nuttx/lcd/edid.h
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/********************************************************************************************
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* include/nuttx/lcd/edid.h
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* EDID (Extended Display Identification Data) Format
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*
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* Copyright (C) 2019 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Reference: Wikipedia
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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********************************************************************************************/
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#ifndef __INCLUDE_NUTTX_LCD_EDID_H
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#define __INCLUDE_NUTTX_LCD_EDID_H
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/********************************************************************************************
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* Included Files
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********************************************************************************************/
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/********************************************************************************************
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* Pre-processor Definitions
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********************************************************************************************/
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#define EDID_LENGTH 128
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/* EDID data offsets ************************************************************************/
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/* Bytes 0-7: Header Information */
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#define EDID_HEADER_MAGIC 0 /* Fixed header pattern: 00 FF FF FF FF FF FF 00 */
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#define EDID_HEADER_MAGIC_SIZE 8
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/* Bytes 8-17: Vendor Information */
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#define EDID_VENDOR_MANUFACTURER 8 /* Encoded 3-character manufacture ID */
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#define EDID_VENDOR_MANUFACTURER_SIZE 2 /* 16-bit, big endian value */
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#define EDID_VENDOR_PRODUCTCODE 10 /* Product code. 16-bit, little endian value */
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#define EDID_VENDOR_PRODUCTCODE_SIZE 2
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#define EDID_VENDOR_SERIALNO 12 /* Serial number: 32-bit, little endian value */
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#define EDID_VENDOR_SERIALNO_SIZE 4
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#define EDID_VENDOR_WEEK 16 /* Week of manufacture or model year flag */
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#define EDID_VENDOR_YEAR 17 /* Year of manufacture (minus 1990) */
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/* Bytes 18-19: EDID Version */
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#define EDID_VERSION_MAJOR 18 /* EDID version, usually 1 (for 1.3) */
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#define EDID_VERSION_MINOR 19 /* EDID revision, usually 3 (for 1.3) */
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/* Bytes 20-44: Display Information */
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#define EDID_DISPLAY_INPUT 20 /* Video input parameters bitmap */
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#define EDID_DISPLAY_HSIZE 21 /* Horizontal screen size, in centimetres */
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#define EDID_DISPLAY_VSIZE 22 /* Vertical screen size, in centimetres */
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#define EDID_DISPLAY_GAMMA 23 /* Display gamma, factory default */
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#define EDID_DISPLAY_FEATURES 24 /* Support features bitmap */
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/* Bytes 25-34: Chromaticity */
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#define EDID_CHROMA_RG_LOW 25 /* Red and green least-significant bits (2^9, 2^10) */
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#define EDID_CHROMA_BW_LOW 26 /* Blue and white least-significant 2 bits */
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#define EDID_CHROMA_REDX 27 /* Red x value most significant 8 bits (2^1,...,2^8) */
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#define EDID_CHROMA_REDY 28 /* Red y value most significant 8 bits */
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#define EDID_CHROMA_GREENX 29 /* Green x value most significant 8 bits */
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#define EDID_CHROMA_GREENY 30 /* Green y value most significant 8 bits */
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#define EDID_CHROMA_BLUEX 31 /* Blue x value most significant 8 bits */
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#define EDID_CHROMA_BLUEY 32 /* Blue y value most significant 8 bits */
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#define EDID_CHROMA_WHITEX 33 /* Default white point x value most significant 8 bits */
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#define EDID_CHROMA_WHITEY 34 /* Default white point y value most significant 8 bits */
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/* Bytes 35-37: Established timing bitmap */
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#define EDID_TIMING_1 35
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#define EDID_TIMING_2 36
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#define EDID_TIMING_3 37
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/* Bytes 38-53: Standard Timing Information */
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#define EDID_STDTIMING_1 38 /* Each is size two bytes. */
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#define EDID_STDTIMING_2 40
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#define EDID_STDTIMING_3 42
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#define EDID_STDTIMING_4 44
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#define EDID_STDTIMING_5 45
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#define EDID_STDTIMING_6 48
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#define EDID_STDTIMING_7 50
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#define EDID_STDTIMING_8 52
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#define EDID_STDTIMING_SIZE 2
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/* Bytes 54-125: Descriptor Blocks */
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#define EDID_DESCRIPTOR_1 54 /* Each is size 18 bytes */
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#define EDID_DESCRIPTOR_2 72
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#define EDID_DESCRIPTOR_3 90
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#define EDID_DESCRIPTOR_4 108
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#define EDID_DESCRIPTOR_SIZE 18
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/* Bits 126-127: Trailer */
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#define EDID_TRAILER_NEXTENSIONS 126 /* Number of extensions to follow */
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#define EDID_TRAILER_CHECKSUM 127 /* Checksum. Sum of all 128 bytes should equal 0 */
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/* EDID Bitfield Definitions ****************************************************************/
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/* Vendor Section: Manufacturer ID */
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#define EDID_VENDOR_MANUFACTURER_1(n) (((n) >> 10) & 0x3f) + 'A')
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#define EDID_VENDOR_MANUFACTURER_2(n) (((n) >> 5) & 0x3f) + 'A')
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#define EDID_VENDOR_MANUFACTURER_3(n) ( (n) >> 0 & 0x3f) + 'A')
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/* Display Section: Display Input */
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#define BIT_DEPTH_6 1 /* Values for bit depth */
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#define BIT_DEPTH_8 2
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#define BIT_DEPTH_10 3
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#define BIT_DEPTH_12 4
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#define BIT_DEPTH_14 5
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#define BIT_DEPTH_16 6
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#define VIDEO_INTF_HDMIA 1 /* Values for video interface */
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#define VIDEO_INTF_HDMIB 2
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#define VIDEO_INTF_MDDI 4
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#define VIDEO_INTF_DISPLAYPORT 5
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#define EDID_DISPLAY_INPUT_DIGITAL (1 << 7) /* Bit 7: Digital input */
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/* For digital input: */
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#define EDID_DISPLAY_INPUT_VIDIF_SHIFT (0) /* Bits 0-3: Video interface */
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#define EDID_DISPLAY_INPUT_BITDEPTH_SHIFT (4) /* Bits 4-6: Bit depth */
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#define EDID_DISPLAY_INPUT_BITDEPTH_MASK (7 << EDID_DISPLAY_INPUT_BITDEPTH_SHIFT)
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/* For analog input: */
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#define EDID_DISPLAY_INPUT_VSERRATED (1 << 0) /* Bit 0: VSync pulse must be serrated
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* when composite or sync-on-green
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* is used */
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#define EDID_DISPLAY_INPUT_GREEN (1 << 1) /* Bit 1: Sync on green supported */
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#define EDID_DISPLAY_INPUT_COMPOSITE (1 << 2) /* Bit 2: Composite sync (on HSync)
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* supported */
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#define EDID_DISPLAY_INPUT_SYNC (1 << 3) /* Bit 3: Separate sync supported */
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#define EDID_DISPLAY_INPUT_BLANK2BLACK (1 << 4) /* Bit 4: Blank to black setup */
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#define EDID_DISPLAY_INPUT_LEVELS_SHIFT (0) /* Bits 5-6: Video white and sync levels,
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* relative to blank */
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#define EDID_DISPLAY_INPUT_LEVELS_MASK (3 << EDID_DISPLAY_INPUT_LEVELS_SHIFT)
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/* Display Section: Supported Features */
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#define ANALOG_DISPLAY_TYPE_MONOCHOME 0 /* Monochrome or Grayscale */
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#define ANALOG_DISPLAY_TYPE_RGB 1 /* RGB color */
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#define ANALOG_DISPLAY_TYPE_NONRGB 2 /* Non-RGB color */
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#define DIGITAL_DISPLAY_TYPE_RGB444 0 /* RGB 4:4:4 */
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#define DIGITAL_DISPLAY_TYPE_RGBYCRCB_1 1 /* RGB 4:4:4 + YCrCb 4:4:4 */
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#define DIGITAL_DISPLAY_TYPE_RGBYCRCB_2 2 /* RGB 4:4:4 + YCrCb 4:2:2 */
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#define DIGITAL_DISPLAY_TYPE_RGBYCRCB_3 3 /* RGB 4:4:4 + YCrCb 4:4:4 + YCrCb 4:2:2 */
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#define EDID_DISPLAY_FEATURE_CONTINUOUS (1 << 0) /* Bit 0: Continuous timings with GTF
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* or CVT */
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#define EDID_DISPLAY_FEATURE_MODE (1 << 1) /* Bit 1: Preferred timing mode specified
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* in descriptor block 1 */
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#define EDID_DISPLAY_FEATURE_STDRGB (1 << 2) /* Bit 2: Standard sRGB colour space */
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#define EDID_DISPLAY_FEATURE_ATYPE_SHIFT (3) /* Bits 3-4: Display type (analog) */
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#define EDID_DISPLAY_FEATURE_ATYPE_MASK (3 << EDID_DISPLAY_FEATURE_ATYPE_SHIFT)
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#define EDID_DISPLAY_FEATURE_DTYPE_SHIFT (3) /* Bits 3-4: Display type (digital) */
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#define EDID_DISPLAY_FEATURE_DTYPE_MASK (3 << EDID_DISPLAY_FEATURE_DTYPE_SHIFT)
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#define EDID_DISPLAY_FEATURE_DPMSOFF (1 << 5) /* Bit 5: DPMS active-off supported */
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#define EDID_DISPLAY_FEATURE_DPMSSUSP (1 << 6) /* Bit 6: DPMS suspend supported */
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#define EDID_DISPLAY_FEATURE_DPMSSTDBY (1 << 7) /* Bit 7: DPMS standby supported */
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/* Chromaticity Section: Red and green least-significant bits */
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#define EDID_CHROMA_RG_LOW_GREEN_Y_SHIFT (0) /* Bits 0-1: Green y value least-significant 2 bits */
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#define EDID_CHROMA_RG_LOW_GREEN_Y_MASK (3 << EDID_CHROMA_RG_LOW_GREEN_Y_SHIFT)
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#define EDID_CHROMA_RG_LOW_GREEN_X_SHIFT (2) /* Bits 2-3: Green x value least-significant 2 bits */
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#define EDID_CHROMA_RG_LOW_GREEN_X_MASK (3 << EDID_CHROMA_RG_LOW_GREEN_X_SHIFT)
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#define EDID_CHROMA_RG_LOW_RED_Y_SHIFT (4) /* Bits 4-5: Red y value least-significant 2 bits */
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#define EDID_CHROMA_RG_LOW_RED_Y_MASK (3 << EDID_CHROMA_RG_LOW_RED_Y_SHIFT)
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#define EDID_CHROMA_RG_LOW_RED_X_SHIFT (6) /* Bits 6-7: Red x value least-significant 2 bits */
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#define EDID_CHROMA_RG_LOW_RED_X_MASK (3 << EDID_CHROMA_RG_LOW_RED_X_SHIFT)
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/* Bytes 35-37: Established timing bitmap */
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#define EDID_TIMING_1_800x600_60Hz (1 << 0)
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#define EDID_TIMING_1_800x600_56Hz (1 << 1)
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#define EDID_TIMING_1_640x600_75Hz (1 << 2)
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#define EDID_TIMING_1_640x480_72Hz (1 << 3)
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#define EDID_TIMING_1_640x480_67Hz (1 << 4)
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#define EDID_TIMING_1_640x480_60Hz (1 << 5)
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#define EDID_TIMING_1_720x400_88Hz (1 << 6)
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#define EDID_TIMING_1_720x400_70Hz (1 << 7)
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#define EDID_TIMING_2_1280x1024_75Hz (1 << 0)
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#define EDID_TIMING_2_1024x768_75Hz (1 << 1)
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#define EDID_TIMING_2_1024x768_70Hz (1 << 2)
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#define EDID_TIMING_2_1024x768_60Hz (1 << 3)
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#define EDID_TIMING_2_1024x768_87Hz (1 << 4)
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#define EDID_TIMING_2_832x624_75Hz (1 << 5)
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#define EDID_TIMING_2_800x600_75Hz (1 << 6)
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#define EDID_TIMING_2_800x600_72Hz (1 << 7)
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#define EDID_TIMING_3_VENDOR_SHIFT (0) /* Bits 0-6: Manufacturer-specific display modes */
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#define EDID_TIMING_3_VENDOR_MASK (0x7f << EDID_TIMING_3_VENDOR_SHIFT)
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#define EDID_TIMING_3_1152x870_75Hz (1 << 7)
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/* Standard Timing Information */
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#define ASPECT_RATIO_16_10 0 /* Aspect ratio: 16:10 */
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#define ASPECT_RATIO_4_3 1 /* Aspect ratio: 4:3 */
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#define ASPECT_RATIO_5_4 2 /* Aspect ratio: 5:4 */
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#define ASPECT_RATIO_16_9 3 /* Aspect ratio: 16:9 */
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#define EDID_STDTIMING_XRES_OFFSET (0) /* Byte 0: X resolution, divided by 8, less 31 */
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#define EDID_STDTIMING_INFO_OFFSET (1) /* Byte 1: Image Aspect Ratio / Vertical Frequency */
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# define EDID_STDTIMING_ASPECT_SHIFT (6) /* Bits 6-7: Image aspect ratio */
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# define EDID_STDTIMING_ASPECT_MASK (3 << EDID_STDTIMING_ASPECT_SHIFT)
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# define EDID_STDTIMING_VFREQ_SHIFT (0) /* Bits 0-5: Vertical frequency, less 60 */
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# define EDID_STDTIMING_VFREQ_MASK (0x3f << EDID_STDTIMING_VFREQ_SHIFT)
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/* Display Descriptor: EDID Detailed Timing Descriptor */
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#define EDID_STEROMODE_FIELDSEQ_RIGHT 1 /* Field sequential, sync=1 during right (bit0=0) */
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#define EDID_STEROMODE_FIELDSEQ_LEFT 2 /* Field sequential, sync=1 during left (bit0=0) */
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#define EDID_STEROMODE_4WAY_INTERLEAVED 3 /* 4-way interleaved stereo (bit0=0) */
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#define EDID_STEROMODE_RIGHT 1 /* Right image on even lines (bit0=1) */
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#define EDID_STEROMODE_LEFT 2 /* Left image on even lines (bit0=1) */
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#define EDID_STEROMODE_SIDEBYSIDE 3 /* Side-by-side (bit0=1) */
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#define EDID_DESC_PIXCLOCK 0 /* Bytes 0-1: Pixel clock in 10 kHz units */
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#define EDID_DESC_HPIXELS_LSBITS 2 /* Byte 2: Horizontal active pixels 8 LS bits */
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#define EDID_DESC_HBLANK_LSBITS 3 /* Byte 3: Horizontal blanking pixels 8 LS bits */
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#define EDID_DESC_HMSBITS 4 /* Byte 4: Horizontal MS bits */
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# define EDID_DESC_HBLANK_MSBITS_SHIFT (0) /* Bits 0-3: Horizontal blanking pixels 4 MS bits */
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# define EDID_DESC_HBLANK_MSBITS_MASK (15 << EDID_DESC_HPIXELS_MSBITS_SHIFT)
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# define EDID_DESC_HPIXELS_MSBITS_SHIFT (4) /* Bits 4-7: Horizontal active pixels 4 MS bits */
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# define EDID_DESC_HPIXELS_MSBITS_MASK (15 << EDID_DESC_HPIXELS_MSBITS_SHIFT)
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#define EDID_DESC_VLINES_LSBITS 5 /* Byte 5: Vertical active lines 8 LS bits */
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#define EDID_DESC_VBLANK_LSBITS 6 /* Byte 6: Vertical blanking lines 8 LS bits */
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#define EDID_DESC_VMSBITS 7 /* Byte 7: Vertical MS bits */
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# define EDID_DESC_VBLANK_MSBITS_SHIFT (0) /* Bits 0-3: Vertical blanking lines 4 MS bits */
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# define EDID_DESC_VBLANK_MSBITS_MASK (15 << EDID_DESC_VBLANK_MSBITS_SHIFT)
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# define EDID_DESC_VLINES_MSBITS_SHIFT (4) /* Bits 4-7: Vertical active lines 4 MS bits */
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# define EDID_DESC_VLINES_MSBITS_MASK (15 << EDID_DESC_VLINES_MSBITS_SHIFT)
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#define EDID_DESC_HPORCH_LSBITS 8 /* Byte 8: Horizontal front porch pixels 8 LS bits */
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#define EDID_DESC_HPW_LSBITS 9 /* Byte 9: Horizontal sync pulse width pixels 8 LS bits */
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#define EDID_DESC_VPORCH_LSBITS 10 /* Byte 10: Vertical front porch and pulsewidth LS bits */
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# define EDID_DESC_VPW_LSBITS_SHIFT (0) /* Bits 0-3: Vertical sync pulsewidth 4 LS bits */
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# define EDID_DESC_VPW_LSBITS_MASK (15 << EDID_DESC_VPW_LSBITS_SHIFT)
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# define EDID_DESC_VPORCH_LSBITS_SHIFT (4) /* Bits 4-7: Vertical front portch 4 LS bits */
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# define EDID_DESC_VPORCH_LSBITS_MASK (15 << EDID_DESC_VPORCH_LSBITS_SHIFT)
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#define EDID_DESC_PORCH_MSBITS 11 /* Byte 7: Vertical MS bits */
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# define EDID_DESC_VPW_MSBITS_SHIFT (0) /* Bits 0-1: Vertical sync pulsewidth lines 2 MS bits */
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# define EDID_DESC_VPW_MSBITS_MASK (3 << EDID_DESC_VPW_MSBITS_SHIFT)
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# define EDID_DESC_VPORCH_MSBITS_SHIFT (2) /* Bits 2-3: Vertical front porch lines 2 MS bits */
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# define EDID_DESC_VPORCH_MSBITS_MASK (3 << EDID_DESC_VPORCH_MSBITS_SHIFT)
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# define EDID_DESC_HPW_MSBITS_SHIFT (4) /* Bits 4-5: Horizontal sync pulsewidth pixels 2 MS bits */
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# define EDID_DESC_HPW_MSBITS_MASK (3 << EDID_DESC_HPW_MSBITS_SHIFT)
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# define EDID_DESC_HPORCH_MSBITS_SHIFT (6) /* Bits 6-7: Horizontal front porch pixels 2 MS bits */
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# define EDID_DESC_HPORCH_MSBITS_MASK (3 << EDID_DESC_HPORCH_MSBITS_SHIFT)
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#define EDID_DESC_HSIZE_LSBITS 12 /* Byte 12: Horizontal image size, mm, 8 LS bits */
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#define EDID_DESC_VSIZE_LSBITS 13 /* Byte 13: Vertical image size, mm, 8 LS bits */
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#define EDID_DESC_SIZE_MSBITS 14 /* Byte 14: Image size MS bits */
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# define EDID_DESC_VSIZE_MSBITS_SHIFT (0) /* Bits 0-3: Vertical image size, mm, 4 MS bits */
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# define EDID_DESC_VSIZE_MSBITS_MASK (15 << EDID_DESC_VSIZE_MSBITS_SHIFT)
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# define EDID_DESC_HSIZE_MSBITS_SHIFT (4) /* Bits 4-7: Horizontal image size, mm, 4 MS bits */
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# define EDID_DESC_HSIZE_MSBITS_MASK (15 << EDID_DESC_HSIZE_MSBITS_SHIFT)
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#define EDID_DESC_HBORDER 15 /* Byte 15: Horizontal border pixels (one side) */
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#define EDID_DESC_VBORDER 16 /* Byte 16: Vertical border lines (one side) */
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#define EDID_DESC_FEATURES 17 /* Byte 17: Features bitmap */
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/* If bits 5-6=00: */
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# define EDID_DESC_STEREO_INTERLEAVE (1 << 0) /* Bit 0: 2-way line-interleaved or side-by-side
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* interleaved stereo */
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/* If bits 3-4=0x: */
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# define EDID_DESC_ANALOG_SYNCALL (1 << 1) /* Bit 1: Sync on all 3 RGB lines (else green only) */
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# define EDID_DESC_ANALOG_VSERRATION (1 << 2) /* Bit 2: VSync serration */
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# define EDID_DESC_ANALOG_SYNCTYPE (1 << 3) /* Bit 3: 0=Analog composite; 1=Bipolar analog composite */
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/* If bits 3-4=10: */
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# define EDID DESC_DIGITAL_VPOLARITY (1 << 2) /* Bit 2: Vertical sync polarity (0=negative, 1=positive) */
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/* If bits 3-4=11: */
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# define EDID_DESC_DIGITAL_HPOLARITY (1 << 1) /* Bit 1: Horizontal Sync polarity (0=negative, 1=positive) */
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# define EDID_DESC_DIGITAL_VSERRATION (1 << 2) /* Bit 2: VSync serration */
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# define EDID_DESC_DIGITAL_SYNCTYPE (1 << 3) /* Bit 3: 0=Digital composite; 1=Digital separate sync */
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# define EDID_DESC_DIGITAL_SYNC (1 << 4) /* Bit 4: Digital sync */
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# define EDID_DESC_STEREO_SHIFT (5) /* Bits 5-6: Stero mode */
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# define EDID_DESC_STEREO_MASK (3 << EDID_DESC_STEREO_SHIFT)
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# define EDID_DESC_INTERLACED (1 << 7) /* Bit 7: Interlaced */
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/* Display Descriptor: EDID Other Monitor Descriptors */
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/* 0x00-0x0f: Manufacturer reserved descriptors */
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#define EDID_DESCTYPE_DUMMY 0x10 /* Dummy identifier */
|
||||
#define EDID_DESCTYPE_STDTIMING 0xf7 /* Additional standard timing 3 */
|
||||
#define EDID_DESCTYPE_CVT 0xf8 /* CVT 3-Byte Timing Codes */
|
||||
#define EDID_DESCTYPE_DCM 0xf9 /* Display Color Management (DCM) */
|
||||
#define EDID_DESCTYPE_STDTIMING_ID 0xfa /* Additional standard timing identifiers */
|
||||
#define EDID_DESCTYPE_WHITEPOINT 0xfb /* Additional white point data */
|
||||
#define EDID_DESCTYPE_NAME 0xfc /* Display name (ASCII text) */
|
||||
#define EDID_DESCTYPE_LIMITS 0xfd /* Display range limits */
|
||||
#define EDID_DESCTYPE_TEXT 0xfe /* Unspecified text (ASCII text) */
|
||||
#define EDID_DESCTYPE_SERIALNO 0xff /* Display serial number (ASCII text) */
|
||||
|
||||
#define EDID_DESC_ZERO_1 0 /* Bytes 0-1: Zero=not a detailed timing descriptor */
|
||||
#define EDID_DESC_ZERO_2 2 /* Byte 2: Zero */
|
||||
#define EDID_DESC_DESCTYPE 3 /* Byte 3: Descriptor type */
|
||||
#define EDID_DESC_ZERO_3 4 /* Byte 4: Zero */
|
||||
#define EDID_DESC_INFO 5 /* Bytes 5-17: Determined by descriptor type */
|
||||
|
||||
#endif /* __INCLUDE_NUTTX_LCD_EDID_H */
|
||||
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Reference in New Issue
Block a user