diff --git a/configs/olimex-lpc1766stk/nsh/defconfig b/configs/olimex-lpc1766stk/nsh/defconfig index 05ca0fa2e4..fc793ec7b3 100755 --- a/configs/olimex-lpc1766stk/nsh/defconfig +++ b/configs/olimex-lpc1766stk/nsh/defconfig @@ -77,6 +77,9 @@ CONFIG_ARCH_CHIP_LPC17XX=y CONFIG_ARCH_CORTEXM3=y CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set CONFIG_ARCH_HAVE_MPU=y # CONFIG_ARMV7M_MPU is not set CONFIG_BOARD_LOOPSPERMSEC=8111 @@ -271,6 +274,7 @@ CONFIG_DEV_CONSOLE=y CONFIG_SDCLONE_DISABLE=y # CONFIG_SCHED_WORKQUEUE is not set CONFIG_SCHED_WAITPID=y +# CONFIG_SCHED_STARTHOOK is not set # CONFIG_SCHED_ATEXIT is not set # CONFIG_SCHED_ONEXIT is not set CONFIG_USER_ENTRYPOINT="nsh_main" @@ -280,9 +284,7 @@ CONFIG_DISABLE_OS_API=y # CONFIG_DISABLE_PTHREAD is not set # CONFIG_DISABLE_SIGNALS is not set # CONFIG_DISABLE_MQUEUE is not set -# CONFIG_DISABLE_MOUNTPOINT is not set # CONFIG_DISABLE_ENVIRON is not set -CONFIG_DISABLE_POLL=y # # Signal Numbers @@ -318,6 +320,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048 # # Device Drivers # +CONFIG_DISABLE_POLL=y CONFIG_DEV_NULL=y # CONFIG_DEV_ZERO is not set # CONFIG_LOOP is not set @@ -437,6 +440,7 @@ CONFIG_NET_ARPTAB_SIZE=16 # # File system configuration # +# CONFIG_DISABLE_MOUNTPOINT is not set # CONFIG_FS_RAMMAP is not set CONFIG_FS_FAT=y CONFIG_FAT_LCNAMES=y @@ -452,6 +456,7 @@ CONFIG_FAT_MAXFNAME=32 # # System Logging # +# CONFIG_SYSLOG_ENABLE is not set # CONFIG_SYSLOG is not set # @@ -496,6 +501,8 @@ CONFIG_LIB_HOMEDIR="/" # CONFIG_EOL_IS_BOTH_CRLF is not set CONFIG_EOL_IS_EITHER_CRLF=y # CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 # CONFIG_LIBC_STRERROR is not set # CONFIG_LIBC_PERROR_STDOUT is not set CONFIG_ARCH_LOWPUTC=y @@ -558,7 +565,6 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PASHELLO is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_POLL is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set # CONFIG_EXAMPLES_QENCODER is not set # CONFIG_EXAMPLES_RGMP is not set @@ -678,6 +684,10 @@ CONFIG_NSH_NESTDEPTH=3 # CONFIG_NSH_DISABLESCRIPT is not set # CONFIG_NSH_DISABLEBG is not set CONFIG_NSH_CONSOLE=y + +# +# USB Trace Support +# # CONFIG_NSH_CONDEV is not set CONFIG_NSH_ARCHINIT=y CONFIG_NSH_TELNET=y @@ -741,3 +751,7 @@ CONFIG_READLINE_ECHO=y # Sysinfo # # CONFIG_SYSTEM_SYSINFO is not set + +# +# USB Monitor +# diff --git a/configs/open1788/README.txt b/configs/open1788/README.txt index 144be5242a..154d4b2f75 100644 --- a/configs/open1788/README.txt +++ b/configs/open1788/README.txt @@ -8,8 +8,101 @@ NXP LPC1788 MCU CONTENTS ======== + o FPU o Configuration +FPU +=== + +FPU Configuration Options +------------------------- + +There are two version of the FPU support built into the LPC17xx port. + +1. Lazy Floating Point Register Save. + + This is an untested implementation that saves and restores FPU registers + only on context switches. This means: (1) floating point registers are + not stored on each context switch and, hence, possibly better interrupt + performance. But, (2) since floating point registers are not saved, + you cannot use floating point operations within interrupt handlers. + + This logic can be enabled by simply adding the following to your .config + file: + + CONFIG_ARCH_FPU=y + +2. Non-Lazy Floating Point Register Save + + Mike Smith has contributed an extensive re-write of the ARMv7-M exception + handling logic. This includes verified support for the FPU. These changes + have not yet been incorporated into the mainline and are still considered + experimental. These FPU logic can be enabled with: + + CONFIG_ARCH_FPU=y + CONFIG_ARMV7M_CMNVECTOR=y + + You will probably also changes to the ld.script in if this option is selected. + This should work: + + -ENTRY(_stext) + +ENTRY(__start) /* Treat __start as the anchor for dead code stripping */ + +EXTERN(_vectors) /* Force the vectors to be included in the output */ + +CFLAGS +------ + +Only the Atollic toolchain has built-in support for the Cortex-M4 FPU. You will see +the following lines in each Make.defs file: + + ifeq ($(CONFIG_STM32_ATOLLIC_LITE),y) + # Atollic toolchain under Windows + ... + ifeq ($(CONFIG_ARCH_FPU),y) + ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard + else + ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + endif + endif + +If you are using a toolchain other than the Atollic toolchain, then to use the FPU +you will also have to modify the CFLAGS to enable compiler support for the ARMv7-M +FPU. As of this writing, there are not many GCC toolchains that will support the +ARMv7-M FPU. + +As a minimum you will need to add CFLAG options to (1) enable hardware floating point +code generation, and to (2) select the FPU implementation. You might try the same +options as used with the Atollic toolchain in the Make.defs file: + + ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard + +Configuration Changes +--------------------- + +Below are all of the configuration changes that I had to make to configs/stm3240g-eval/nsh2 +in order to successfully build NuttX using the Atollic toolchain WITH FPU support: + + -CONFIG_ARCH_FPU=n : Enable FPU support + +CONFIG_ARCH_FPU=y + + -CONFIG_STM32_CODESOURCERYW=y : Disable the CodeSourcery toolchain + +CONFIG_STM32_CODESOURCERYW=n + + -CONFIG_STM32_ATOLLIC_LITE=n : Enable *one* the Atollic toolchains + CONFIG_STM32_ATOLLIC_PRO=n + -CONFIG_STM32_ATOLLIC_LITE=y : The "Lite" version + CONFIG_STM32_ATOLLIC_PRO=n : The "Pro" version + + -CONFIG_INTELHEX_BINARY=y : Suppress generation FLASH download formats + +CONFIG_INTELHEX_BINARY=n : (Only necessary with the "Lite" version) + + -CONFIG_HAVE_CXX=y : Suppress generation of C++ code + +CONFIG_HAVE_CXX=n : (Only necessary with the "Lite" version) + +See the section above on Toolchains, NOTE 2, for explanations for some of +the configuration settings. Some of the usual settings are just not supported +by the "Lite" version of the Atollic toolchain. + CONFIGURURATION ===============