Fix to lpc214x MMC/SD due to lm3s changes

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1833 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2009-05-28 23:14:27 +00:00
parent 6db38ef16f
commit 9ea01d0887
10 changed files with 90 additions and 7 deletions

View File

@ -287,6 +287,7 @@ defconfig -- This is a configuration file similar to the Linux
Read/Write
CONFIG_MMCSD_SPICLOCK - Maximum SPI clock to drive MMC/SD card.
Default is 20MHz.
CONFIG_MMCSD_SYNCHRONIZE - Special synchronization logic needed
TCP/IP and UDP support via uIP
CONFIG_NET - Enable or disable all network features

View File

@ -359,10 +359,13 @@ CONFIG_FS_ROMFS=n
# Provide read-only access (default is read/write)
# CONFIG_MMCSD_SPICLOCK - Maximum SPI clock to drive MMC/SD card.
# Default is 20MHz.
# CONFIG_MMCSD_SYNCHRONIZE
# Special synchronization logic needed
#
CONFIG_MMCSD_NSLOTS=1
CONFIG_MMCSD_READONLY=n
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_MMCSD_SYNCHRONIZE=n
#
# TCP/IP and UDP support via uIP

View File

@ -359,10 +359,13 @@ CONFIG_FS_ROMFS=n
# Provide read-only access (default is read/write)
# CONFIG_MMCSD_SPICLOCK - Maximum SPI clock to drive MMC/SD card.
# Default is 20MHz.
# CONFIG_MMCSD_SYNCHRONIZE
# Special synchronization logic needed
#
CONFIG_MMCSD_NSLOTS=1
CONFIG_MMCSD_READONLY=n
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_MMCSD_SYNCHRONIZE=n
#
# TCP/IP and UDP support via uIP

View File

@ -358,10 +358,13 @@ CONFIG_FS_ROMFS=n
# Provide read-only access (default is read/write)
# CONFIG_MMCSD_SPICLOCK - Maximum SPI clock to drive MMC/SD card.
# Default is 20MHz.
# CONFIG_MMCSD_SYNCHRONIZE
# Special synchronization logic needed
#
CONFIG_MMCSD_NSLOTS=1
CONFIG_MMCSD_READONLY=n
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_MMCSD_SYNCHRONIZE=n
#
# TCP/IP and UDP support via uIP

View File

@ -358,10 +358,13 @@ CONFIG_FS_ROMFS=n
# Provide read-only access (default is read/write)
# CONFIG_MMCSD_SPICLOCK - Maximum SPI clock to drive MMC/SD card.
# Default is 20MHz.
# CONFIG_MMCSD_SYNCHRONIZE
# Special synchronization logic needed
#
CONFIG_MMCSD_NSLOTS=1
CONFIG_MMCSD_READONLY=n
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_MMCSD_SYNCHRONIZE=n
#
# TCP/IP and UDP support via uIP

View File

@ -301,9 +301,21 @@ CONFIG_FS_FAT=y
CONFIG_FS_ROMFS=n
#
# MMC/SD configuration
# SPI-based MMC/SD driver
#
# CONFIG_MMCSD_NSLOTS
# Number of MMC/SD slots supported by the driver
# CONFIG_MMCSD_READONLY
# Provide read-only access (default is read/write)
# CONFIG_MMCSD_SPICLOCK - Maximum SPI clock to drive MMC/SD card.
# Default is 20MHz.
# CONFIG_MMCSD_SYNCHRONIZE
# Special synchronization logic needed
#
CONFIG_MMCSD_NSLOTS=1
CONFIG_MMCSD_READONLY=n
#CONFIG_MMCSD_SPICLOCK=20000000
CONFIG_MMCSD_SYNCHRONIZE=y
#
# SPI-based MMC/SD driver

View File

@ -303,8 +303,15 @@ CONFIG_FS_ROMFS=n
# Number of MMC/SD slots supported by the driver
# CONFIG_MMCSD_READONLY
# Provide read-only access (default is read/write)
# CONFIG_MMCSD_SPICLOCK - Maximum SPI clock to drive MMC/SD card.
# Default is 20MHz.
# CONFIG_MMCSD_SYNCHRONIZE
# Special synchronization logic needed
#
CONFIG_MMCSD_NSLOTS=1
CONFIG_MMCSD_READONLY=n
#CONFIG_MMCSD_SPICLOCK=20000000
CONFIG_MMCSD_SYNCHRONIZE=y
#
# TCP/IP and UDP support via uIP

View File

@ -62,6 +62,7 @@
#include <nuttx/config.h>
#include <nuttx/spi.h>
#include <debug.h>
#include <arch/board/board.h>
#include <nuttx/arch.h>
@ -79,9 +80,31 @@
* Definitions
****************************************************************************/
/* Enables debug output from this file (needs CONFIG_DEBUG too) */
#undef SPI_DEBUG /* Define to enable debug */
#undef SPI_VERBOSE /* Define to enable verbose debug */
#ifdef SPI_DEBUG
# define spidbg lldbg
# ifdef SPI_VERBOSE
# define spivdbg lldbg
# else
# define spivdbg(x...)
# endif
#else
# undef SPI_VERBOSE
# define spidbg(x...)
# define spivdbg(x...)
#endif
/* Clocking */
#define LPC214X_CCLKFREQ (LPC214X_FOSC*LPC214X_PLL_M)
#define LPC214X_PCLKFREQ (LPC214X_CCLKFREQ/LPC214X_APB_DIV)
/* Use either FIO or legacy GPIO */
#ifdef CONFIG_LPC214x_FIO
# define CS_SET_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_SET_OFFSET)
# define CS_CLR_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_CLR_OFFSET)
@ -153,12 +176,14 @@ static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, boolean
{
/* Enable slave select (low enables) */
spidbg("CD asserted\n");
putreg32(bit, CS_CLR_REGISTER);
}
else
{
/* Disable slave select (low enables) */
spidbg("CD de-asserted\n");
putreg32(bit, CS_SET_REGISTER);
/* Wait for the TX FIFO not full indication */
@ -214,6 +239,8 @@ static uint32 spi_setfrequency(FAR struct spi_dev_s *dev, uint32 frequency)
divisor = (divisor + 1) & ~1;
putreg8(divisor, LPC214X_SPI1_CPSR);
spidbg("Frequency %d->%d\n", frequency, LPC214X_PCLKFREQ / divisor);
return LPC214X_PCLKFREQ / divisor;
}
@ -238,6 +265,7 @@ static ubyte spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
* board.
*/
spidbg("Return SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;
}
@ -259,6 +287,8 @@ static ubyte spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
static uint16 spi_send(FAR struct spi_dev_s *dev, uint16 wd)
{
register uint16 regval;
/* Wait while the TX FIFO is full */
while (!(getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_TNF));
@ -273,7 +303,9 @@ static uint16 spi_send(FAR struct spi_dev_s *dev, uint16 wd)
/* Get the value from the RX FIFO and return it */
return (uint16)getreg16(LPC214X_SPI1_DR);
regval = getreg16(LPC214X_SPI1_DR);
spidbg("%04x->%04x\n", wd, regval);
return regval;
}
/*************************************************************************
@ -302,6 +334,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
/* Loop while thre are bytes remaining to be sent */
spidbg("nwords: %d\n", nwords);
while (nwords > 0)
{
/* While the TX FIFO is not full and there are bytes left to send */
@ -318,6 +351,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
/* Then discard all card responses until the RX & TX FIFOs are emptied. */
spidbg("discarding\n");
do
{
/* Is there anything in the RX fifo? */
@ -367,11 +401,12 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nwords)
{
FAR ubyte *ptr = (FAR ubyte*)buffer;
uint32 fifobytes = 0;
uint32 rxpending = 0;
/* While there is remaining to be sent (and no synchronization error has occurred) */
while (ptr || fifobytes)
spidbg("nwords: %d\n", nwords);
while (nwords || rxpending)
{
/* Fill the transmit FIFO with 0xff...
* Write 0xff to the data register while (1) the TX FIFO is
@ -379,20 +414,22 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
* and (3) there are more bytes to be sent.
*/
spivdbg("TX: rxpending: %d nwords: %d\n", rxpending, nwords);
while ((getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_TNF) &&
(fifobytes < LPC214X_SPI1_FIFOSZ) && nwords)
(rxpending < LPC214X_SPI1_FIFOSZ) && nwords)
{
putreg16(0xff, LPC214X_SPI1_DR);
nwords--;
fifobytes++;
rxpending++;
}
/* Now, read the RX data from the RX FIFO while the RX FIFO is not empty */
spivdbg("RX: rxpending: %d\n", rxpending);
while (getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_RNE)
{
*ptr++ = (ubyte)getreg16(LPC214X_SPI1_DR);
fifobytes--;
rxpending--;
}
}
}

View File

@ -308,8 +308,15 @@ CONFIG_FS_ROMFS=n
# Number of MMC/SD slots supported by the driver
# CONFIG_MMCSD_READONLY
# Provide read-only access (default is read/write)
# CONFIG_MMCSD_SPICLOCK - Maximum SPI clock to drive MMC/SD card.
# Default is 20MHz.
# CONFIG_MMCSD_SYNCHRONIZE
# Special synchronization logic needed
#
CONFIG_MMCSD_NSLOTS=1
CONFIG_MMCSD_READONLY=n
#CONFIG_MMCSD_SPICLOCK=20000000
CONFIG_MMCSD_SYNCHRONIZE=y
#
# TCP/IP and UDP support via uIP

View File

@ -308,8 +308,15 @@ CONFIG_FS_ROMFS=n
# Number of MMC/SD slots supported by the driver
# CONFIG_MMCSD_READONLY
# Provide read-only access (default is read/write)
# CONFIG_MMCSD_SPICLOCK - Maximum SPI clock to drive MMC/SD card.
# Default is 20MHz.
# CONFIG_MMCSD_SYNCHRONIZE
# Special synchronization logic needed
#
CONFIG_MMCSD_NSLOTS=1
CONFIG_MMCSD_READONLY=n
#CONFIG_MMCSD_SPICLOCK=20000000
CONFIG_MMCSD_SYNCHRONIZE=y
#
# TCP/IP and UDP support via uIP