clocking for 54mhz
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@ -104,7 +104,7 @@
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/* At least one I2C peripheral must be enabled */
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#if defined(CONFIG_STM32F7_I2C1) || defined(CONFIG_STM32F7_I2C2) || defined(CONFIG_STM32F7_I2C3)
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/* This implementation is for the STM32 F1, F2, and F4 only */
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/* This implementation is for the STM32F7 only */
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/************************************************************************************
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@ -1078,40 +1078,33 @@ static void stm32f7_i2c_setclock(FAR struct stm32f7_i2c_priv_s *priv, uint32_t f
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/* Update timing and control registers */
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/* TODO: speed/timing calcs */
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#warning "check set filters before timing, see RM0316"
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/* TODO: speed/timing calcs, at the moment 45Mhz = STM32_PCLK1_FREQUENCY, analog filter is on,
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digital off from STM32F0-F3_AN4235_V1.0.1 */
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/* values from 100khz at 8mhz i2c clock */
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/* prescaler */
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/* t_presc= (presc+1)*t_i2cclk */
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/* RM0316 */
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if (frequency == 10000)
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if (frequency == 100000)
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{
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presc = 0x01;
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scl_l_period = 0xc7;
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scl_h_period = 0xc3;
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h_time = 0x02;
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s_time = 0x04;
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presc = 0x06;
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s_time = 0x02;
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h_time = 0x00;
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scl_h_period = 0x1e;
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scl_l_period = 0x2b;
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}
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else if (frequency == 100000)
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else if (frequency == 400000)
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{
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/* values from datasheet with clock 8mhz */
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presc = 0x01;
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scl_l_period = 0x13;
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scl_h_period = 0x0f;
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h_time = 0x02;
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s_time = 0x04;
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presc = 0x00;
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s_time = 0x0A;
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h_time = 0x00;
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scl_h_period = 0x1b;
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scl_l_period = 0x5b;
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}
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else
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{
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presc = 0x00;
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scl_l_period = 0x09;
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scl_h_period = 0x03;
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h_time = 0x01;
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s_time = 0x03;
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s_time = 0x08;
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h_time = 0x00;
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scl_h_period = 0x09;
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scl_l_period = 0x1c;
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}
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uint32_t timingr =
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@ -1123,10 +1116,6 @@ static void stm32f7_i2c_setclock(FAR struct stm32f7_i2c_priv_s *priv, uint32_t f
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stm32f7_i2c_putreg32(priv, STM32F7_I2C_TIMINGR_OFFSET, timingr);
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/* Bit 14 of OAR1 must be configured and kept at 1 */
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stm32f7_i2c_putreg(priv, STM32F7_I2C_OAR1_OFFSET, I2C_OAR1_OA1EN);
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/* Re-enable the peripheral (or not) */
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if (pe)
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