SAM3U SPI debug changes
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4031 42af7a65-404d-4744-a932-0658087f49c3
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patacongo
parent
045c7eb456
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9eed408b93
@ -125,7 +125,9 @@ static void spi_dumpregs(FAR const char *msg);
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#else
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# define spi_dumpregs(msg)
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#endif
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static inline void spi_flush(void);
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static inline uint32_t spi_cs2pcs(FAR struct sam3u_spidev_s *priv);
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/* SPI methods */
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@ -222,7 +224,7 @@ static void spi_dumpregs(FAR const char *msg)
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spivdbg(" CSR0:%08x CSR1:%08x CSR2:%08x CSR3:%08x\n",
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getreg32(SAM3U_SPI_CSR0), getreg32(SAM3U_SPI_CSR1),
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getreg32(SAM3U_SPI_CSR2), getreg32(SAM3U_SPI_CSR3));
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spivdbg(" WPCR:%08x WPSR:%08x IMR:%08x\n",
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spivdbg(" WPCR:%08x WPSR:%08x\n",
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getreg32(SAM3U_SPI_WPCR), getreg32(SAM3U_SPI_WPSR));
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}
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#endif
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@ -257,6 +259,37 @@ static inline void spi_flush(void)
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}
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}
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/****************************************************************************
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* Name: spi_cs2pcs
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*
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* Description:
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* Map the chip select number to the bit-set PCS field used in the SPI
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* registers. A chip select number is used for indexing and identifying
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* chip selects. However, the chip select information is represented by
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* a bit set in the SPI regsisters. This function maps those chip select
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* numbers to the correct bit set:
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*
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* CS Returned Spec Effective
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* No. PCS Value NPCS
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* ---- -------- -------- --------
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* 0 0000 xxx0 1110
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* 1 0001 xx01 1101
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* 2 0011 x011 1011
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* 3 0111 0111 0111
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*
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* Input Parameters:
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* priv - Device-specific state data
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static inline uint32_t spi_cs2pcs(FAR struct sam3u_spidev_s *priv)
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{
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return ((uint32_t)1 << (priv->cs)) - 1;
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}
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/****************************************************************************
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* Name: spi_lock
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*
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@ -346,9 +379,9 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
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* in order to select a slave.
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*/
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regval = getreg32(SAM3U_SPI_MR);
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regval = getreg32(SAM3U_SPI_MR);
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regval &= ~SPI_MR_PCS_MASK;
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regval |= (priv->cs << SPI_MR_PCS_SHIFT);
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regval |= (spi_cs2pcs(priv) << SPI_MR_PCS_SHIFT);
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putreg32(regval, SAM3U_SPI_MR);
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}
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else
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@ -660,16 +693,18 @@ static void spi_exchange(FAR struct spi_dev_s *dev,
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FAR const void *txbuffer, FAR void *rxbuffer,
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size_t nwords)
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{
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#ifdef CONFIG_SPI_VARSELECT
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FAR struct sam3u_spidev_s *priv = (FAR struct sam3u_spidev_s *)dev;
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uint32_t tdr = (uint32_t)priv->cs << SPI_TDR_PCS_SHIFT;
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#endif
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FAR uint8_t *rxptr = (FAR uint8_t*)rxbuffer;
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FAR uint8_t *txptr = (FAR uint8_t*)txbuffer;
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uint32_t pcs;
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uint32_t data;
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spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
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/* Set up PCS bits */
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pcs = spi_cs2pcs(priv) << SPI_TDR_PCS_SHIFT;
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/* Make sure that any previous transfer is flushed from the hardware */
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spi_flush();
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@ -718,13 +753,13 @@ static void spi_exchange(FAR struct spi_dev_s *dev,
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data = 0xffff;
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}
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/* Set the chip select in the value written to the TDR */
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/* Set the PCS field in the value written to the TDR */
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#ifdef CONFIG_SPI_VARSELECT
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data |= tdr;
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data |= pcs;
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/* Do we need to set the LASTXFER bit in the TDR value too? */
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#ifdef CONFIG_SPI_VARSELECT
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if (nwords == 1)
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{
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data |= SPI_TDR_LASTXFER;
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@ -734,7 +769,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev,
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/* Wait for any previous data written to the TDR to be transferred
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* to the serializer.
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*/
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while ((getreg32(SAM3U_SPI_SR) & SPI_INT_TDRE) == 0);
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/* Write the data to transmitted to the Transmit Data Register (TDR) */
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@ -750,7 +785,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev,
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data = getreg32(SAM3U_SPI_RDR);
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if (rxptr)
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{
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*txptr++ = (uint8_t)data;
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*rxptr++ = (uint8_t)data;
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}
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}
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}
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@ -2,7 +2,7 @@
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* arch/arm/src/stm32/chip/stm32_i2c.h
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*
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* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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@ -991,8 +991,8 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s * priv)
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/* \todo Finish 10-bit mode addressing */
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}
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/* Was address sent, continue with ether sending or reading data */
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/* Was address sent, continue with either sending or reading data */
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else if ((priv->flags & I2C_M_READ) == 0 && (status & (I2C_SR1_ADDR | I2C_SR1_TXE)) != 0)
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{
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stm32_i3c_traceevent(priv, I2CEVENT_READ, priv->dcnt);
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@ -2,7 +2,7 @@
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* arm/arm/src/stm32/stm32_spi.c
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*
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* Copyright (C) 2009-2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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