From 9f1ae482d9a1c1de7096eef7bf13e2838f984e10 Mon Sep 17 00:00:00 2001 From: patacongo Date: Sat, 19 Feb 2011 02:39:25 +0000 Subject: [PATCH] Add more m9s12 files git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3302 42af7a65-404d-4744-a932-0658087f49c3 --- arch/hc/src/common/up_releasepending.c | 131 +++++++++++++++ arch/hc/src/common/up_reprioritizertr.c | 187 +++++++++++++++++++++ arch/hc/src/m9s12/Make.defs | 7 +- arch/hc/src/m9s12/m9s12_initialstate.c | 121 ++++++++++++++ arch/hc/src/m9s12/m9s12_saveusercontext.S | 2 +- arch/hc/src/m9s12/m9s12_timerisr.c | 189 ++++++++++++++++++++++ configs/demo9s12ne64/include/board.h | 1 + 7 files changed, 634 insertions(+), 4 deletions(-) create mode 100755 arch/hc/src/common/up_releasepending.c create mode 100755 arch/hc/src/common/up_reprioritizertr.c create mode 100644 arch/hc/src/m9s12/m9s12_initialstate.c create mode 100755 arch/hc/src/m9s12/m9s12_timerisr.c diff --git a/arch/hc/src/common/up_releasepending.c b/arch/hc/src/common/up_releasepending.c new file mode 100755 index 0000000000..222aa717ef --- /dev/null +++ b/arch/hc/src/common/up_releasepending.c @@ -0,0 +1,131 @@ +/**************************************************************************** + * arch/hc/src/common/up_releasepending.c + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include "os_internal.h" +#include "up_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_release_pending + * + * Description: + * Release and ready-to-run tasks that have collected in the pending task + * list. This can call a context switch if a new task is placed at the + * head of the ready to run list. + * + ****************************************************************************/ + +void up_release_pending(void) +{ + _TCB *rtcb = (_TCB*)g_readytorun.head; + + slldbg("From TCB=%p\n", rtcb); + + /* Merge the g_pendingtasks list into the g_readytorun task list */ + + /* sched_lock(); */ + if (sched_mergepending()) + { + /* The currently active task has changed! We will need to + * switch contexts. First check if we are operating in + * interrupt context: + */ + + if (current_regs) + { + /* Yes, then we have to do things differently. + * Just copy the current_regs into the OLD rtcb. + */ + + up_savestate(rtcb->xcp.regs); + + /* Restore the exception context of the rtcb at the (new) head + * of the g_readytorun task list. + */ + + rtcb = (_TCB*)g_readytorun.head; + slldbg("New Active Task TCB=%p\n", rtcb); + + /* Then switch contexts */ + + up_restorestate(rtcb->xcp.regs); + } + + /* Copy the exception context into the TCB of the task that + * was currently active. if up_saveusercontext returns a non-zero + * value, then this is really the previously running task + * restarting! + */ + + else if (!up_saveusercontext(rtcb->xcp.regs)) + { + /* Restore the exception context of the rtcb at the (new) head + * of the g_readytorun task list. + */ + + rtcb = (_TCB*)g_readytorun.head; + slldbg("New Active Task TCB=%p\n", rtcb); + + /* Then switch contexts */ + + up_fullcontextrestore(rtcb->xcp.regs); + } + } +} diff --git a/arch/hc/src/common/up_reprioritizertr.c b/arch/hc/src/common/up_reprioritizertr.c new file mode 100755 index 0000000000..e17a488673 --- /dev/null +++ b/arch/hc/src/common/up_reprioritizertr.c @@ -0,0 +1,187 @@ +/**************************************************************************** + * arch/hc/src/common/up_reprioritizertr.c + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include "os_internal.h" +#include "up_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_reprioritize_rtr + * + * Description: + * Called when the priority of a running or + * ready-to-run task changes and the reprioritization will + * cause a context switch. Two cases: + * + * 1) The priority of the currently running task drops and the next + * task in the ready to run list has priority. + * 2) An idle, ready to run task's priority has been raised above the + * the priority of the current, running task and it now has the + * priority. + * + * Inputs: + * tcb: The TCB of the task that has been reprioritized + * priority: The new task priority + * + ****************************************************************************/ + +void up_reprioritize_rtr(_TCB *tcb, uint8_t priority) +{ + /* Verify that the caller is sane */ + + if (tcb->task_state < FIRST_READY_TO_RUN_STATE || + tcb->task_state > LAST_READY_TO_RUN_STATE +#if SCHED_PRIORITY_MIN > 0 + || priority < SCHED_PRIORITY_MIN +#endif +#if SCHED_PRIORITY_MAX < UINT8_MAX + || priority > SCHED_PRIORITY_MAX +#endif + ) + { + PANIC(OSERR_BADREPRIORITIZESTATE); + } + else + { + _TCB *rtcb = (_TCB*)g_readytorun.head; + bool switch_needed; + + slldbg("TCB=%p PRI=%d\n", tcb, priority); + + /* Remove the tcb task from the ready-to-run list. + * sched_removereadytorun will return true if we just + * remove the head of the ready to run list. + */ + + switch_needed = sched_removereadytorun(tcb); + + /* Setup up the new task priority */ + + tcb->sched_priority = (uint8_t)priority; + + /* Return the task to the specified blocked task list. + * sched_addreadytorun will return true if the task was + * added to the new list. We will need to perform a context + * switch only if the EXCLUSIVE or of the two calls is non-zero + * (i.e., one and only one the calls changes the head of the + * ready-to-run list). + */ + + switch_needed ^= sched_addreadytorun(tcb); + + /* Now, perform the context switch if one is needed */ + + if (switch_needed) + { + /* If we are going to do a context switch, then now is the right + * time to add any pending tasks back into the ready-to-run list. + * task list now + */ + + if (g_pendingtasks.head) + { + sched_mergepending(); + } + + /* Are we in an interrupt handler? */ + + if (current_regs) + { + /* Yes, then we have to do things differently. + * Just copy the current_regs into the OLD rtcb. + */ + + up_savestate(rtcb->xcp.regs); + + /* Restore the exception context of the rtcb at the (new) head + * of the g_readytorun task list. + */ + + rtcb = (_TCB*)g_readytorun.head; + slldbg("New Active Task TCB=%p\n", rtcb); + + /* Then switch contexts */ + + up_restorestate(rtcb->xcp.regs); + } + + /* Copy the exception context into the TCB at the (old) head of the + * g_readytorun Task list. if up_saveusercontext returns a non-zero + * value, then this is really the previously running task restarting! + */ + + else if (!up_saveusercontext(rtcb->xcp.regs)) + { + /* Restore the exception context of the rtcb at the (new) head + * of the g_readytorun task list. + */ + + rtcb = (_TCB*)g_readytorun.head; + slldbg("New Active Task TCB=%p\n", rtcb); + + /* Then switch contexts */ + + up_fullcontextrestore(rtcb->xcp.regs); + } + } + } +} diff --git a/arch/hc/src/m9s12/Make.defs b/arch/hc/src/m9s12/Make.defs index 03ba7c4960..2c2c68a004 100755 --- a/arch/hc/src/m9s12/Make.defs +++ b/arch/hc/src/m9s12/Make.defs @@ -39,8 +39,9 @@ CMN_ASRCS = CMN_CSRCS = up_allocateheap.c up_blocktask.c up_copystate.c up_createstack.c \ up_doirq.c up_idle.c up_initialize.c up_interruptcontext.c \ up_mdelay.c up_modifyreg16.c up_modifyreg32.c up_modifyreg8.c \ - up_puts.c up_releasestack.c up_udelay.c up_unblocktask.c \ - up_usestack.c + up_puts.c up_releasepending.c up_releasestack.c up_reprioritizertr.c \ + up_udelay.c up_unblocktask.c up_usestack.c CHIP_ASRCS = m9s12_start.S m9s12_lowputc.S m9s12_saveusercontext.S -CHIP_CSRCS = m9s12_assert.c m9s12_serial.c m9s12_irq.c +CHIP_CSRCS = m9s12_assert.c m9s12_serial.c m9s12_initialstate.c m9s12_irq.c \ + m9s12_timerisr.c diff --git a/arch/hc/src/m9s12/m9s12_initialstate.c b/arch/hc/src/m9s12/m9s12_initialstate.c new file mode 100644 index 0000000000..7efe779420 --- /dev/null +++ b/arch/hc/src/m9s12/m9s12_initialstate.c @@ -0,0 +1,121 @@ +/**************************************************************************** + * arch/hc/src/m9s12/m9s12_initialstate.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_initial_state + * + * Description: + * A new thread is being started and a new TCB + * has been created. This function is called to initialize + * the processor specific portions of the new TCB. + * + * This function must setup the intial architecture registers + * and/or stack so that execution will begin at tcb->start + * on the next context switch. + * + ****************************************************************************/ + +void up_initial_state(_TCB *tcb) +{ + struct xcptcontext *xcp = &tcb->xcp; + + /* Initialize the initial exception register context structure */ + + memset(xcp, 0, sizeof(struct xcptcontext)); + + /* Save the initial stack pointer */ + + xcp->regs[REG_SPH] = (uint16_t)tcb->adj_stack_ptr >> 8; + xcp->regs[REG_SPL] = (uint16_t)tcb->adj_stack_ptr & 0xff; + + /* Save the task entry point */ + + xcp->regs[REG_PCH] = (uint16_t)tcb->start >> 8; + xcp->regs[REG_PCL] = (uint16_t)tcb->start & 0xff; + +#ifndef CONFIG_HCS12_NONBANKED + /* Can only directly start in PPAGE 0x30 */ + + xcp->regs[REG_PPAGE] = 0x30; +#endif + + /* Condition code register: + * + * Bit 0: C — Carry/Borrow status bit + * Bit 1: V — Two’s complement overflow status bit + * Bit 2: Z — Zero status bit + * Bit 3: N — Negative status bit + * Bit 4: I — Maskable interrupt control bit + * Bit 5: H — Half-carry status bit + * Bit 6: X — Non-maskable interrupt control bit + * Bit 7: S — STOP instruction control bit + */ + +# ifdef CONFIG_SUPPRESS_INTERRUPTS + xcp->regs[REG_CCR] = 0xd0; /* Disable STOP, Mask I- and Z- interrupts */ +# else + xcp->regs[REG_CCR] = 0x80; /* Disable STOP, Enable I- and Z-interrupts */ +# endif +} + diff --git a/arch/hc/src/m9s12/m9s12_saveusercontext.S b/arch/hc/src/m9s12/m9s12_saveusercontext.S index da2769521d..652ba4980c 100755 --- a/arch/hc/src/m9s12/m9s12_saveusercontext.S +++ b/arch/hc/src/m9s12/m9s12_saveusercontext.S @@ -112,7 +112,7 @@ up_saveusercontext: xgdx - /* Save he PPAGE register */ + /* Save the PPAGE register */ #ifndef CONFIG_HCS12_NONBANKED movb HCS12_MMC_PPAGE, 1, x+ diff --git a/arch/hc/src/m9s12/m9s12_timerisr.c b/arch/hc/src/m9s12/m9s12_timerisr.c new file mode 100755 index 0000000000..3839badf20 --- /dev/null +++ b/arch/hc/src/m9s12/m9s12_timerisr.c @@ -0,0 +1,189 @@ +/**************************************************************************** + * arch/hc/src/m9s12/m9s12_timerisr.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "clock_internal.h" +#include "up_internal.h" +#include "up_arch.h" + +#include "chip.h" +#include "m9s12_internal.h" +#include "m9s12_crg.h" + +/**************************************************************************** + * Definitions + ****************************************************************************/ + +/* The desired timer interrupt frequency is provided by the definition + * CLK_TCK (see include/time.h). CLK_TCK defines the desired number of + * system clock ticks per second. That value is a user configurable setting + * that defaults to 100 (100 ticks per second = 10 MS interval). + */ + +/* The timer frequency is the OSCCLK divided down. The divisor is + * (A+1)*(2**(B+9)) where: + * + * A = MODCNT RTR[0:3] + * B = PREP RTR[4:6] + * + * Maximum and minimum values: + */ + +#define MIN_PRER 1024 /* 2**10, B=1 */ +#define MAX_PRER 65536 /* 2**16, B=7 */ + +#define MIN_MODCNT 1 /* A=0 */ +#define MAX_MODCNT 16 /* A=15 */ + +/* Pick the smallest value of B for which: + * + * OSCCLK/(MAX_MODCNT*(2**(B+9))) >= CLK_TCK >= OSCCLK/(MIN_MODCNT*(2**(B+9))) + */ + +#if CLK_TCK >= HCS12_OSCCLK/(MAX_MODCNT*1024) && HCS12_OSCCLK/(MIN_MODCNT*1024) +# define PRER_VALUE 1 +# define PRER_DIV 1024 +#elif CLK_TCK >= HCS12_OSCCLK/(MAX_MODCNT*2048) && HCS12_OSCCLK/(MIN_MODCNT*2048) +# define PRER_VALUE 2 +# define PRER_DIV 2048 +#elif CLK_TCK >= HCS12_OSCCLK/(MAX_MODCNT*4096) && HCS12_OSCCLK/(MIN_MODCNT*4096) +# define PRER_VALUE 3 +# define PRER_DIV 4096 +#elif CLK_TCK >= HCS12_OSCCLK/(MAX_MODCNT*8192) && HCS12_OSCCLK/(MIN_MODCNT*8192) +# define PRER_VALUE 4 +# define PRER_DIV 8192 +#elif CLK_TCK >= HCS12_OSCCLK/(MAX_MODCNT*16384) && HCS12_OSCCLK/(MIN_MODCNT*16384) +# define PRER_VALUE 5 +# define PRER_DIV 16384 +#elif CLK_TCK >= HCS12_OSCCLK/(MAX_MODCNT*32768) && HCS12_OSCCLK/(MIN_MODCNT*32768) +# define PRER_VALUE 6 +# define PRER_DIV 32768 +#elif CLK_TCK >= HCS12_OSCCLK/(MAX_MODCNT*65536) && HCS12_OSCCLK/(MIN_MODCNT*65536) +# define PRER_VALUE 7 +# define PRER_DIV 65536 +#else +# error "Cannot generate CLK_TCK from HCSCLK_OSCCLK" +#endif + +/* Now we can simply calculate A from: + * + * CLK_TCK = OSCCLK/((A+1)*PRER_DIV) + * OSCCLK / (CLK_TCK * PRER_DIV) - 1 + */ + + #define MODCNT_DENOM ((uint32_t)CLK_TCK * (uint32_t)PRER_DIV) + #define MODCNT_VALUE ((((uint32_t)HCS12_OSCCLK + (MODCNT_DENOM/2))/ MODCNT_DENOM) - 1) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Global Functions + ****************************************************************************/ + +/**************************************************************************** + * Function: up_timerisr + * + * Description: + * The timer ISR will perform a variety of services for various portions + * of the systems. + * + ****************************************************************************/ + +int up_timerisr(int irq, uint32_t *regs) +{ + /* Clear real time interrupt flag */ + + putreg8(CRG_CRGFLG_RTIF, HCS12_CRG_CRGFLG); + + /* Process timer interrupt */ + + sched_process_timer(); + return 0; +} + +/**************************************************************************** + * Function: up_timerinit + * + * Description: + * This function is called during start-up to initialize the system timer + * interrupt. + * + ****************************************************************************/ + +void up_timerinit(void) +{ + uint32_t tmp; + uint8_t regval; + + /* Configure hardware RTI timer (with a hack to avoid and integer overflow + * error at compile time.. hopefully the optimizer will eliminate these + * uint32_t operations). + */ + + tmp = MODCNT_VALUE << CRG_RTICTL_MODCNT_SHIFT | PRER_VALUE << CRG_RTICTL_PRER_SHIFT; + putreg8((uint8_t)tmp, HCS12_CRG_RTICTL); + + /* Attach the timer interrupt vector */ + + (void)irq_attach(HCS12_IRQ_VRTI, (xcpt_t)up_timerisr); + + /* Enable RTI interrupt by setting the RTIE bit */ + + regval = getreg8(HCS12_CRG_CRGINT); + regval |= CRG_CRGINT_RTIE; + putreg8(regval, HCS12_CRG_CRGINT); + + /* And enable the timer interrupt */ + + up_enable_irq(HCS12_IRQ_VRTI); +} diff --git a/configs/demo9s12ne64/include/board.h b/configs/demo9s12ne64/include/board.h index d4c30013c6..9420b67ddb 100755 --- a/configs/demo9s12ne64/include/board.h +++ b/configs/demo9s12ne64/include/board.h @@ -52,6 +52,7 @@ /* Clocking *************************************************************************/ +#define HCS12_OSCCLK 16000000 /* 16MHz */ /* LED definitions ******************************************************************/