Add I2C header file
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1847 42af7a65-404d-4744-a932-0658087f49c3
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@ -163,13 +163,13 @@
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/* I2C register offsets */
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/* I2C register offsets */
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#define LPC214X_I2C_ONSET_OFFSET 0x00 /* Control Set Register */
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#define LPC214X_I2C_CONSET_OFFSET 0x00 /* Control Set Register */
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#define LPC214X_I2C_STAT_OFFSET 0x04 /* Status Register */
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#define LPC214X_I2C_STAT_OFFSET 0x04 /* Status Register */
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#define LPC214X_I2C_DAT_OFFSET 0x08 /* Data Register */
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#define LPC214X_I2C_DAT_OFFSET 0x08 /* Data Register */
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#define LPC214X_I2C_ADR_OFFSET 0x0c /* Slave Address Register */
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#define LPC214X_I2C_ADR_OFFSET 0x0c /* Slave Address Register */
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#define LPC214X_I2C_SCLH_OFFSET 0x10 /* SCL Duty Cycle Register (high half word) */
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#define LPC214X_I2C_SCLH_OFFSET 0x10 /* SCL Duty Cycle Register (high half word) */
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#define LPC214X_I2C_SCLL_OFFSET 0x14 /* SCL Duty Cycle Register (low half word) */
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#define LPC214X_I2C_SCLL_OFFSET 0x14 /* SCL Duty Cycle Register (low half word) */
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#define LPC214X_I2C_ONCLR_OFFSET 0x18 /* Control Clear Register */
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#define LPC214X_I2C_CONCLR_OFFSET 0x18 /* Control Clear Register */
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/* Pin function select register offsets */
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/* Pin function select register offsets */
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141
arch/arm/src/lpc214x/lpc214x_i2c.h
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141
arch/arm/src/lpc214x/lpc214x_i2c.h
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/************************************************************************************
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* arch/arm/src/lpc214x/lpc214x_i2c.h
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef _ARCH_ARM_SRC_LPC214X_I2C_H
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#define _ARCH_ARM_SRC_LPC214X_I2C_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include "chip.h"
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* Register address Offsets *********************************************************/
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/* Defined in chip.h */
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/* Register Address Definitions *****************************************************/
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#define LPC214X_I2C0_CONSET (LPC214X_I2C0_BASE + LPC214X_I2C_ONSET_OFFSET)
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#define LPC214X_I2C0_STAT (LPC214X_I2C0_BASE + LPC214X_I2C_STAT_OFFSET)
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#define LPC214X_I2C0_DAT (LPC214X_I2C0_BASE + LPC214X_I2C_DAT_OFFSET)
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#define LPC214X_I2C0_ADR (LPC214X_I2C0_BASE + LPC214X_I2C_ADR_OFFSET)
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#define LPC214X_I2C0_SCLH (LPC214X_I2C0_BASE + LPC214X_I2C_SCLH_OFFSET)
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#define LPC214X_I2C0_SCLL (LPC214X_I2C0_BASE + LPC214X_I2C_SCLL_OFFSET)
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#define LPC214X_I2C0_CONCLR (LPC214X_I2C0_BASE + LPC214X_I2C_ONCLR_OFFSET)
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#define LPC214X_I2C1_CONSET (LPC214X_I2C1_BASE + LPC214X_I2C_ONSET_OFFSET)
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#define LPC214X_I2C1_STAT (LPC214X_I2C1_BASE + LPC214X_I2C_STAT_OFFSET)
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#define LPC214X_I2C1_DAT (LPC214X_I2C1_BASE + LPC214X_I2C_DAT_OFFSET)
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#define LPC214X_I2C1_ADR (LPC214X_I2C1_BASE + LPC214X_I2C_ADR_OFFSET)
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#define LPC214X_I2C1_SCLH (LPC214X_I2C1_BASE + LPC214X_I2C_SCLH_OFFSET)
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#define LPC214X_I2C1_SCLL (LPC214X_I2C1_BASE + LPC214X_I2C_SCLL_OFFSET)
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#define LPC214X_I2C1_CONCLR (LPC214X_I2C1_BASE + LPC214X_I2C_ONCLR_OFFSET)
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/* I2C register bit definitions *****************************************************/
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/* Control Set Register (CONSET) */
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#define I2C_CONSET_AA (1 << 2) /* Bit 2: Assert acknowledge flag */
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#define I2C_CONSET_SI (1 << 3) /* Bit 3: I2C interrrupt flag */
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#define I2C_CONSET_STO (1 << 4) /* Bit 4: STOP flag */
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#define I2C_CONSET_STA (1 << 5) /* Bit 5: START flag */
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#define I2C_CONSET_I2EN (1 << 6) /* Bit 6: I2C interface enable */
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/* Control Clear Register (CONCLR) */
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#define I2C_CONCLR_AAC (1 << 2) /* Bit 2: Assert acknowledge Clear bit */
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#define I2C_CONCLR_SIC (1 << 3) /* Bit 3: I2C interrupt Clear bit */
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#define I2C_CONCLR_STAC (1 << 5) /* Bit 5: START flag Clear bit */
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#define I2C_CONCLR_I2ENC (1 << 6) /* Bit 6: I2C interface Disable bit */
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/* Status Register (STAT) */
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#define I2C_STAT_SHIFT (1 << 3) /* Bits 3-7: Status bits */
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#define I2C_STAT_MASK (0xff << I2C_STAT_SHIFT)
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/* Master transmit mode */
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# define I2C_STAT_MXSTART (0 << I2C_STAT_SHIFT) /* Start transmitted */
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# define I2C_STAT_MXRSTART (2 << I2C_STAT_SHIFT) /* Repeated start transmitted */
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# define I2C_STAT_MXSLAWACK (3 << I2C_STAT_SHIFT) /* SLA+W tranmitted + ACK received */
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# define I2C_STAT_MXSLAWNAK (4 << I2C_STAT_SHIFT) /* SLA+W tranmitted + NAK received */
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# define I2C_STAT_MXDATAACK (5 << I2C_STAT_SHIFT) /* Data tranmitted + ACK received */
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# define I2C_STAT_MXDATANAK (6 << I2C_STAT_SHIFT) /* Data tranmitted + NAK received */
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# define I2C_STAT_MXARBLOST (7 << I2C_STAT_SHIFT) /* Abritration lost in SLA+W or data */
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/* Master receive mode */
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# define I2C_STAT_MRSTART (0 << I2C_STAT_SHIFT) /* Start transmitted */
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# define I2C_STAT_MRRSTART (2 << I2C_STAT_SHIFT) /* Repeated start transmitted */
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# define I2C_STAT_MRARBLOST (7 << I2C_STAT_SHIFT) /* Abritration lost in NAK bit */
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# define I2C_STAT_MRSLARACK (8 << I2C_STAT_SHIFT) /* SLA+R tranmitted + ACK received */
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# define I2C_STAT_MRSLARNAK (9 << I2C_STAT_SHIFT) /* SLA+R tranmitted + NAK received */
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# define I2C_STAT_MRDATAACK (10 << I2C_STAT_SHIFT) /* Data received + send ACK */
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# define I2C_STAT_MRDATANAK (11 << I2C_STAT_SHIFT) /* Data received + send NAK */
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/* Slave receive mode -- to be provided */
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/* Slave receive mode -- to be provided */
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/* Data Register (DAT) -- 8-bits of data */
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/* Slave Address Register (ADR) */
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#define I2C_ADR_GCA (1 << 0) /* Bit 0: General call enable */
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#define I2C_ADR_SHIFT 1 /* Bits 7-1: address */
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#define I2C_ADR_MASK (0x7f << I2C_ADR_SHIFT)
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/* SCL Duty Cycle Register (high half word - SCLH) - 16-bits of data */
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/* SCL Duty Cycle Register (low half word - SCLL) - 16-bits of data */
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Inline Functions
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************************************************************************************/
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/************************************************************************************
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* Public Function Prototypes
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************************************************************************************/
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#endif /* _ARCH_ARM_SRC_LPC214X_I2C_H */
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