diff --git a/Documentation/NuttX.html b/Documentation/NuttX.html index c12aa0de76..bcb8f65e35 100644 --- a/Documentation/NuttX.html +++ b/Documentation/NuttX.html @@ -2147,8 +2147,8 @@ Refer to the NuttX board README file for further information.

- NOTE:: Support for the Raspberry Pi Zero was never completed. - The incompleted was removed from the prepository but can still be be found in the Obsoleted repository. + Obsoleted:: Support for the Raspberry Pi Zero was never completed. + The incomplete port along with all support for the BCM2708 was removed from the repository with the NuttX-7.28 release but can still be be found in the Obsoleted repository.

diff --git a/arch/README.txt b/arch/README.txt index ff97b53e4c..2be27cd6c3 100644 --- a/arch/README.txt +++ b/arch/README.txt @@ -157,7 +157,6 @@ arch/arm - ARM-based micro-controllers MCU support arch/arm/include/a1x and arch/arm/src/a1x - arch/arm/include/c5471 and arch/arm/src/bcm2708 arch/arm/include/c5471 and arch/arm/src/c5471 arch/arm/include/dm320 and arch/arm/src/dm320 arch/arm/include/efm32 and arch/arm/src/efm32 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 32ba15bc7f..071db80b37 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -24,14 +24,6 @@ config ARCH_CHIP_A1X ---help--- Allwinner A1X family: A10, A10S (A12), A13 (ARM Cortex-A8) -config ARCH_CHIP_BCM2708 - bool "Broadcom BCM2708" - select ARCH_ARM1176JZ - select ARCH_HAVE_LOWVECTORS - select ARCH_HAVE_MMU - select ARCH_USE_MMU - select ARCH_HAVE_TICKLESS - config ARCH_CHIP_C5471 bool "TMS320 C5471" select ARCH_ARM7TDMI @@ -594,7 +586,6 @@ config ARCH_FAMILY config ARCH_CHIP string default "a1x" if ARCH_CHIP_A1X - default "bcm2708" if ARCH_CHIP_BCM2708 default "c5471" if ARCH_CHIP_C5471 default "dm320" if ARCH_CHIP_DM320 default "efm32" if ARCH_CHIP_EFM32 @@ -792,9 +783,6 @@ endif if ARCH_CHIP_A1X source arch/arm/src/a1x/Kconfig endif -if ARCH_CHIP_BCM2708 -source arch/arm/src/bcm2708/Kconfig -endif if ARCH_CHIP_C5471 source arch/arm/src/c5471/Kconfig endif diff --git a/arch/arm/include/bcm2708/chip.h b/arch/arm/include/bcm2708/chip.h deleted file mode 100644 index ee02f97ee4..0000000000 --- a/arch/arm/include/bcm2708/chip.h +++ /dev/null @@ -1,67 +0,0 @@ -/************************************************************************************ - * arch/arm/include/bcm2708/chip.h - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -#ifndef __ARCH_ARM_INCLUDE_BCM2708_CHIP_H -#define __ARCH_ARM_INCLUDE_BCM2708_CHIP_H - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ -/* BCM2708 Family */ - -#if defined(CONFIG_ARCH_CHIP_BCM2835) -#else -# error Unrecognized BCM2708 chip -#endif - -/************************************************************************************ - * Public Types - ************************************************************************************/ - -/************************************************************************************ - * Public Data - ************************************************************************************/ - -/************************************************************************************ - * Public Functions - ************************************************************************************/ - -#endif /* __ARCH_ARM_INCLUDE_BCM2708_CHIP_H */ diff --git a/arch/arm/include/bcm2708/irq.h b/arch/arm/include/bcm2708/irq.h deleted file mode 100644 index 942a26e4af..0000000000 --- a/arch/arm/include/bcm2708/irq.h +++ /dev/null @@ -1,240 +0,0 @@ -/**************************************************************************** - * arch/arm/include/bcm2708/irq.h - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/* This file should never be included directed but, rather, only indirectly through - * nuttx/irq.h - */ - -#ifndef __ARCH_ARM_INCLUDE_BCM2708_IRQ_H -#define __ARCH_ARM_INCLUDE_BCM2708_IRQ_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include -#include - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/* Chip-Specific External interrupts */ - -#if defined(CONFIG_ARCH_CHIP_BCM2835) - -/* Interrupt decode algorithm: - * - * 1) Check bits 0 through BPR_BIT_LAST in the basic pending register. For - * each bit set, dispatch IRQ = bit number - * 2) If bits set in pending register 1, check bits IPR1_BIT_FIRST through - * IPR1_BIT_LAST for the pending 1 register. For each bit set, dispatch - * IRQ = bit number + IPR1_IRQ_FIRST - IPR1_BIT_FIRST. - * 2) If bits set in pending register 2, check bits IPR2_BIT_FIRST through - * IPR2_BIT_LAST for the pending 2 register. For each bit set, dispatch - * IRQ = bit number + IPR2_IRQ_FIRST - IPR2_BIT_FIRST. - */ - -/* Basic pending register */ - -#define BPR_IRQ_FIRST 0 /* IRQ of first defined bit */ -#define BPR_BIT_FIRST 0 /* First defined bit */ - -#define BCM_IRQ_ARM_TIMER (BPR_IRQ_FIRST + 0) /* Bit 0: ARM Timer IRQ pending */ -#define BCM_IRQ_ARM_MAILBOX (BPR_IRQ_FIRST + 1) /* Bit 1: ARM Mailbox IRQ pending */ -#define BCM_IRQ_ARM_DOORBELL_0 (BPR_IRQ_FIRST + 2) /* Bit 2: ARM Doorbell 0 IRQ pending */ -#define BCM_IRQ_ARM_DOORBELL_1 (BPR_IRQ_FIRST + 3) /* Bit 3: ARM Doorbell 2 IRQ pending */ -#define BCM_IRQ_VPU0_HALTED (BPR_IRQ_FIRST + 4) /* Bit 4: GPU0 halted IRQ pending - * (Or GPU1 halted if bit 10 of control - * register 1 is set) */ -#define BCM_IRQ_VPU1_HALTED (BPR_IRQ_FIRST + 5) /* Bit 5: GPU1 halted IRQ pending */ -#define BCM_IRQ_ILLEGAL_TYPE0 (BPR_IRQ_FIRST + 6) /* Bit 6: Illegal access type 1 IRQ pending */ -#define BCM_IRQ_ILLEGAL_TYPE1 (BPR_IRQ_FIRST + 7) /* Bit 7: Illegal access type 0 IRQ pending */ - -#define BCM_IRQ_PENDING1 (BPR_IRQ_FIRST + 8) /* Bit 8: Bits set in pending register 1 */ -#define BCM_IRQ_PENDING2 (BPR_IRQ_FIRST + 9) /* Bit 9: Bits set in pending register 2 */ - -#define BCM_IRQ_JPEG (BPR_IRQ_FIRST + 10) /* Bit 10: GPU IRQ 7 */ -#define BCM_IRQ_USB (BPR_IRQ_FIRST + 11) /* Bit 11: GPU IRQ 9 */ -#define BCM_IRQ_3D (BPR_IRQ_FIRST + 12) /* Bit 12: GPU IRQ 10 */ -#define BCM_IRQ_DMA2 (BPR_IRQ_FIRST + 13) /* Bit 13: GPU IRQ 18 */ -#define BCM_IRQ_DMA3 (BPR_IRQ_FIRST + 14) /* Bit 14: GPU IRQ 19 */ -#define BCM_IRQ_I2C (BPR_IRQ_FIRST + 15) /* Bit 15: GPU IRQ 53 */ -#define BCM_IRQ_SPI (BPR_IRQ_FIRST + 16) /* Bit 16: GPU IRQ 54 */ -#define BCM_IRQ_I2SPCM (BPR_IRQ_FIRST + 17) /* Bit 17: GPU IRQ 55 */ -#define BCM_IRQ_SDIO (BPR_IRQ_FIRST + 18) /* Bit 18: GPU IRQ 56 */ -#define BCM_IRQ_UART (BPR_IRQ_FIRST + 19) /* Bit 19: GPU IRQ 57 */ -#define BCM_IRQ_ARASANSDIO (BPR_IRQ_FIRST + 20) /* Bit 20: GPU IRQ 61 */ - -#define BPR_BIT_IRQMASK 0x001ffcff /* Mask of defined interrupts */ -#define BPR_BIT_LAST BCM_IRQ_ARASANSDIO /* IRQ of last defined bit */ -#define BPR_IRQ_LAST 20 /* Last defined bit */ - -/* IRQ pending 1 register */ - -#define IPR1_IRQ_FIRST (BPR_IRQ_LAST + 1) /* IRQ of first defined bit */ -#define IPR1_BIT_FIRST (0) /* First defined bit */ - -#define BCM_IRQ_TIMER0 (IPR1_IRQ_FIRST + 0) /* Bit 0: System Timer Compare Register 0 */ -#define BCM_IRQ_TIMER1 (IPR1_IRQ_FIRST + 1) /* Bit 1: System Timer Compare Register 1 */ -#define BCM_IRQ_TIMER2 (IPR1_IRQ_FIRST + 2) /* Bit 2: System Timer Compare Register 2 */ -#define BCM_IRQ_TIMER3 (IPR1_IRQ_FIRST + 3) /* Bit 3: System Timer Compare Register 3 */ -#define BCM_IRQ_CODEC0 (IPR1_IRQ_FIRST + 4) -#define BCM_IRQ_CODEC1 (IPR1_IRQ_FIRST + 5) -#define BCM_IRQ_CODEC2 (IPR1_IRQ_FIRST + 6) -#define BCM_IRQ_VC_JPEG (IPR1_IRQ_FIRST + 7) -#define BCM_IRQ_ISP (IPR1_IRQ_FIRST + 8) -#define BCM_IRQ_VC_USB (IPR1_IRQ_FIRST + 9) /* Bit 9: USB Controller */ -#define BCM_IRQ_VC_3D (IPR1_IRQ_FIRST + 10) -#define BCM_IRQ_TRANSPOSER (IPR1_IRQ_FIRST + 11) -#define BCM_IRQ_MULTICORESYNC0 (IPR1_IRQ_FIRST + 12) -#define BCM_IRQ_MULTICORESYNC1 (IPR1_IRQ_FIRST + 13) -#define BCM_IRQ_MULTICORESYNC2 (IPR1_IRQ_FIRST + 14) -#define BCM_IRQ_MULTICORESYNC3 (IPR1_IRQ_FIRST + 15) -#define BCM_IRQ_DMA0 (IPR1_IRQ_FIRST + 16) -#define BCM_IRQ_DMA1 (IPR1_IRQ_FIRST + 17) -#define BCM_IRQ_VC_DMA2 (IPR1_IRQ_FIRST + 18) -#define BCM_IRQ_VC_DMA3 (IPR1_IRQ_FIRST + 19) -#define BCM_IRQ_DMA4 (IPR1_IRQ_FIRST + 20) -#define BCM_IRQ_DMA5 (IPR1_IRQ_FIRST + 21) -#define BCM_IRQ_DMA6 (IPR1_IRQ_FIRST + 22) -#define BCM_IRQ_DMA7 (IPR1_IRQ_FIRST + 23) -#define BCM_IRQ_DMA8 (IPR1_IRQ_FIRST + 24) -#define BCM_IRQ_DMA9 (IPR1_IRQ_FIRST + 25) -#define BCM_IRQ_DMA10 (IPR1_IRQ_FIRST + 26) -#define BCM_IRQ_DMA11 (IPR1_IRQ_FIRST + 27) -#define BCM_IRQ_DMA12 (IPR1_IRQ_FIRST + 28) -#define BCM_IRQ_AUX (IPR1_IRQ_FIRST + 29) /* Bit 29: Aux interrupt */ -#define BCM_IRQ_ARM (IPR1_IRQ_FIRST + 30) -#define BCM_IRQ_VPUDMA (IPR1_IRQ_FIRST + 31) - -#define IPR1_BIT_IRQMASK 0x20000000 /* Mask of defined interrupts */ -#define IPR1_IRQ_LAST BCM_IRQ_VPUDMA /* IRQ of last defined bit */ -#define IPR1_BIT_LAST (31) /* Last defined bit */ - -/* IRQ pending 1 register */ - -#define IPR2_IRQ_FIRST (IPR1_IRQ_LAST + 1) /* IRQ of first defined bit */ -#define IPR2_BIT_FIRST (0) /* First defined bit */ - -#define BCM_IRQ_HOSTPORT (IPR2_IRQ_FIRST + 0) -#define BCM_IRQ_VIDEOSCALER (IPR2_IRQ_FIRST + 1) -#define BCM_IRQ_CCP2TX (IPR2_IRQ_FIRST + 2) -#define BCM_IRQ_SDC (IPR2_IRQ_FIRST + 3) -#define BCM_IRQ_DSI0 (IPR2_IRQ_FIRST + 4) -#define BCM_IRQ_AVE (IPR2_IRQ_FIRST + 5) -#define BCM_IRQ_CAM0 (IPR2_IRQ_FIRST + 6) -#define BCM_IRQ_CAM1 (IPR2_IRQ_FIRST + 7) -#define BCM_IRQ_HDMI0 (IPR2_IRQ_FIRST + 8) -#define BCM_IRQ_HDMI1 (IPR2_IRQ_FIRST + 9) -#define BCM_IRQ_PIXELVALVE1 (IPR2_IRQ_FIRST + 10) -#define BCM_IRQ_I2CSPISLV (IPR2_IRQ_FIRST + 11) /* Bit 11: I2C/SPI slave */ -#define BCM_IRQ_DSI1 (IPR2_IRQ_FIRST + 12) -#define BCM_IRQ_PWA0 (IPR2_IRQ_FIRST + 13) /* Bit 13: PWA0 */ -#define BCM_IRQ_PWA1 (IPR2_IRQ_FIRST + 14) /* Bit 14: PWA1 */ -#define BCM_IRQ_CPR (IPR2_IRQ_FIRST + 15) -#define BCM_IRQ_SMI (IPR2_IRQ_FIRST + 16) /* Bit 16: SMI */ -#define BCM_IRQ_GPIO0 (IPR2_IRQ_FIRST + 17) /* Bit 17: GPIO interrupt 0 */ -#define BCM_IRQ_GPIO1 (IPR2_IRQ_FIRST + 18) /* Bit 18: GPIO interrupt 1 */ -#define BCM_IRQ_GPIO2 (IPR2_IRQ_FIRST + 19) /* Bit 19: GPIO interrupt 2 */ -#define BCM_IRQ_GPIO3 (IPR2_IRQ_FIRST + 20) /* Bit 20: GPIO interrupt 3 */ -#define BCM_IRQ_VC_I2C (IPR2_IRQ_FIRST + 21) /* Bit 21: I2C interrupt */ -#define BCM_IRQ_VC_SPI (IPR2_IRQ_FIRST + 22) /* Bit 22: SPI interrupt */ -#define BCM_IRQ_VC_I2SPCM (IPR2_IRQ_FIRST + 23) /* Bit 23: PCM audio interrupt */ -#define BCM_IRQ_VC_SDIO (IPR2_IRQ_FIRST + 24) /* Bit 24: SDIO interrupt */ -#define BCM_IRQ_VC_UART (IPR2_IRQ_FIRST + 25) -#define BCM_IRQ_SLIMBUS (IPR2_IRQ_FIRST + 26) -#define BCM_IRQ_VEC (IPR2_IRQ_FIRST + 27) -#define BCM_IRQ_CPG (IPR2_IRQ_FIRST + 28) -#define BCM_IRQ_RNG (IPR2_IRQ_FIRST + 29) -#define BCM_IRQ_VC_ARASANSDIO (IPR2_IRQ_FIRST + 30) /* Bit 30: SD Host Controller */ -#define BCM_IRQ_AVSPMON (IPR2_IRQ_FIRST + 31) - -#define IPR2_BIT_IRQMASK 0xffffffff /* Mask of defined interrupts */ -#define IPR2_IRQ_LAST BCM_IRQ_AVSPMON /* IRQ of last defined bit */ -#define IPR2_BIT_LAST (31) /* Last defined bit */ - -/* Number of hardware interrupt vectors */ - -#define BCM_IRQ_NVECTORS (IPR2_IRQ_LAST + 1) - -/* Second level GPIO interrupts */ - -#ifdef CONFIG_BCM2708_GPIO_IRQ -# define BCM_IRQ_GPIO(n) (BCM_IRQ_NVECTORS + (n)) /* IRQ number of pin n */ -# define BCM_IRQ_GPIO0_FIRST (BCM_IRQ_NVECTORS) /* IRQ number of first GPIO0 interrupt */ -# define BCM_IRQ_GPIO1_FIRST (BCM_IRQ_NVECTORS + 32) /* IRQ number of first GPIO1 interrupt */ -# define BCM_IRQ_NGPIOINTS (54) -#else -# define BCM_IRQ_NGPIOINTS (0) -#endif - -/* Number of supported IRQs */ - -#define NR_IRQS (BCM_IRQ_NVECTORS + BCM_IRQ_NGPIOINTS) - -#else -# error Unrecognized BCM2708 chip -#endif - -/**************************************************************************** - * Public Types - ****************************************************************************/ - -#ifndef __ASSEMBLY__ - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -#ifdef __cplusplus -#define EXTERN extern "C" -extern "C" -{ -#else -#define EXTERN extern -#endif - -/**************************************************************************** - * Public Function Prototypes - ****************************************************************************/ - -#undef EXTERN -#ifdef __cplusplus -} -#endif -#endif - -#endif /* __ARCH_ARM_INCLUDE_BCM2708_IRQ_H */ diff --git a/arch/arm/src/bcm2708/Kconfig b/arch/arm/src/bcm2708/Kconfig deleted file mode 100644 index 51692074c1..0000000000 --- a/arch/arm/src/bcm2708/Kconfig +++ /dev/null @@ -1,192 +0,0 @@ -# -# For a description of the syntax of this configuration file, -# see the file kconfig-language.txt in the NuttX tools repository. -# - -if ARCH_CHIP_BCM2708 - -comment "BCM2708 Configuration Options" - -choice - prompt "BCM2708 Chip Selection" - default ARCH_CHIP_BCM2835 - -config ARCH_CHIP_BCM2835 - bool "Broadcom BCM2835" - -endchoice # BCM2708 Configuration Option - -menu "BCM2708 Peripheral Selections" - -config BCM2708_MINI_UART - bool "Mini-UART" - -config BCM2708_PL011_UART - bool "PL011 UART" - -config BCM2708_SPI1 - bool "SPI1" - -config BCM2708_SPI2 - bool "SPI2" - -endmenu # BCM2708 Peripheral Selections - -menu "BCM2708 UART Configuration" - depends on BCM2708_MINI_UART || BCM2708_PL011_UART - -menu "BCM2708 Mini-UART Configuration" - depends on BCM2708_MINI_UART - -config BCM2708_MINI_UART_RXBUFSIZE - int "Receive buffer size" - default 256 - ---help--- - Characters are buffered as they are received. This specifies - the size of the receive buffer. - -config BCM2708_MINI_UART_TXBUFSIZE - int "Transmit buffer size" - default 256 - ---help--- - Characters are buffered before being sent. This specifies - the size of the transmit buffer. - -config BCM2708_MINI_UART_BAUD - int "BAUD rate" - default 115200 - ---help--- - The configured BAUD of the UART. - -config BCM2708_MINI_UART_BITS - int "Character size" - default 8 - ---help--- - The number of bits. Must be either 7 or 8. - -config BCM2708_MINI_UART_PARITY - int "Parity setting" - range 0 2 - default 0 - ---help--- - 0=no parity, 1=odd parity, 2=even parity - -config BCM2708_MINI_UART_2STOP - int "use 2 stop bits" - default 0 - ---help--- - 1=Two stop bits - -config BCM2708_MINI_UART_IFLOWCONTROL - bool "Mini-UART RTS flow control" - default n - select SERIAL_IFLOWCONTROL - ---help--- - Enable BCM2708_MINI_UART RTS flow control - -config BCM2708_MINI_UART_OFLOWCONTROL - bool "Mini-UART CTS flow control" - default n - select SERIAL_OFLOWCONTROL - ---help--- - Enable BCM2708_MINI_UART CTS flow control - -config BCM2708_MINI_UART_BREAKS - bool "Break support" - default n - ---help--- - Support BSD style BREAK IOCTL commands - -endmenu # BCM2708 Mini-UART Configuration - -menu "BCM2708 PL011 UART Configuration" - depends on BCM2708_PL011_UART - -config BCM2708_PL011_UART_RXBUFSIZE - int "Receive buffer size" - default 256 - ---help--- - Characters are buffered as they are received. This specifies - the size of the receive buffer. - -config BCM2708_PL011_UART_TXBUFSIZE - int "Transmit buffer size" - default 256 - ---help--- - Characters are buffered before being sent. This specifies - the size of the transmit buffer. - -config BCM2708_PL011_UART_BAUD - int "BAUD rate" - default 115200 - ---help--- - The configured BAUD of the UART. - -config BCM2708_PL011_UART_BITS - int "Character size" - default 8 - ---help--- - The number of bits. Must be either 7 or 8. - -config BCM2708_PL011_UART_PARITY - int "Parity setting" - range 0 2 - default 0 - ---help--- - 0=no parity, 1=odd parity, 2=even parity - -config BCM2708_PL011_UART_2STOP - int "use 2 stop bits" - default 0 - ---help--- - 1=Two stop bits - -config BCM2708_PL011_UART_IFLOWCONTROL - bool "UART RTS flow control" - default n - select SERIAL_IFLOWCONTROL - ---help--- - Enable UART RTS flow control. CD, DSR, DTR, and RI are not supported. - -config BCM2708_PL011_UART_OFLOWCONTROL - bool "UART CTS flow control" - default n - select SERIAL_OFLOWCONTROL - ---help--- - Enable UART CTS flow control. CD, DSR, DTR, and RI are not supported. - -endmenu # BCM2708 PL011 UART Configuration - -choice - prompt "BCM2708 Serial Console" - default BCM2708_NO_SERIAL_CONSOLE - depends on DEV_CONSOLE - -config BCM2708_MINI_UART_SERIAL_CONSOLE - bool "Use Mini-UART as the serial console" - depends on BCM2708_MINI_UART - select OTHER_SERIAL_CONSOLE - ---help--- - Use the Mini-UART as the serial console - -config BCM2708_PL011_UART_SERIAL_CONSOLE - bool "Use PO011 UART as the serial console" - depends on BCM2708_PL011_UART - select OTHER_SERIAL_CONSOLE - ---help--- - Use the PO011 UART as the serial console - -config BCM2708_NO_SERIAL_CONSOLE - bool "No serial console" - ---help--- - No serial based console - -endchoice # BCM2708 Serial Console -endmenu # BCM2708 UART Configuration - -config BCM2708_GPIO_IRQ - bool "GPIO pin interrupts" - ---help--- - Enable support for interrupting GPIO pins - -endif # ARCH_CHIP_BCM2708 diff --git a/arch/arm/src/bcm2708/Make.defs b/arch/arm/src/bcm2708/Make.defs deleted file mode 100644 index 0e9edcde9c..0000000000 --- a/arch/arm/src/bcm2708/Make.defs +++ /dev/null @@ -1,87 +0,0 @@ -############################################################################ -# arch/arm/bcm2708/Make.defs -# -# Copyright (C) 2017-2018 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name Gregory Nutt nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. -# -############################################################################ - -# The "head" object, i.e., the one that must forced into the link in order -# to draw in all of the other components. In this case, the "head" object -# is the power-up reset handling logic. - -HEAD_ASRC = up_head.S - -# Common assembly language files - -CMN_ASRCS = up_cache.S up_fullcontextrestore.S up_saveusercontext.S -CMN_ASRCS += up_vectors.S up_vectoraddrexcptn.S up_vectortab.S vfork.S - -# Common C source files - -CMN_CSRCS = up_assert.c up_blocktask.c up_copyfullstate.c up_createstack.c -CMN_CSRCS += up_dataabort.c up_mdelay.c up_udelay.c up_exit.c -CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c -CMN_CSRCS += up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c -CMN_CSRCS += up_prefetchabort.c up_releasepending.c up_releasestack.c -CMN_CSRCS += up_reprioritizertr.c up_schedulesigaction.c -CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_syscall.c up_unblocktask.c -CMN_CSRCS += up_undefinedinsn.c up_usestack.c up_vfork.c - -# Use common heap allocation for now (may need to be customized later) - -CMN_CSRCS += up_allocateheap.c - -# Configuration dependent C and assembly language files - -ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y) -CMN_CSRCS += up_idle.c -endif - -ifeq ($(CONFIG_PAGING),y) -CMN_CSRCS += up_pginitialize.c up_checkmapping.c up_allocpage.c up_va2pte.c -endif - -ifeq ($(CONFIG_STACK_COLORATION),y) -CMN_CSRCS += up_checkstack.c -endif - -# BCM2708-specific source files. - -CHIP_CSRCS = bcm_boot.c bcm_memorymap.c bcm_clockconfig.c bcm_irq.c -CHIP_CSRCS += bcm_tickless.c bcm_gpio.c bcm_aux.c bcm_lowputc.c bcm_serial.c - -ifeq ($(CONFIG_BCM2708_GPIO_IRQ),y) -CHIP_CSRCS += bcm_gpioint.c -endif - -ifeq ($(CONFIG_BCM2708_MINI_UART),y) -CHIP_CSRCS += bcm_miniuart.c -endif diff --git a/arch/arm/src/bcm2708/bcm_aux.c b/arch/arm/src/bcm2708/bcm_aux.c deleted file mode 100644 index f44b93b21e..0000000000 --- a/arch/arm/src/bcm2708/bcm_aux.c +++ /dev/null @@ -1,235 +0,0 @@ -/**************************************************************************** - * arch/arm/src/bcm2708/bcm_aux.c - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include - -#include -#include - -#include "up_arch.h" -#include "bcm_config.h" -#include "chip/bcm2708_aux.h" -#include "bcm_aux.h" - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -static FAR void *g_aux_arg[3]; - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: bcm_aux_interrupt - * - * Description: - * AUX interrupt handler - * - * Input Parameters: - * Standard interrupt input parameters - * - * Returned Value: - * Always returns OK - * - * Assumptions: - * Interrupts ar disabled - * - ****************************************************************************/ - -static int bcm_aux_interrupt(int irq, FAR void *context, FAR void *arg) -{ - uint32_t auxirq; - - /* Read the pending AUX interrupts */ - - auxirq = getreg32(BCM_AUX_IRQ); - -#ifdef CONFIG_BCM2708_MINI_UART - if ((auxirq & BCM_AUX_IRQ_MU) != 0) - { - (void)bcm_mu_interrupt(irq, context, g_aux_arg[(int)BCM_AUX_MINI_UART]); - } -#endif - -#ifdef CONFIG_BCM2708_SPI1 - if ((auxirq & BCM_AUX_IRQ_SPI1) != 0) - { - (void)bcm_spi1_interrupt(irq, context, g_aux_arg[(int)BCM_AUX_MINI_SPI1]); - } -#endif - -#ifdef CONFIG_BCM2708_SPI2 - if ((auxirq & BCM_AUX_IRQ_SPI2) != 0) - { - (void)bcm_spi2_interrupt(irq, context, g_aux_arg[(int)BCM_AUX_MINI_SPI2]); - } -#endif - - return OK; -} - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: bcm_aux_irqinitialize - * - * Description: - * Called during IRQ initialize to initialize the shard AUX interrupt - * logic. - * - ****************************************************************************/ - -void bcm_aux_irqinitialize(void) -{ - /* Disable all AUX interrupt sources (Also disables all peripheral - * register accesses). - * - * Keep the Mini-UART enabled if we are using it for the system console - * (since it was initialized earlier in the boot-up sequence). - */ - -#ifdef CONFIG_BCM2708_MINI_UART_SERIAL_CONSOLE - putreg32(BCM_AUX_ENB_MU, BCM_AUX_ENB); -#else - putreg32(0, BCM_AUX_ENB); -#endif - - /* Attach and enable the AUX interrupt */ - - (void)irq_attach(BCM_IRQ_AUX, bcm_aux_interrupt, NULL); - up_enable_irq(BCM_IRQ_AUX); -} - -/**************************************************************************** - * Name: bcm_aux_enable - * - * Description: - * Enable the specified AUX interrupt (also enables access to peripheral - * registers). - * - ****************************************************************************/ - -void bcm_aux_enable(enum bcm_aux_peripheral_e periph, FAR void *arg) -{ - uint32_t setbits; - - /* Read the AUX perpheral enable */ - -#ifdef CONFIG_BCM2708_MINI_UART - if (periph == BCM_AUX_MINI_UART) - { - setbits = BCM_AUX_ENB_MU; - } - else -#endif - -#ifdef CONFIG_BCM2708_SPI1 - if (periph == BCM_AUX_MINI_UART) - { - setbits = BCM_AUX_ENB_SPI1; - } - else -#endif - -#ifdef CONFIG_BCM2708_SPI2 - if (periph == BCM_AUX_MINI_UART) - { - setbits = BCM_AUX_ENB_SPI1; - } - else -#endif - { - return; - } - - g_aux_arg[(int)periph] = arg; - modifyreg32(BCM_AUX_ENB, 0, setbits); -} - -/**************************************************************************** - * Name: bcm_aux_disable - * - * Description: - * Disable the specified AUX interrupt (also disables access to peripheral - * registers). - * - ****************************************************************************/ - -void bcm_aux_disable(enum bcm_aux_peripheral_e periph) -{ - uint32_t clrbits; - - /* Read the AUX perpheral enable */ - -#ifdef CONFIG_BCM2708_MINI_UART - if (periph == BCM_AUX_MINI_UART) - { - clrbits = BCM_AUX_ENB_MU; - } - else -#endif - -#ifdef CONFIG_BCM2708_SPI1 - if (periph == BCM_AUX_MINI_UART) - { - clrbits = BCM_AUX_ENB_SPI1; - } - else -#endif - -#ifdef CONFIG_BCM2708_SPI2 - if (periph == BCM_AUX_MINI_UART) - { - clrbits = BCM_AUX_ENB_SPI1; - } - else -#endif - { - return; - } - - g_aux_arg[(int)periph] = NULL; - modifyreg32(BCM_AUX_ENB, clrbits, 0); -} diff --git a/arch/arm/src/bcm2708/bcm_aux.h b/arch/arm/src/bcm2708/bcm_aux.h deleted file mode 100644 index 7fb828da88..0000000000 --- a/arch/arm/src/bcm2708/bcm_aux.h +++ /dev/null @@ -1,114 +0,0 @@ -/**************************************************************************** - * arch/arm/src/bcm2708/bcm_aux.h - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -#ifndef __ARCH_ARM_SRC_BCM2708_BCM_AUX_H -#define __ARCH_ARM_SRC_BCM2708_BCM_AUX_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -/**************************************************************************** - * Public Types - ****************************************************************************/ - -enum bcm_aux_peripheral_e -{ - BCM_AUX_MINI_UART = 0, /* Mini UART peripheral */ - BCM_AUX_MINI_SPI1, /* SPI1 peripheral */ - BCM_AUX_MINI_SPI2, /* SPI2 peripheral */ -}; - -/**************************************************************************** - * Public Function Prototypes - ****************************************************************************/ - -/**************************************************************************** - * Name: bcm_aux_irqinitialize - * - * Description: - * Called during IRQ initialize to initialize the shard AUX interrupt - * logic. - * - ****************************************************************************/ - -void bcm_aux_irqinitialize(void); - -/**************************************************************************** - * Name: bcm_aux_enable - * - * Description: - * Enable the specified AUX interrupt (also enables access to peripheral - * registers). - * - ****************************************************************************/ - -void bcm_aux_enable(enum bcm_aux_peripheral_e periph, FAR void *arg); - -/**************************************************************************** - * Name: bcm_aux_disable - * - * Description: - * Disable the specified AUX interrupt (also disables access to peripheral - * registers). - * - ****************************************************************************/ - -void bcm_aux_disable(enum bcm_aux_peripheral_e periph); - -/**************************************************************************** - * Name: bcm_[mu|spi1|spi2]_interupt - * - * Description: - * These callbacks must be provided by Mini-UART, SPI1, and SPI2 logic - * when those peripherals are configured. These callbacks will be invoked - * from interrupt level processing when an interrupt for one of those - * peripherals is received (with interrupts disabled) - * - ****************************************************************************/ - -#ifdef CONFIG_BCM2708_MINI_UART -int bcm_mu_interrupt(int irq, FAR void *context, FAR void *arg); -#endif -#ifdef CONFIG_BCM2708_SPI1 -int bcm_spi1_interrupt(int irq, FAR void *context, FAR void *arg); -#endif -#ifdef CONFIG_BCM2708_SPI2 -int bcm_spi2_interrupt(int irq, FAR void *context, FAR void *arg); -#endif - -#endif /* __ARCH_ARM_SRC_BCM2708_BCM_AUX_H */ diff --git a/arch/arm/src/bcm2708/bcm_boot.c b/arch/arm/src/bcm2708/bcm_boot.c deleted file mode 100644 index 7dbc32cb81..0000000000 --- a/arch/arm/src/bcm2708/bcm_boot.c +++ /dev/null @@ -1,411 +0,0 @@ -/**************************************************************************** - * arch/arm/src/bcm2708/bcm_boot.c - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Author: Alan Carvalho de Assis - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include -#include -#include - -#ifdef CONFIG_PAGING -# include -#endif - -#include - -#include "arm.h" -#include "cache.h" -#include "up_internal.h" -#include "up_arch.h" - -#include "chip.h" -#include "bcm_config.h" -#include "bcm_clockconfig.h" -#include "bcm_memorymap.h" -#include "bcm_lowputc.h" -#include "bcm_serial.h" -#include "bcm_boot.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -#ifdef CONFIG_DEBUG_FEATURES -# define PROGRESS(c) bcm_lowputc(c) -#else -# define PROGRESS(c) -#endif - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/* Symbols defined via the linker script */ - -extern uint32_t _vector_start; /* Beginning of vector block */ -extern uint32_t _vector_end; /* End+1 of vector block */ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: bcm_set_level1entry - *****************************************************************************/ - -static inline void bcm_set_level1entry(uint32_t paddr, uint32_t vaddr, - uint32_t mmuflags) -{ - uint32_t *pgtable = (uint32_t *)PGTABLE_BASE_VADDR; - uint32_t index = vaddr >> 20; - - /* Save the page table entry */ - - pgtable[index] = (paddr | mmuflags); -} - -/**************************************************************************** - * Name: bcm_setupmappings - * - * Description: - * Map all of the initial memory regions defined in g_section_mapping[] - * - ****************************************************************************/ - -static inline void bcm_setupmappings(void) -{ - int i, j; - - for (i = 0; i < g_num_mappings; i++) - { - uint32_t sect_paddr = g_section_mapping[i].physbase; - uint32_t sect_vaddr = g_section_mapping[i].virtbase; - uint32_t mmuflags = g_section_mapping[i].mmuflags; - - for (j = 0; j < g_section_mapping[i].nsections; j++) - { - bcm_set_level1entry(sect_paddr, sect_vaddr, mmuflags); - sect_paddr += SECTION_SIZE; - sect_vaddr += SECTION_SIZE; - } - } -} - -/**************************************************************************** - * Name: bcm_vectorsize - * - * Description: - * Return the size of the vector data - * - ****************************************************************************/ - -static inline size_t bcm_vectorsize(void) -{ - uintptr_t src; - uintptr_t end; - - src = (uintptr_t)&_vector_start; - end = (uintptr_t)&_vector_end; - - return (size_t)(end - src); -} - -/**************************************************************************** - * Name: bcm_copyvectorblock - * - * Description: - * Copy the interrupt block to its final destination. Vectors are already - * positioned at the beginning of the text region and only need to be - * copied in the case where we are using high vectors or where the beginning - * of the text region cannot be remapped to address zero. - * - ****************************************************************************/ - -static void bcm_copyvectorblock(void) -{ - uint32_t *src; - uint32_t *end; - uint32_t *dest; - -#ifdef CONFIG_PAGING - /* If we are using re-mapped vectors in an area that has been marked - * read only, then temporarily mark the mapping write-able (non-buffered). - */ - - bcm_vectorpermissions(MMU_L2_VECTRWFLAGS); -#endif - - /* Copy the vectors into SDRAM at the address that will be mapped to the - * vector address: - * - * BCM_VECTOR_PADDR - Unmapped, physical address of vector table in SDRAM - * BCM_VECTOR_VSDRAM - Virtual address of vector table in SDRAM - * BCM_VECTOR_VADDR - Virtual address of vector table (0x00000000 or - * 0xffff0000) - */ - - src = (uint32_t *)&_vector_start; - end = (uint32_t *)&_vector_end; - dest = (uint32_t *)BCM_VECTOR_VSDRAM; - - while (src < end) - { - *dest++ = *src++; - } - - /* Flush the DCache to assure that the vector data is in physical RAM */ - - cp15_flush_idcache((uint32_t)BCM_VECTOR_VSDRAM, - (uint32_t)BCM_VECTOR_VSDRAM + bcm_vectorsize()); -} - -/**************************************************************************** - * Name: bcm_wdtdisable - * - * Description: - * Disable the watchdog timer. The BCM2708 always boots with the watchdog - * timer enabled at its maximum timeout (16 seconds). The watchdog timer - * can disabled by writing to the Watchdog Mode Register (WDT_MR). The - * WDT_MR, however, can be written only one time after the CPU has been - * reset. - * - * So if no watchdog timer driver has been configured, the watchdog timer - * must be disabled as part of the start up logic. But, on the other - * hand, we must not write to the WDT_MR register if the watchdog timer - * driver is configured. In that case, some later application will - * configure the WDT and begin periodic pinging (within 16 seconds, - * hopefully). - * - ****************************************************************************/ - -#ifndef CONFIG_BCM2708_WDT -static inline void bcm_wdtdisable(void) -{ - /* REVISIT: WDT initialization */ -} -#else -# define bcm_wdtdisable() -#endif - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: arm_boot - * - * Description: - * Complete boot operations started in arm_head.S - * - * Boot Sequence - * - * This logic may be executing in SDRAM or in external memory: CS0, DDR, - * CS1, CS2, or CS3. It may be executing in CS0 or SDRAM through the - * action of the BCM2708 "first level bootloader;" it might be executing in - * CS1-3 through the action of some second level bootloader that provides - * configuration for those memories. - * - * The system always boots from the ROM memory at address 0x0000:0000, - * starting the internal first level bootloader. That bootloader can be - * configured to work in different ways using the BMS pin and the contents - * of the Boot Sequence Configuration Register (BSC_CR). - * - * If the BMS_BIT is read "1", then the first level bootloader will - * support execution of code in the memory connected to CS0 on the EBI - * interface (presumably NOR flash). The following sequence is performed - * by the first level bootloader if BMS_BIT is "1": - * - * - The main clock is the on-chip 12 MHz RC oscillator, - * - The Static Memory Controller is configured with timing allowing - * code execution in CS0 external memory at 12 MHz - * - AXI matrix is configured to remap EBI CS0 address at 0x0 - * - 0x0000:0000 is loaded in the Program Counter register - * - * The user software in the external memory must perform the next - * operation in order to complete the clocks and SMC timings configuration - * to run at a higher clock frequency: - * - * - Enable the 32768 Hz oscillator if best accuracy is needed - * - Reprogram the SMC setup, cycle, hold, mode timing registers for EBI - * CS0, to adapt them to the new clock. - * - Program the PMC (Main Oscillator Enable or Bypass mode) - * - Program and Start the PLL - * - Switch the system clock to the new value - * - * If the BMS_BIT is read "0", then the first level bootloader will - * perform: - * - * - Basic chip initialization: XTal or external clock frequency - * detection: - * - * a. Stack Setup for ARM supervisor mode - * b. Main Oscillator Detection: The bootloader attempts to use an - * external crystal. If this is not successful, then the 12 MHz - * Fast RC internal oscillator is used as the main osciallator. - * c. Main Clock Selection: The Master Clock source is switched from - * to the main oscillator without prescaler. PCK and MCK are now - * the Main Clock. - * d. PLLA Initialization: PLLA is configured to get a PCK at 96 MHz - * and an MCK at 48 MHz. If an external clock or crystal frequency - * running at 12 MHz is found, then the PLLA is configured to allow - * USB communication. - * - * - Attempt to retrieve a valid code from external non-volatile - * memories (NVM): SPI0 CS0 Flash Boot, SD Card Boot, NAND Flash Boot, - * SPI0 CS1 Flash Boot, or TWI EEPROM Boot. Different heuristics are - * used with each media type. If a valid image is found, it is copied - * to internal SDRAM and started. - * - ****************************************************************************/ - -void arm_boot(void) -{ -#if defined(CONFIG_ARCH_RAMFUNCS) - const uint32_t *src; -#endif -#if defined(CONFIG_ARCH_RAMFUNCS) - uint32_t *dest; -#endif - - /* __start provided the basic MMU mappings for SDRAM. Now provide mappings - * for all IO regions (Including the vector region). - */ - - bcm_setupmappings(); - PROGRESS('A'); - -#ifdef CONFIG_ARCH_RAMFUNCS - /* Copy any necessary code sections from FLASH to RAM. The correct - * destination in SDRAM is given by _sramfuncs and _eramfuncs. The - * temporary location is in flash after the data initialization code - * at _framfuncs - */ - - for (src = &_framfuncs, dest = &_sramfuncs; dest < &_eramfuncs; ) - { - *dest++ = *src++; - } - - PROGRESS('B'); - - /* Flush the copied RAM functions into physical RAM so that will - * be available when fetched into the I-Cache. - */ - - cp15_flush_idcache((uint32_t)&_sramfuncs, (uint32_t)&_eramfuncs) - PROGRESS('C'); -#endif - - /* Setup up vector block. _vector_start and _vector_end are exported from - * arm_vector.S - */ - - bcm_copyvectorblock(); - PROGRESS('D'); - - /* Disable the watchdog timer */ - - bcm_wdtdisable(); - PROGRESS('E'); - - /* Initialize clocking to settings provided by board-specific logic */ - - bcm_clockconfig(); - PROGRESS('F'); - -#ifdef CONFIG_ARCH_FPU - /* Initialize the FPU */ - - arm_fpuconfig(); - PROGRESS('G'); -#endif - - /* Perform board-specific memroy initialization, This must include - * initialization of board-specific memory resources (e.g., SDRAM) - * - * NOTE: We must use caution prior to this point to make sure that - * the logic does not access any global variables that might lie - * in SDRAM. - */ - - bcm_memory_initialize(); - PROGRESS('H'); - -#ifdef NEED_SDRAM_REMAPPING - /* SDRAM was configured in a temporary state to support low-level - * initialization. Now that the SDRAM has been fully initialized, - * we can reconfigure the SDRAM in its final, fully cache-able state. - */ - - bcm_remap(); - PROGRESS('I'); -#endif - -#ifdef CONFIG_BOOT_SDRAM_DATA - /* If .data and .bss reside in SDRAM, then initialize the data sections - * now after SDRAM has been initialized. - */ - - arm_data_initialize(); - PROGRESS('J'); -#endif - - /* Perform board-specific device initialization. This would include - * configuration of board specific resources such as GPIOs, LEDs, etc. - */ - - bcm_board_initialize(); - PROGRESS('K'); - - /* Perform common, low-level chip initialization (might do nothing) */ - - bcm_lowsetup(); - PROGRESS('L'); - -#ifdef USE_EARLYSERIALINIT - /* Perform early serial initialization if we are going to use the serial - * driver. - */ - - bcm_earlyserialinit(); - PROGRESS('M'); -#endif - PROGRESS('\n'); -} diff --git a/arch/arm/src/bcm2708/bcm_boot.h b/arch/arm/src/bcm2708/bcm_boot.h deleted file mode 100644 index 0f7384352f..0000000000 --- a/arch/arm/src/bcm2708/bcm_boot.h +++ /dev/null @@ -1,116 +0,0 @@ -/**************************************************************************** - * arch/arm/src/bcm2708/bcm_boot.h - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -#ifndef __ARCH_ARM_SRC_BCM2708_BCM_BOOT_H -#define __ARCH_ARM_SRC_BCM2708_BCM_BOOT_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include -#include - -#include -#include -#include - -#include "up_internal.h" -#include "chip.h" - -/**************************************************************************** - * Public Function Prototypes - ****************************************************************************/ - -#ifndef __ASSEMBLY__ - -#undef EXTERN -#if defined(__cplusplus) -#define EXTERN extern "C" -extern "C" -{ -#else -#define EXTERN extern -#endif - -/**************************************************************************** - * Name: bcm_memory_initialize - * - * Description: - * All BCM2708 architectures must provide the following entry point. This - * entry point is called early in the initialization before memory has - * been configured. This board-specific function is responsible for - * configuring any on-board memories. - * - * Logic in bcm_memory_initialize must be careful to avoid using any - * global variables because those will be uninitialized at the time this - * function is called. - * - * Input Parameters: - * None - * - * Returned Value: - * None - * - ****************************************************************************/ - -void bcm_memory_initialize(void); - -/**************************************************************************** - * Name: bcm_board_initialize - * - * Description: - * All BCM2708 architectures must provide the following entry point. This - * entry point is called in the initialization phase -- after - * bcm_memory_initialize and after all memory has been configured and - * mapped but before any devices have been initialized. - * - * Input Parameters: - * None - * - * Returned Value: - * None - * - ****************************************************************************/ - -void bcm_board_initialize(void); - -#undef EXTERN -#if defined(__cplusplus) -} -#endif - -#endif /* __ASSEMBLY__ */ -#endif /* __ARCH_ARM_SRC_BCM2708_BCM_BOOT_H */ diff --git a/arch/arm/src/bcm2708/bcm_clockconfig.c b/arch/arm/src/bcm2708/bcm_clockconfig.c deleted file mode 100644 index 5e25d5efd1..0000000000 --- a/arch/arm/src/bcm2708/bcm_clockconfig.c +++ /dev/null @@ -1,70 +0,0 @@ -/**************************************************************************** - * arch/arm/src/bcm2708/bcm_clockconfig.c - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include "bcm_config.h" -#include "bcm_clockconfig.h" - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: bcm_clockconfig - * - * Description: - * Called to initialize the BCM2708. This does whatever setup is needed to - * put the SoC in a usable state. This includes the initialization of - * clocking using the settings in board.h. - * - ****************************************************************************/ - -void bcm_clockconfig(void) -{ - /* Don't change the current basic clock configuration if we are running - * from SDRAM. In this case, some bootloader logic has already configured - * clocking and SDRAM. We are pretty much committed to using things the - * way that the bootloader has left them. - */ - -#ifndef CONFIG_BOOT_RUNFROMSDRAM -# warning Missing logic -#endif -} diff --git a/arch/arm/src/bcm2708/bcm_clockconfig.h b/arch/arm/src/bcm2708/bcm_clockconfig.h deleted file mode 100644 index b1fe82d54e..0000000000 --- a/arch/arm/src/bcm2708/bcm_clockconfig.h +++ /dev/null @@ -1,61 +0,0 @@ -/**************************************************************************** - * arch/arm/src/bcm2708/bcm_clockconfig.h - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -#ifndef __ARCH_ARM_SRC_BCM2708_BCM_CLOCKCONFIG_H -#define __ARCH_ARM_SRC_BCM2708_BCM_CLOCKCONFIG_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -/**************************************************************************** - * Public Function Prototypes - ****************************************************************************/ - -/**************************************************************************** - * Name: bcm_clockconfig - * - * Description: - * Called to initialize the BCM2708. This does whatever setup is needed to - * put the SoC in a usable state. This includes the initialization of - * clocking using the settings in board.h. - * - ****************************************************************************/ - -void bcm_clockconfig(void); - -#endif /* __ARCH_ARM_SRC_BCM2708_BCM_CLOCKCONFIG_H */ diff --git a/arch/arm/src/bcm2708/bcm_config.h b/arch/arm/src/bcm2708/bcm_config.h deleted file mode 100644 index 2a8def2561..0000000000 --- a/arch/arm/src/bcm2708/bcm_config.h +++ /dev/null @@ -1,79 +0,0 @@ -/**************************************************************************** - * arch/arm/src/bcm2708/bcm_config.h - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -#ifndef __ARCH_ARM_SRC_BCM2708_BCM_CONFIG_H -#define __ARCH_ARM_SRC_BCM2708_BCM_CONFIG_H 1 - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/* Configuration ************************************************************/ - -/* Is there a UART enabled? The BCM2835 device has two UARTS. On mini UART - * and and PL011 UART. - */ - -#if defined(CONFIG_BCM2708_MINI_UART) || defined(CONFIG_BCM2708_PL011_UART) -# define BCM_HAVE_UART -#endif - -#undef SUPPRESS_CONSOLE_CONFIG -#ifdef CONFIG_SUPPRESS_UART_CONFIG -# define SUPPRESS_CONSOLE_CONFIG 1 -#endif - -/* Is there a serial console? It could be on UART1-5 */ - -#if defined(CONFIG_BCM2708_MINI_UART_SERIAL_CONSOLE) && defined(CONFIG_BCM2708_MINI_UART) -# undef CONFIG_BCM2708_PL011_UART_SERIAL_CONSOLE -# define BCM_HAVE_UART_CONSOLE 1 -#elif defined(CONFIG_BCM2708_PL011_UART_SERIAL_CONSOLE) && defined(CONFIG_BCM2708_PL011_UART) -# undef CONFIG_BCM2708_MINI_UART_SERIAL_CONSOLE -# define BCM_HAVE_UART_CONSOLE 1 -#else -# warning "No valid serial console Setting" -# undef CONFIG_BCM2708_MINI_UART_SERIAL_CONSOLE -# undef CONFIG_BCM2708_PL011_UART_SERIAL_CONSOLE -# undef BCM_HAVE_UART_CONSOLE -#endif - -#endif /* __ARCH_ARM_SRC_BCM2708_BCM_CONFIG_H */ diff --git a/arch/arm/src/bcm2708/bcm_gpio.c b/arch/arm/src/bcm2708/bcm_gpio.c deleted file mode 100644 index 3e16326a0e..0000000000 --- a/arch/arm/src/bcm2708/bcm_gpio.c +++ /dev/null @@ -1,258 +0,0 @@ -/**************************************************************************** - * arch/arm/src/bcm2708/bcm_gpio.c - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include - -#include - -#include "up_arch.h" -#include "bcm_config.h" -#include "chip/bcm2708_gpio.h" -#include "bcm_gpio.h" - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/************************************************************************************ - * Function: bcm_gpio_fsel - * - * Description: - * Set the FSEL field for the given pin. - * - ************************************************************************************/ - -static void bcm_gpio_fsel(unsigned int pin, uint8_t mode) -{ - uintptr_t regaddr = BCM_GPIO_GPFSEL(pin); - uint32_t clrbits = BCM_GPIO_GPFSEL_FSEL_MASK(pin); - uint32_t setbits = BCM_GPIO_GPFSEL_FSEL(pin, mode); - - modifyreg32(regaddr, clrbits, setbits); -} - -/************************************************************************************ - * Function: bcm_gpio_pudclk - * - * Description: - * Clocks the value written into the pud to the GPIO pin. - * - ************************************************************************************/ - -static void bcm_gpio_pudclk(unsigned int pin, bool enable) -{ - uintptr_t regaddr = BCM_GPIO_GPPUDCLK(pin); - uint32_t mask = BCM_GPIO_GPPUD_PUDCLK_MASK(pin); - - if (enable) - { - modifyreg32(regaddr, 0, mask); - } - else - { - modifyreg32(regaddr, mask, 0); - } -} - -/************************************************************************************ - * Function: bcm_gpio_configpud - * - * Description: - * "The GPIO Pull-up/down Clock Registers control the actuation of internal - * pull-downs on the respective GPIO pins. These registers must be used in - * conjunction with the GPPUD register to effect GPIO Pull-up/down changes. The - * following sequence of events is required: - * - * "1. Write to GPPUD to set the required control signal (i.e. Pull-up or Pull- - * Down or neither to remove the current Pull-up/down) - * "2. Wait 150 cycles – this provides the required set-up time for the control - * signal - * "3. Write to GPPUDCLK0/1 to clock the control signal into the GPIO pads you - * wish to modify – NOTE only the pads which receive a clock will be modified, - * all others will retain their previous state. - * "4. Wait 150 cycles – this provides the required hold time for the control - * signal - * "5. Write to GPPUD to remove the control signal - * "6. Write to GPPUDCLK0/1 to remove the clock" - * - ************************************************************************************/ - -static void bcm_gpio_configpud(unsigned int pin, gpio_pinset_t pinset) -{ - uint32_t pud = (pinset & GPIO_PUD_MASK) >> GPIO_PUD_SHIFT; - - /* "1. Write to GPPUD to set the required control signal (i.e. Pull-up or Pull- - * Down or neither to remove the current Pull-up/down) - */ - - putreg32(pud, BCM_GPIO_GPPUD); - - /* "2. Wait 150 cycles – this provides the required set-up time for the control - * signal - */ - - up_udelay(10); - - /* "3. Write to GPPUDCLK0/1 to clock the control signal into the GPIO pads you - * wish to modify – NOTE only the pads which receive a clock will be modified, - * all others will retain their previous state. - */ - - bcm_gpio_pudclk(pin, true); - - /* "4. Wait 150 cycles – this provides the required hold time for the control - * signal - */ - - up_udelay(10); - - /* "5. Write to GPPUD to remove the control signal */ - - putreg32(BCM_GPIO_GPPUD_PUD_OFF, BCM_GPIO_GPPUD); - - /* "6. Write to GPPUDCLK0/1 to remove the clock" */ - - bcm_gpio_pudclk(pin, false); -} - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/************************************************************************************ - * Function: bcm_gpio_initialize - * - * Description: - * Based on configuration within the .config file, it does: - * - Remaps positions of alternative functions for GPIO. - * - * Typically called from bcm_start(). - * - ************************************************************************************/ - -void bcm_gpio_initialize(void) -{ - /* Nothing to be done */ -} - -/************************************************************************************ - * Name: bcm_gpio_config - * - * Description: - * Configure a GPIO pin based on bit-encoded description of the pin. - * - ************************************************************************************/ - -int bcm_gpio_config(gpio_pinset_t pinset) -{ - unsigned int pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT; - uint8_t mode; - - /* First, force the pin into an innocuous input state */ - - bcm_gpio_fsel(pin, BCM_GPIO_GPFSEL_FSEL_INPUT); - -#ifdef CONFIG_BCM2708_GPIO_IRQ - /* Make sure that interrupts are disabled */ - - bcm_gpio_irqconfig(pinset & ~GPIO_INT_MASK); -#endif - - /* Configure the pin pull-ups or pull-downs */ - - bcm_gpio_configpud(pin, pinset); - - /* If the the pin is an output, set the correct output state */ - - mode = (pinset & GPIO_MODE_MASK) >> GPIO_MODE_SHIFT; - if (mode == BCM_GPIO_GPFSEL_FSEL_OUTPUT) - { - bool value = (pinset & GPIO_OUTPUT_MASK) != GPIO_OUTPUT_CLEAR; - bcm_gpio_write(pinset, value); - } - - /* Finally configure the correct mode */ - - bcm_gpio_fsel(pin, mode); - return OK; -} - -/************************************************************************************ - * Name: bcm_gpio_write - * - * Description: - * Write one or zero to the selected GPIO pin - * - ************************************************************************************/ - -void bcm_gpio_write(gpio_pinset_t pinset, bool value) -{ - unsigned int pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT; - uintptr_t regaddr; - - if (value) - { - regaddr = BCM_GPIO_GPSET(pin); - } - else - { - regaddr = BCM_GPIO_GPCLR(pin); - } - - putreg32(BCM_GPIO_GPSET_SET(pin), regaddr); -} - -/************************************************************************************ - * Name: bcm_gpio_read - * - * Description: - * Read one or zero from the selected GPIO pin - * - ************************************************************************************/ - -bool bcm_gpio_read(gpio_pinset_t pinset) -{ - unsigned int pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT; - uintptr_t regaddr = BCM_GPIO_GPLEV(pin); - uint32_t mask = BCM_GPIO_GPLEV_LEV(pin); - - return (getreg32(regaddr) & mask) != 0; -} diff --git a/arch/arm/src/bcm2708/bcm_gpio.h b/arch/arm/src/bcm2708/bcm_gpio.h deleted file mode 100644 index 820b37681f..0000000000 --- a/arch/arm/src/bcm2708/bcm_gpio.h +++ /dev/null @@ -1,300 +0,0 @@ -/************************************************************************************ - * arch/arm/src/bcm2708/bcm_gpio.h - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -#ifndef __ARCH_ARM_SRC_BCM2708_BCM_GPIO_H -#define __ARCH_ARM_SRC_BCM2708_BCM_GPIO_H - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include - -#include -#include -#include - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/* Bit-encoded input to bcm_gpio_config() ********************************************/ - -/* 32-bit Encoding: - * - * .... .... .... .MMM PPII IIII V.BB BBBB - */ - -/* Input/Output mode: - * - * .... .... .... .MMM .... .... .... .... - */ - -#define GPIO_MODE_SHIFT (16) /* Bits 16-18: GPIO mode */ -#define GPIO_MODE_MASK (7 << GPIO_MODE_SHIFT) -# define GPIO_INPUT (0 << GPIO_MODE_SHIFT) /* PIO Input */ -# define GPIO_OUTPUT (1 << GPIO_MODE_SHIFT) /* PIO Output */ -# define GPIO_ALT0 (4 << GPIO_MODE_SHIFT) /* Alternate function 0 */ -# define GPIO_ALT1 (5 << GPIO_MODE_SHIFT) /* Alternate function 1 */ -# define GPIO_ALT2 (6 << GPIO_MODE_SHIFT) /* Alternate function 2 */ -# define GPIO_ALT3 (7 << GPIO_MODE_SHIFT) /* Alternate function 3 */ -# define GPIO_ALT4 (3 << GPIO_MODE_SHIFT) /* Alternate function 4 */ -# define GPIO_ALT5 (2 << GPIO_MODE_SHIFT) /* Alternate function 5 */ - -/* These bits set the pull up/down configuration of the pin: - * - * .... .... .... .... PP.. .... .... .... - * - * NOTE: The shifted values match the values of the GPPUD egister. - */ - -#define GPIO_PUD_SHIFT (14) /* Bits 14-16: GPIO configuration bits */ -#define GPIO_PUD_MASK (3 << GPIO_PUD_SHIFT) -# define GPIO_PUD_NONE (0 << GPIO_PUD_SHIFT) /* Default, no pull */ -# define GPIO_PUD_PULLDOWN (1 << GPIO_PUD_SHIFT) /* Enable pull down */ -# define GPIO_PUD_PULLUP (2 << GPIO_PUD_SHIFT) /* Enable pull up */ - -/* Interrupt detection modes: - * - * .... .... .... .... ..II IIII .... .... - */ - -#define GPIO_INT_SHIFT (8) /* Bits 8-13: GPIO interrupt bits */ -#define GPIO_INT_MASK (0x3f << GPIO_INT_SHIFT) -# define GPIO_INT_NONE (0 << GPIO_INT_SHIFT) -# define GPIO_INT_RISING (1 << GPIO_INT_SHIFT) -# define GPIO_INT_FALLING (2 << GPIO_INT_SHIFT) -# define GPIO_INT_BOTHEDGES (GPIO_INT_RISING | GPIO_INT_FALLING) - -# define GPIO_INT_ASYNCHRISING (4 << GPIO_INT_SHIFT) -# define GPIO_INT_ASYNCHFALLING (8 << GPIO_INT_SHIFT) -# define GPIO_INT_ASYNCHBOTH (GPIO_INT_ASYNCHRISING | GPIO_INT_ASYNCHFALLING) - -# define GPIO_INT_HIGHLEVEL (16 << GPIO_INT_SHIFT) -# define GPIO_INT_LOWLEVEL (32 << GPIO_INT_SHIFT) -# define GPIO_INT_LEVELBOTH (GPIO_INT_HIGHLEVEL | GPIO_INT_LOWLEVEL) - -/* If the pin is an GPIO output, then this identifies the initial output value: - * - * .... .... .... .... .... .... V... .... - */ - -#define GPIO_OUTPUT_MASK (1 << 7) /* Bit 7: Initial value of output */ -# define GPIO_OUTPUT_CLEAR (0) -# define GPIO_OUTPUT_SET (1 << 7) - -/* This identifies the GPIO pin: - * - * ..... .... ... .... .... ..BB BBBB - */ - -#define GPIO_PIN_SHIFT (0) /* Bits 0-5: GPIO number: 0-31 */ -#define GPIO_PIN_MASK (63 << GPIO_PIN_SHIFT) -#define GPIO_PIN0 (0 << GPIO_PIN_SHIFT) -#define GPIO_PIN1 (1 << GPIO_PIN_SHIFT) -#define GPIO_PIN2 (2 << GPIO_PIN_SHIFT) -#define GPIO_PIN3 (3 << GPIO_PIN_SHIFT) -#define GPIO_PIN4 (4 << GPIO_PIN_SHIFT) -#define GPIO_PIN5 (5 << GPIO_PIN_SHIFT) -#define GPIO_PIN6 (6 << GPIO_PIN_SHIFT) -#define GPIO_PIN7 (7 << GPIO_PIN_SHIFT) -#define GPIO_PIN8 (8 << GPIO_PIN_SHIFT) -#define GPIO_PIN9 (9 << GPIO_PIN_SHIFT) -#define GPIO_PIN10 (10 << GPIO_PIN_SHIFT) -#define GPIO_PIN11 (11 << GPIO_PIN_SHIFT) -#define GPIO_PIN12 (12 << GPIO_PIN_SHIFT) -#define GPIO_PIN13 (13 << GPIO_PIN_SHIFT) -#define GPIO_PIN14 (14 << GPIO_PIN_SHIFT) -#define GPIO_PIN15 (15 << GPIO_PIN_SHIFT) -#define GPIO_PIN16 (16 << GPIO_PIN_SHIFT) -#define GPIO_PIN17 (17 << GPIO_PIN_SHIFT) -#define GPIO_PIN18 (18 << GPIO_PIN_SHIFT) -#define GPIO_PIN19 (19 << GPIO_PIN_SHIFT) -#define GPIO_PIN20 (20 << GPIO_PIN_SHIFT) -#define GPIO_PIN21 (21 << GPIO_PIN_SHIFT) -#define GPIO_PIN22 (22 << GPIO_PIN_SHIFT) -#define GPIO_PIN23 (23 << GPIO_PIN_SHIFT) -#define GPIO_PIN24 (24 << GPIO_PIN_SHIFT) -#define GPIO_PIN25 (25 << GPIO_PIN_SHIFT) -#define GPIO_PIN26 (26 << GPIO_PIN_SHIFT) -#define GPIO_PIN27 (27 << GPIO_PIN_SHIFT) -#define GPIO_PIN28 (28 << GPIO_PIN_SHIFT) -#define GPIO_PIN29 (29 << GPIO_PIN_SHIFT) -#define GPIO_PIN30 (30 << GPIO_PIN_SHIFT) -#define GPIO_PIN31 (31 << GPIO_PIN_SHIFT) -#define GPIO_PIN32 (32 << GPIO_PIN_SHIFT) -#define GPIO_PIN33 (33 << GPIO_PIN_SHIFT) -#define GPIO_PIN34 (34 << GPIO_PIN_SHIFT) -#define GPIO_PIN35 (35 << GPIO_PIN_SHIFT) -#define GPIO_PIN36 (36 << GPIO_PIN_SHIFT) -#define GPIO_PIN37 (37 << GPIO_PIN_SHIFT) -#define GPIO_PIN38 (38 << GPIO_PIN_SHIFT) -#define GPIO_PIN39 (39 << GPIO_PIN_SHIFT) -#define GPIO_PIN40 (40 << GPIO_PIN_SHIFT) -#define GPIO_PIN41 (41 << GPIO_PIN_SHIFT) -#define GPIO_PIN42 (42 << GPIO_PIN_SHIFT) -#define GPIO_PIN43 (43 << GPIO_PIN_SHIFT) -#define GPIO_PIN44 (44 << GPIO_PIN_SHIFT) -#define GPIO_PIN45 (45 << GPIO_PIN_SHIFT) -#define GPIO_PIN46 (46 << GPIO_PIN_SHIFT) -#define GPIO_PIN47 (47 << GPIO_PIN_SHIFT) -#define GPIO_PIN48 (48 << GPIO_PIN_SHIFT) -#define GPIO_PIN49 (49 << GPIO_PIN_SHIFT) -#define GPIO_PIN50 (50 << GPIO_PIN_SHIFT) -#define GPIO_PIN51 (51 << GPIO_PIN_SHIFT) -#define GPIO_PIN52 (52 << GPIO_PIN_SHIFT) -#define GPIO_PIN53 (53 << GPIO_PIN_SHIFT) - -/************************************************************************************ - * Public Types - ************************************************************************************/ - -#ifndef __ASSEMBLY__ - -/* Must be big enough to hold the 32-bit encoding */ - -typedef uint32_t gpio_pinset_t; - -/************************************************************************************ - * Public Data - ************************************************************************************/ - -#undef EXTERN -#if defined(__cplusplus) -#define EXTERN extern "C" -extern "C" -{ -#else -#define EXTERN extern -#endif - -/************************************************************************************ - * Public Function Prototypes - ************************************************************************************/ - -/************************************************************************************ - * Function: bcm_gpio_initialize - * - * Description: - * Based on configuration within the .config file, it does: - * - Remaps positions of alternative functions for GPIO. - * - * Typically called from bcm_start(). - * - ************************************************************************************/ - -void bcm_gpio_initialize(void); - -/************************************************************************************ - * Name: bcm_gpio_irqinitialize - * - * Description: - * Initialize logic to support a second level of interrupt decoding for GPIO pins. - * - ************************************************************************************/ - -#ifdef CONFIG_BCM2708_GPIO_IRQ -void bcm_gpio_irqinitialize(void); -#else -# define bcm_gpio_irqinitialize() -#endif - -/************************************************************************************ - * Name: bcm_gpio_config - * - * Description: - * Configure a GPIO pin based on bit-encoded description of the pin. - * - ************************************************************************************/ - -int bcm_gpio_config(gpio_pinset_t pinset); - -/************************************************************************************ - * Name: bcm_gpio_write - * - * Description: - * Write one or zero to the selected GPIO pin - * - ************************************************************************************/ - -void bcm_gpio_write(gpio_pinset_t pinset, bool value); - -/************************************************************************************ - * Name: bcm_gpio_read - * - * Description: - * Read one or zero from the selected GPIO pin - * - ************************************************************************************/ - -bool bcm_gpio_read(gpio_pinset_t pinset); - -/**************************************************************************** - * Name: bcm_gpio_irqenable - * - * Description: - * Configure interrupt event detection for the specified GPIO pin. This - * effective enables the pin interrupts. - * - ****************************************************************************/ - -#ifdef CONFIG_BCM2708_GPIO_IRQ -void bcm_gpio_irqenable(gpio_pinset_t pinset); -#else -# define bcm_gpio_irqenable(p) -#endif - -/************************************************************************************ - * Name: bcm_gpio_irqdisable - * - * Description: - * Reset interrupt event detection for the specified GPIO pin. This - * effective disables the pin interrupts. - * - ************************************************************************************/ - -#ifdef CONFIG_BCM2708_GPIO_IRQ -void bcm_gpio_irqdisable(gpio_pinset_t pinset); -#else -# define bcm_gpio_irqdisable(p) -#endif - -#undef EXTERN -#if defined(__cplusplus) -} -#endif - -#endif /* __ASSEMBLY__ */ -#endif /* __ARCH_ARM_SRC_BCM2708_BCM_GPIO_H */ diff --git a/arch/arm/src/bcm2708/bcm_gpioint.c b/arch/arm/src/bcm2708/bcm_gpioint.c deleted file mode 100644 index 3fa038f0ec..0000000000 --- a/arch/arm/src/bcm2708/bcm_gpioint.c +++ /dev/null @@ -1,375 +0,0 @@ -/**************************************************************************** - * arch/arm/src/bcm2708/bcm_gpioint.c - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include "bcm_config.h" -#include "bcm_gpio.h" - -#ifdef CONFIG_BCM2708_GPIO_IRQ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: bcm_gpio_risingedge - * - * Description: - * Set/clear rising edge detection. - * - ****************************************************************************/ - -static void bcm_gpio_risingedge(unsigned int pin, gpio_pinset_t pinset) -{ - uintptr_t regaddr = BCM_GPIO_GPREN(pin); - uint32_t mask = BCM_GPIO_GPREN_REN(pin; - - if ((pinset & GPIO_INT_MASK) == GPIO_INT_RISING) - { - modifiyreg32(regaddr, 0, mask); - } - else - { - modifiyreg32(regaddr, mask, 0); - } -} - -/**************************************************************************** - * Name: bcm_gpio_fallingedge - * - * Description: - * Set/clear falling edge detection. - * - ****************************************************************************/ - -static void bcm_gpio_fallingedge(unsigned int pin, gpio_pinset_t pinset) -{ - uintptr_t regaddr = BCM_GPIO_GPFEN(pin); - uint32_t mask = BCM_GPIO_GPFEN_FEN(pin; - - if ((pinset & GPIO_INT_MASK) == GPIO_INT_FALLING) - { - modifiyreg32(regaddr, 0, mask); - } - else - { - modifiyreg32(regaddr, mask, 0); - } -} - -/**************************************************************************** - * Name: bcm_gpio_highlevel - * - * Description: - * Set/clear high level detection. - * - ****************************************************************************/ - -static void bcm_gpio_highlevel(unsigned int pin, gpio_pinset_t pinset) -{ - uintptr_t regaddr = BCM_GPIO_GPHEN(pin); - uint32_t mask = BCM_GPIO_GPHEN_HEN(pin; - - if ((pinset & GPIO_INT_MASK) == GPIO_INT_HIGHLEVEL) - { - modifiyreg32(regaddr, 0, mask); - } - else - { - modifiyreg32(regaddr, mask, 0); - } -} - -/**************************************************************************** - * Name: bcm_gpio_lowlevel - * - * Description: - * Set/clear low level detection. - * - ****************************************************************************/ - -static void bcm_gpio_lowlevel(unsigned int pin, gpio_pinset_t pinset) -{ - uintptr_t regaddr = BCM_GPIO_GPLEN(pin); - uint32_t mask = BCM_GPIO_GPHEN_HEN(pin; - - if ((pinset & GPIO_INT_MASK) == GPIO_INT_LOWLEVEL) - { - modifiyreg32(regaddr, 0, mask); - } - else - { - modifiyreg32(regaddr, mask, 0); - } -} - -/**************************************************************************** - * Name: bcm_gpio_async_risingedge - * - * Description: - * Set/clear asynchronous rising edge detection. - * - ****************************************************************************/ - -static void bcm_gpio_async_risingedge(unsigned int pin, gpio_pinset_t pinset) -{ - uintptr_t regaddr = BCM_GPIO_GPAREN(pin); - uint32_t mask = BCM_GPIO_GPAREN_AREN(pin; - - if ((pinset & GPIO_INT_MASK) == GPIO_INT_ASYNCHRISING) - { - modifiyreg32(regaddr, 0, mask); - } - else - { - modifiyreg32(regaddr, mask, 0); - } -} - -/**************************************************************************** - * Name: bcm_gpio_async_fallingedge - * - * Description: - * Set/clear asynchronous falling edge detection. - * - ****************************************************************************/ - -static void bcm_gpio_async_fallingedge(unsigned int pin, gpio_pinset_t pinset) -{ - uintptr_t regaddr = BCM_GPIO_GPAFEN(pin); - uint32_t mask = BCM_GPIO_GPAFEN_AFEN(pin; - - if ((pinset & GPIO_INT_MASK) == GPIO_INT_ASYNCHFALLING) - { - modifiyreg32(regaddr, 0, mask); - } - else - { - modifiyreg32(regaddr, mask, 0); - } -} - -/**************************************************************************** - * Name: bcm_gpio_async_fallingedge - * - * Description: - * Set/clear falling edge detection. - * - ****************************************************************************/ - -static void bcm_gpio_async_fallingedge(unsigned int pin, gpio_pinset_t pinset) -{ - uintptr_t regaddr = BCM_GPIO_GPAFEN(pin); - uint32_t mask = BCM_GPIO_GPAFEN_AFEN(pin; - - if ((pinset & GPIO_INT_MASK) == GPIO_INT_ASYNCHFALLING) - { - modifiyreg32(regaddr, 0, mask); - } - else - { - modifiyreg32(regaddr, mask, 0); - } -} - -/**************************************************************************** - * Name: bcm_gpio0_interrupt - * - * Description: - * GPIO0 interrupt handler - * - ****************************************************************************/ - -int bcm_gpio0_interrupt(int irq, FAR void *context, FAR void *arg) -{ - uint32_t eds; - uint32_t mask; - int i; - - /* Clear all pending interrpts */ - - eds = getreg32(BCM_GPIO_GPEDS0); - putreg32(eds, BCM_GPIO_GPEDS0); - - /* Then process each pending GPIO interrupt */ - - for (i = 0; i < 32 && eds != NULL; i++) - { - mask = (uint32_t)1 << i; - if ((eds & mask) != 0) - { - /* Remove the pending interrupt bit from the mask */ - - eds &= ~mask; - - /* And disptach the GPIO interrupt to the register handler */ - - irq_dispatch(BCM_IRQ_GPIO0_FIRST + i, context); - } - } - - return OK; -} - -/**************************************************************************** - * Name: bcm_gpio1_interrupt - * - * Description: - * GPIO1 interrupt handler - * - ****************************************************************************/ - -int bcm_gpio1_interrupt(int irq, FAR void *context, FAR void *arg) -{ - uint32_t eds; - uint32_t mask; - int i; - - /* Clear all pending interrpts */ - - eds = getreg32(BCM_GPIO_GPEDS1); - putreg32(eds, BCM_GPIO_GPEDS1); - - /* Then process each pending GPIO interrupt */ - - for (i = 0; i < 32 && eds != NULL; i++) - { - mask = (uint32_t)1 << i; - if ((eds & mask) != 0) - { - /* Remove the pending interrupt bit from the mask */ - - eds &= ~mask; - - /* And disptach the GPIO interrupt to the register handler */ - - irq_dispatch(BCM_IRQ_GPIO1_FIRST + i, context); - } - } - - return OK; -} - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: bcm_gpio_irqinitialize - * - * Description: - * Initialize logic to support a second level of interrupt decoding for - * GPIO pins. - * - ****************************************************************************/ - -void bcm_gpio_irqinitialize(void) -{ - /* Disabled all event detections */ - - putreg32(0, BCM_GPIO_GPREN0); - putreg32(0, BCM_GPIO_GPREN1); - putreg32(0, BCM_GPIO_GPFEN0); - putreg32(0, BCM_GPIO_GPFEN1); - putreg32(0, BCM_GPIO_GPHEN0); - putreg32(0, BCM_GPIO_GPHEN1); - putreg32(0, BCM_GPIO_GPLEN0); - putreg32(0, BCM_GPIO_GPLEN1); - putreg32(0, BCM_GPIO_GPAREN0); - putreg32(0, BCM_GPIO_GPAREN1); - putreg32(0, BCM_GPIO_GPAFEN0); - putreg32(0, BCM_GPIO_GPAFEN1); - - /* Attach and enable the GPIO interrupt handlers */ - - (void) irq_attach(BCM_IRQ_GPIO0, bcm_gpio0_interrupt); - (void) irq_attach(BCM_IRQ_GPIO1, bcm_gpio1_interrupt); - - up_enable_irq(BCM_IRQ_GPIO0); - up_enable_irq(BCM_IRQ_GPIO1); -} - -/**************************************************************************** - * Name: bcm_gpio_irqenable - * - * Description: - * Configure interrupt event detection for the specified GPIO pin. This - * effective enables the pin interrupts. - * - ****************************************************************************/ - -void bcm_gpio_irqenable(gpio_pinset_t pinset) -{ - unsigned int pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT; - - /* Configure pin detection settings */ - - bcm_gpio_risingedge(pin, pinset); - bcm_gpio_fallingedge(pin, pinset); - bcm_gpio_highlevel(pin, pinset); - bcm_gpio_lowlevel(pin, pinset); - bcm_gpio_async_risingedge(pin, pinset); - bcm_gpio_async_fallingedge(pin, pinset); -} - -/************************************************************************************ - * Name: bcm_gpio_irqdisable - * - * Description: - * Reset interrupt event detection for the specified GPIO pin. This - * effective disables the pin interrupts. - * - ************************************************************************************/ - -void bcm_gpio_irqdisable(gpio_pinset_t pinset); -{ - unsigned int pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT; - - /* Reset pin detection settings */ - - bcm_gpio_risingedge(pin, 0); - bcm_gpio_fallingedge(pin, 0); - bcm_gpio_highlevel(pin, 0); - bcm_gpio_lowlevel(pin, 0); - bcm_gpio_async_risingedge(pin, 0); - bcm_gpio_async_fallingedge(pin, 0); -} - -#endif /* CONFIG_BCM2708_GPIO_IRQ */ diff --git a/arch/arm/src/bcm2708/bcm_irq.c b/arch/arm/src/bcm2708/bcm_irq.c deleted file mode 100644 index 00a9c49c8e..0000000000 --- a/arch/arm/src/bcm2708/bcm_irq.c +++ /dev/null @@ -1,325 +0,0 @@ -/**************************************************************************** - * arch/arm/src/bcm/bcm_irq.c - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include -#include -#include -#include - -#include -#include - -#include "arm.h" -#include "up_arch.h" -#include "up_internal.h" -#include "group/group.h" - -#include "bcm_aux.h" -#include "bcm_gpio.h" -#include "chip/bcm2708_irq.h" - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/* g_current_regs[] holds a references to the current interrupt level - * register storage structure. If is non-NULL only during interrupt - * processing. Access to g_current_regs[] must be through the macro - * CURRENT_REGS for portability. - */ - -volatile uint32_t *g_current_regs[1]; - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: up_irqinitialize - * - * Description: - * This function is called by up_initialize() during the bring-up of the - * system. It is the responsibility of this function to but the interrupt - * subsystem into the working and ready state. - * - ****************************************************************************/ - -void up_irqinitialize(void) -{ - /* Disable all interrupts */ - - putreg32(IRQ_DBR_ALLINTS, BCM_IRQ_DBR); - putreg32(IRQ_DIR1_ALLINTS, BCM_IRQ_DIR1); - putreg32(IRQ_DIR2_ALLINTS, BCM_IRQ_DIR2); - - /* currents_regs is non-NULL only while processing an interrupt */ - - CURRENT_REGS = NULL; - - /* Intitialize AUX interrupts */ - - bcm_aux_irqinitialize(); - -#ifdef CONFIG_BCM2708_GPIO_IRQ - /* Initialize GPIO interrrupts */ - - bcm_gpio_irqinitialize(); -#endif - -#ifndef CONFIG_SUPPRESS_INTERRUPTS - /* And finally, enable interrupts */ - - up_irq_restore(SVC_MODE | PSR_F_BIT); -#endif -} - -/**************************************************************************** - * Name: up_decodeirq - * - * Description: - * This function is called from the IRQ vector handler in arm_vectors.S. - * At this point, the interrupt has been taken and the registers have - * been saved on the stack. This function simply needs to determine the - * the irq number of the interrupt and then to call irq_dispatch to - * dispatch the interrupt. - * - * Input parameters: - * regs - A pointer to the register save area on the stack. - * - ****************************************************************************/ - -void up_decodeirq(uint32_t *regs) -{ - uint32_t bpr; - uint32_t ipr; - uint32_t mask; - int bitno; - int irq; - - /* Current regs non-zero indicates that we are processing an interrupt; - * CURRENT_REGS is also used to manage interrupt level context switches. - * - * Nested interrupts are not supported. - */ - - DEBUGASSERT(CURRENT_REGS == NULL); - CURRENT_REGS = regs; - - /* Read the basic pending register first */ - - bpr = getreg32(BCM_IRQ_BPR); - - /* Handle any pending interrupts in the BPR register first */ - - for (bitno = BPR_BIT_FIRST; - (bpr & BPR_BIT_IRQMASK) != 0 && bitno <= BPR_BIT_LAST; - bitno++) - { - mask = 1 << bitno; - if ((bpr & mask) != 0) - { - /* Clear the bit in the BPR in hope that we may be - * able to terminate the loop early. - */ - - bpr &= ~mask; - - /* Dispatch the interrupt */ - - irq = bitno + IPR1_IRQ_FIRST - IPR1_BIT_FIRST; - irq_dispatch(irq, regs); - } - } - - /* Check for pending interrupts in IPR1 */ - - if ((bpr & BCM_IRQ_PENDING1) != 0) - { - /* Read the pending 1 register */ - - ipr = getreg32(BCM_IRQ_IPR1); - - /* Handle any pending interrupts in the IPR1 register first */ - - for (bitno = IPR1_BIT_FIRST; - (ipr & IPR1_BIT_IRQMASK) != 0 && bitno <= IPR1_BIT_LAST; - bitno++) - { - mask = 1 << bitno; - if ((ipr & mask) != 0) - { - /* Clear the bit in the IPR1 in hope that we may be - * able to terminate the loop early. - */ - - ipr &= ~mask; - - /* Dispatch the interrupt */ - - irq = bitno + IPR1_IRQ_FIRST - IPR1_BIT_FIRST; - irq_dispatch(irq, regs); - } - } - } - - /* Check for pending interrupts in IPR2 */ - - if ((bpr & BCM_IRQ_PENDING2) != 0) - { - /* Read the pending 2 register */ - - ipr = getreg32(BCM_IRQ_IPR2); - - /* Handle any pending interrupts in the IPR2 register first */ - - for (bitno = IPR2_BIT_FIRST; - (ipr & IPR2_BIT_IRQMASK) != 0 && bitno <= IPR2_BIT_LAST; - bitno++) - { - mask = 1 << bitno; - if ((ipr & mask) != 0) - { - /* Clear the bit in the IPR2 in hope that we may be - * able to terminate the loop early. - */ - - ipr &= ~mask; - - /* Dispatch the interrupt */ - - irq = bitno + IPR2_IRQ_FIRST - IPR2_BIT_FIRST; - irq_dispatch(irq, regs); - } - } - } - -#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) - /* Check for a context switch. If a context switch occurred, then - * CURRENT_REGS will have a different value than it did on entry. If an - * interrupt level context switch has occurred, then restore the - * floating point state and the establish the correct address environment - * before returning from the interrupt. - */ - - if (regs != CURRENT_REGS) - { -#ifdef CONFIG_ARCH_FPU - /* Restore floating point registers */ - - up_restorefpu((uint32_t *)CURRENT_REGS); -#endif - -#ifdef CONFIG_ARCH_ADDRENV - /* Make sure that the address environment for the previously running - * task is closed down gracefully (data caches dump, MMU flushed) and - * set up the address environment for the new thread at the head of - * the ready-to-run list. - */ - - (void)group_addrenv(NULL); -#endif - } -#endif - - /* Set CURRENT_REGS to NULL to indicate that we are no longer in an - * interrupt handler. - */ - - CURRENT_REGS = NULL; -} - -/**************************************************************************** - * Name: up_disable_irq - * - * Description: - * Disable the IRQ specified by 'irq' - * - ****************************************************************************/ - -void up_disable_irq(int irq) -{ - unsigned int bitno; - - if (irq <= BPR_IRQ_LAST) - { - bitno = irq - BPR_IRQ_FIRST + BPR_BIT_FIRST; - putreg32(BCM_IRQ_DBR, (uint32_t)1 << bitno); - } - else if (irq <= IPR1_IRQ_LAST) - { - bitno = irq - IPR1_IRQ_FIRST + IPR1_BIT_FIRST; - putreg32(BCM_IRQ_DIR1, (uint32_t)1 << bitno); - } - else if (irq <= IPR2_IRQ_LAST) - { - bitno = irq - IPR2_IRQ_FIRST + IPR2_BIT_FIRST; - putreg32(BCM_IRQ_DIR2, (uint32_t)1 << bitno); - } -} - -/**************************************************************************** - * Name: up_enable_irq - * - * Description: - * Enable the IRQ specified by 'irq' - * - ****************************************************************************/ - -void up_enable_irq(int irq) -{ - unsigned int bitno; - - if (irq <= BPR_IRQ_LAST) - { - bitno = irq - BPR_IRQ_FIRST + BPR_BIT_FIRST; - putreg32(BCM_IRQ_EBR, (uint32_t)1 << bitno); - } - else if (irq <= IPR1_IRQ_LAST) - { - bitno = irq - IPR1_IRQ_FIRST + IPR1_BIT_FIRST; - putreg32(BCM_IRQ_EIR1, (uint32_t)1 << bitno); - } - else if (irq <= IPR2_IRQ_LAST) - { - bitno = irq - IPR2_IRQ_FIRST + IPR2_BIT_FIRST; - putreg32(BCM_IRQ_EIR2, (uint32_t)1 << bitno); - } -} diff --git a/arch/arm/src/bcm2708/bcm_lowputc.c b/arch/arm/src/bcm2708/bcm_lowputc.c deleted file mode 100644 index 5ae8663729..0000000000 --- a/arch/arm/src/bcm2708/bcm_lowputc.c +++ /dev/null @@ -1,252 +0,0 @@ -/**************************************************************************** - * arch/arm/src/bcm2708/bcm_lowputc.c - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include -#include -#include - -#include "up_arch.h" - -#include "chip/bcm2708_aux.h" -#include "bcm_config.h" -#include "bcm_aux.h" -#include "bcm_lowputc.h" - -#include "up_internal.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ -/* Configuration ************************************************************/ - -#ifdef BCM_HAVE_UART_CONSOLE -# if defined(CONFIG_BCM2708_MINI_UART_SERIAL_CONSOLE) -# define BCM_CONSOLE_BAUD CONFIG_BCM2708_MINI_UART_BAUD -# define BCM_CONSOLE_BITS CONFIG_BCM2708_MINI_UART_BITS -# define BCM_CONSOLE_PARITY CONFIG_BCM2708_MINI_UART_PARITY -# define BCM_CONSOLE_2STOP CONFIG_BCM2708_MINI_UART_2STOP -# elif defined(CONFIG_BCM2708_PL011_UART_SERIAL_CONSOLE) -# define BCM_CONSOLE_BAUD CONFIG_BCM2708_PL011_UART_BAUD -# define BCM_CONSOLE_BITS CONFIG_BCM2708_PL011_UART_BITS -# define BCM_CONSOLE_PARITY CONFIG_BCM2708_PL011_UART_PARITY -# define BCM_CONSOLE_2STOP CONFIG_BCM2708_PL011_UART_2STOP -# endif -#endif - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -#ifdef BCM_HAVE_UART_CONSOLE -static const struct uart_config_s g_console_config = -{ - .baud = BCM_CONSOLE_BAUD, /* Configured baud */ - .parity = BCM_CONSOLE_PARITY, /* 0=none, 1=odd, 2=even */ - .bits = BCM_CONSOLE_BITS, /* Number of bits (5-9) */ - .stopbits2 = BCM_CONSOLE_2STOP, /* true: Configure with 2 stop bits instead of 1 */ -#ifdef CONFIG_SERIAL_IFLOWCONTROL - .iflow = false; /* true: Input flow control enabled */ -#endif -#ifdef CONFIG_SERIAL_OFLOWCONTROL - .oflow = false; /* true: Output flow control enabled. */ -#endif -}; -#endif - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: bcm_lowsetup - * - * Description: - * Called at the very beginning of _start. Performs low level - * initialization including setup of the console UART. This UART done - * early so that the serial console is available for debugging very early - * in the boot sequence. - * - ****************************************************************************/ - -void bcm_lowsetup(void) -{ -#ifndef CONFIG_SUPPRESS_UART_CONFIG -#ifdef CONFIG_BCM2708_MINI_UART - /* Disable and configure the Mini-UART */ -# warning Missing logic - - /* Configure Mini-pins: RXD and TXD. Also configure RTS and CTS if flow - * control is enabled. - */ -# warning Missing logic -#endif - -#ifdef CONFIG_BCM2708_PL011_UART - /* Disable and configure the PL011 UART */ -# warning Missing logic - - /* Configure PL001 pins: RXD and TXD. Also configure RTS and CTS if flow - * control is enabled. - */ -# warning Missing logic -#endif - -#if defined(CONFIG_BCM2708_MINI_UART_SERIAL_CONSOLE) - /* Configure the mini-uart serial console for initial, non-interrupt - * driven mode. - */ - - (void)bcm_miniuart_configure(&g_console_config); -#elif defined(CONFIG_BCM2708_PL011_UART_SERIAL_CONSOLE) - /* Configure the pl011-uart serial console for initial, non-interrupt - * driven mode. - */ - - (void)bcm_pl011uart_configure(&g_console_config); -#endif -#endif /* CONFIG_SUPPRESS_UART_CONFIG */ -} - -/**************************************************************************** - * Name: bcm_[mini|pl011]uart_configure - * - * Description: - * Configure the Mini- or PL011 UART for non-interrupt driven operation - * - ****************************************************************************/ - -#ifdef CONFIG_BCM2708_MINI_UART -int bcm_miniuart_configure(FAR const struct uart_config_s *config) -{ - DEBUGASSERT(config != NULL); - - /* Enable the Mini-UART */ - - bcm_aux_enable(BCM_AUX_MINI_UART, NULL); - -#ifndef CONFIG_SUPPRESS_UART_CONFIG - /* Set up BAUD Divisor */ -#warning Missing logic - - /* Setup parity -- Mini-UART does not support parity. */ - - if (config->parity != 0) - { - return -EINVAL; - } - - /* Setup number of bits */ - - if (config->bits == 7) - { - putreg8(0, BCM_AUX_MU_LCR); - } - else if (config->bits == 8) - { - putreg8(BCM_AUX_MU_LCR_DATA8BIT, BCM_AUX_MU_LCR); - } - else - { - return -EINVAL; - } - - /* Configure Stop bits: Only 1 STOP bit supported */ - - if (config->stopbits2) - { - return -EINVAL; - } - - /* Configure flow control */ -#warning Missing logic -#endif - - /* Configure FIFOS: Always enabled */ - - /* Enable receiver and tranmsmitter */ - - putreg8(BCM_AUX_MU_CNTL_RXEN | BCM_AUX_MU_CNTL_TXEN, BCM_AUX_MU_CNTL); - return OK; -} -#endif - -#ifdef CONFIG_BCM2708_PL011_UART -int bcm_pl011uart_configure(FAR const struct uart_config_s *config) -{ - DEBUGASSERT(config != NULL); - -#ifndef CONFIG_SUPPRESS_UART_CONFIG - /* Set up BAUD Divisor */ -#warning Missing logic - - /* Setup parity */ - - /* Setup number of bits */ - - /* Configure Stop bits */ - - /* Configure flow control */ -#endif - - /* Configure FIFOS */ - - /* Enable receiver and tranmsmitter */ - - return OK; -} -#endif - -/**************************************************************************** - * Name: bcm_lowputc - * - * Description: - * Output a byte with as few system dependencies as possible. This will - * even work BEFORE the console is initialized if we are booting from - * U-Boot (and the same UART is used for the console, of course.) - * - ****************************************************************************/ - -#if defined(BCM_HAVE_UART) && defined(CONFIG_DEBUG_FEATURES) -void bcm_lowputc(int ch) -{ -#warning Missing logic -} -#endif diff --git a/arch/arm/src/bcm2708/bcm_lowputc.h b/arch/arm/src/bcm2708/bcm_lowputc.h deleted file mode 100644 index d419bc1680..0000000000 --- a/arch/arm/src/bcm2708/bcm_lowputc.h +++ /dev/null @@ -1,122 +0,0 @@ -/**************************************************************************** - * arch/arm/src/bcm2780/bcm_lowputc.h - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -#ifndef __ARCH_ARM_SRC_BCM2708_BCM_LOWPUTC_H -#define __ARCH_ARM_SRC_BCM2708_BCM_LOWPUTC_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include -#include - -#include -#include -#include - -#include "up_internal.h" -#include "chip.h" - -/**************************************************************************** - * Public Types - ****************************************************************************/ - -/* This structure describes the configuration of an UART */ - -struct uart_config_s -{ - uint32_t baud; /* Configured baud */ - uint8_t parity; /* 0=none, 1=odd, 2=even */ - uint8_t bits; /* Number of bits (5-9) */ - bool stopbits2; /* true: Configure with 2 stop bits instead of 1 */ -#ifdef CONFIG_SERIAL_IFLOWCONTROL - bool iflow; /* true: Input flow control enabled */ -#endif -#ifdef CONFIG_SERIAL_OFLOWCONTROL - bool oflow; /* true: Output flow control enabled. */ -#endif -}; - -/**************************************************************************** - * Public Function Prototypes - ****************************************************************************/ - -/**************************************************************************** - * Name: bcm_lowsetup - * - * Description: - * Called at the very beginning of _start. Performs low level - * initialization including setup of the console UART. This UART done - * early so that the serial console is available for debugging very early - * in the boot sequence. - * - ****************************************************************************/ - -void bcm_lowsetup(void); - -/**************************************************************************** - * Name: bcm_[mini|pl011]uart_configure - * - * Description: - * Configure the Mini- or PL011 UART for non-interrupt driven operation - * - ****************************************************************************/ - -#ifdef CONFIG_BCM2708_MINI_UART -int bcm_miniuart_configure(FAR const struct uart_config_s *config); -#endif - -#ifdef CONFIG_BCM2708_PL011_UART -int bcm_pl011uart_configure(FAR const struct uart_config_s *config); -#endif - -/************************************************************************************ - * Name: bcm_lowputc - * - * Description: - * Output a byte with as few system dependencies as possible. This will even work - * BEFORE the console is initialized if we are booting from U-Boot (and the same - * UART is used for the console, of course.) - * - ************************************************************************************/ - -#if defined(BCM_HAVE_UART) && defined(CONFIG_DEBUG_FEATURES) -void bcm_lowputc(int ch); -#else -# define bcm_lowputc(ch) -#endif - -#endif /* __ARCH_ARM_SRC_BCM2708_BCM_LOWPUTC_H */ diff --git a/arch/arm/src/bcm2708/bcm_memorymap.c b/arch/arm/src/bcm2708/bcm_memorymap.c deleted file mode 100644 index 92d31493d6..0000000000 --- a/arch/arm/src/bcm2708/bcm_memorymap.c +++ /dev/null @@ -1,74 +0,0 @@ -/**************************************************************************** - * arch/arm/src/bcm2708/bcm_memorymap.c - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Author: Alan Carvalho de Assis - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include "chip/bcm_memorymap.h" -#include "bcm_memorymap.h" - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/* This table describes how to map a set of 1Mb pages to space the physical - * address space of the BCM2708/BCM2835. - */ - -const struct section_mapping_s g_section_mapping[] = -{ - /* BCM2708 Address Sections Memories */ - - { BCM_SDRAM_PSECTION, BCM_SDRAM_VSECTION, /* SDRAM */ - BCM_SDRAM_MMUFLAGS, BCM_SDRAM_NSECTIONS - }, - { BCM_VCSDRAM_PSECTION, BCM_VCSDRAM_PSECTION, /* VideoCore SDRAM */ - BCM_VCRAM_MMUFLAGS, BCM_VCSDRAM_NSECTIONS - }, - { BCM_PERIPH_PSECTION, BCM_PERIPH_PSECTION, /* Peripherals */ - BCM_PERIPH_MMUFLAGS, BCM_PERIPH_NSECTIONS - }, -}; - -/* The number of entries in the mapping table */ - -#define NMAPPINGS \ - (sizeof(g_section_mapping) / sizeof(struct section_mapping_s)) - -const size_t g_num_mappings = NMAPPINGS; diff --git a/arch/arm/src/bcm2708/bcm_memorymap.h b/arch/arm/src/bcm2708/bcm_memorymap.h deleted file mode 100644 index 8f42afba5e..0000000000 --- a/arch/arm/src/bcm2708/bcm_memorymap.h +++ /dev/null @@ -1,76 +0,0 @@ -/**************************************************************************** - * arch/arm/src/bcm2708/bcm_memorymap.h - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -#ifndef __ARCH_ARM_SRC_BCM2708_BCM_MEMORYMAP_H -#define __ARCH_ARM_SRC_BCM2708_BCM_MEMORYMAP_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include -#include - -#include - -#include "chip/bcm2708_memorymap.h" -#include "arm.h" - -/**************************************************************************** - * Public Types - ****************************************************************************/ - -struct section_mapping_s -{ - uint32_t physbase; /* Physical address of the region to be mapped */ - uint32_t virtbase; /* Virtual address of the region to be mapped */ - uint32_t mmuflags; /* MMU settings for the region (e.g., cache-able) */ - uint32_t nsections; /* Number of mappings in the region */ -}; - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/* This table describes how to map a set of 1Mb pages to space the physical - * address space of the BCM2708. - */ - -extern const struct section_mapping_s g_section_mapping[]; -extern const size_t g_num_mappings; - -#endif /* __ARCH_ARM_SRC_BCM2708_BCM_MEMORYMAP_H */ diff --git a/arch/arm/src/bcm2708/bcm_miniuart.c b/arch/arm/src/bcm2708/bcm_miniuart.c deleted file mode 100644 index 0f5075b334..0000000000 --- a/arch/arm/src/bcm2708/bcm_miniuart.c +++ /dev/null @@ -1,914 +0,0 @@ -/**************************************************************************** - * arch/arm/src/bcm2708/bcm_miniuart.c - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#ifdef CONFIG_SERIAL_TERMIOS -# include -#endif - -#include -#include - -#include "up_arch.h" -#include "up_internal.h" - -#include "chip/bcm2708_aux.h" -#include "bcm_lowputc.h" -#include "bcm_aux.h" - -#ifdef CONFIG_BCM2708_MINI_UART - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/* If we are not using the serial driver for the console, then we still must - * provide some minimal implementation of up_putc. - */ - -#ifdef USE_SERIALDRIVER - -/**************************************************************************** - * Private Types - ****************************************************************************/ - -struct bcm_dev_s -{ - uint32_t baud; /* Configured baud */ - uint8_t parity; /* 0=none, 1=odd, 2=even */ - uint8_t bits; /* Number of bits (8 or 9) */ - uint8_t stop2; /* Use 2 stop bits */ - uint8_t ier; /* Interrupt enable register shadow */ -#ifdef CONFIG_SERIAL_IFLOWCONTROL - bool iflow; /* input flow control (RTS) enabled */ -#endif -#ifdef CONFIG_SERIAL_OFLOWCONTROL - bool oflow; /* output flow control (CTS) enabled */ -#endif -#ifdef CONFIG_SERIAL_IFLOWCONTROL - gpio_pinset_t rts_gpio; /* UART RTS GPIO pin configuration */ -#endif -#ifdef CONFIG_SERIAL_OFLOWCONTROL - gpio_pinset_t cts_gpio; /* UART CTS GPIO pin configuration */ -#endif -}; - -/**************************************************************************** - * Private Function Prototypes - ****************************************************************************/ - -static int bcm_setup(struct uart_dev_s *dev); -static void bcm_shutdown(struct uart_dev_s *dev); -static int bcm_attach(struct uart_dev_s *dev); -static void bcm_detach(struct uart_dev_s *dev); -static int bcm_ioctl(struct file *filep, int cmd, unsigned long arg); -static int bcm_receive(struct uart_dev_s *dev, uint32_t *status); -static void bcm_rxint(struct uart_dev_s *dev, bool enable); -static bool bcm_rxavailable(struct uart_dev_s *dev); -#ifdef CONFIG_SERIAL_IFLOWCONTROL -static bool bcm_rxflowcontrol(struct uart_dev_s *dev, unsigned int nbuffered, - bool upper); -#endif -static void bcm_send(struct uart_dev_s *dev, int ch); -static void bcm_txint(struct uart_dev_s *dev, bool enable); -static bool bcm_txready(struct uart_dev_s *dev); -static bool bcm_txempty(struct uart_dev_s *dev); - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -static const struct uart_ops_s g_miniuart_ops = -{ - .setup = bcm_setup, - .shutdown = bcm_shutdown, - .attach = bcm_attach, - .detach = bcm_detach, - .ioctl = bcm_ioctl, - .receive = bcm_receive, - .rxint = bcm_rxint, - .rxavailable = bcm_rxavailable, -#ifdef CONFIG_SERIAL_IFLOWCONTROL - .rxflowcontrol = bcm_rxflowcontrol, -#endif - .send = bcm_send, - .txint = bcm_txint, - .txready = bcm_txready, - .txempty = bcm_txempty, -}; - -/* I/O buffers */ - -static char g_miniuart_rxbuffer[CONFIG_BCM2708_MINI_UART_RXBUFSIZE]; -static char g_miniuart_txbuffer[CONFIG_BCM2708_MINI_UART_TXBUFSIZE]; - -/* This describes the state of the Kinetis Mini-UART0 port. */ - -static struct bcm_dev_s g_miniuart_priv = -{ - .baud = CONFIG_BCM2708_MINI_UART_BAUD, - .parity = CONFIG_BCM2708_MINI_UART_BITS, - .bits = CONFIG_BCM2708_MINI_UART_PARITY, - .stop2 = CONFIG_BCM2708_MINI_UART_2STOP, -#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(BCM2708_MINI_UART_OFLOWCONTROL) - .oflow = true, - .cts_gpio = xxxx, -#endif -#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(BCM2708_MINI_UART_IFLOWCONTROL) - .iflow = true, - .rts_gpio = xxxx, -#endif -}; - -static uart_dev_t g_miniuart_port = -{ - .recv = - { - .size = CONFIG_BCM2708_MINI_UART_RXBUFSIZE, - .buffer = g_miniuart_rxbuffer, - }, - .xmit = - { - .size = CONFIG_BCM2708_MINI_UART_TXBUFSIZE, - .buffer = g_miniuart_txbuffer, - }, - .ops = &g_miniuart_ops, - .priv = &g_miniuart_priv, -}; - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: bcm_setuartint - ****************************************************************************/ - -static void bcm_setuartint(struct bcm_dev_s *priv) -{ - modifyreg8(BCM_AUX_MU_IER, BCM_AUX_MU_IO_TXD | BCM_AUX_MU_IO_RXD, priv->ier); -} - -/**************************************************************************** - * Name: bcm_restoreuartint - ****************************************************************************/ - -static void bcm_restoreuartint(struct bcm_dev_s *priv, uint8_t ier) -{ - irqstate_t flags; - - /* Re-enable/re-disable interrupts corresponding to the state of bits in ie */ - - flags = enter_critical_section(); - priv->ier = ier & (BCM_AUX_MU_IO_TXD | BCM_AUX_MU_IO_RXD); - bcm_setuartint(priv); - leave_critical_section(flags); -} - -/**************************************************************************** - * Name: bcm_disableuartint - ****************************************************************************/ - -static void bcm_disableuartint(struct bcm_dev_s *priv, uint8_t *ier) -{ - irqstate_t flags; - - flags = enter_critical_section(); - if (ier != NULL) - { - *ier = priv->ier; - } - - bcm_restoreuartint(priv, 0); - leave_critical_section(flags); -} - -/**************************************************************************** - * Name: bcm_setup - * - * Description: - * Configure the Mini-UART baud, bits, parity, etc. This method is called the - * first time that the serial port is opened. - * - ****************************************************************************/ - -static int bcm_setup(struct uart_dev_s *dev) -{ -#ifndef CONFIG_SUPPRESS_UART_CONFIG - struct bcm_dev_s *priv = (struct bcm_dev_s *)dev->priv; - struct uart_config_s config; -#endif - - /* Enable Mini-UART register access */ - - bcm_aux_disable(BCM_AUX_MINI_UART); - - /* Make sure that all interrupts are disabled */ - - bcm_restoreuartint(priv, 0); - -#ifndef CONFIG_SUPPRESS_UART_CONFIG - /* Configure the Mini-UART */ - - config.baud = priv->baud; - config.parity = priv->parity; - config.bits = priv->bits; - config.stopbits2 = priv->stop2; -#ifdef CONFIG_SERIAL_IFLOWCONTROL - config.iflow = priv->iflow; -#endif -#ifdef CONFIG_SERIAL_OFLOWCONTROL - config.oflow = priv->oflow; -#endif - - bcm_miniuart_configure(&config); -#endif - - return OK; -} - -/**************************************************************************** - * Name: bcm_shutdown - * - * Description: - * Disable the Mini-UART. This method is called when the serial - * port is closed - * - ****************************************************************************/ - -static void bcm_shutdown(struct uart_dev_s *dev) -{ - struct bcm_dev_s *priv = (struct bcm_dev_s *)dev->priv; - - /* Disable interrupts */ - - bcm_restoreuartint(priv, 0); - - /* Disable receiver and tranmsmitter */ - - putreg8(0, BCM_AUX_MU_CNTL); - - /* Disable the Mini-UART */ - - bcm_aux_disable(BCM_AUX_MINI_UART); -} - -/**************************************************************************** - * Name: bcm_attach - * - * Description: - * Configure the Mini-UART to operation in interrupt driven mode. This - * method is called when the serial port is opened. Normally, this is - * just after the setup() method is called, however, the serial - * console may operate in a non-interrupt driven mode during the boot phase. - * - * RX and TX interrupts are not enabled when by the attach method (unless - * the hardware supports multiple levels of interrupt enabling). The RX - * and TX interrupts are not enabled until the txint() and rxint() methods - * are called. - * - ****************************************************************************/ - -static int bcm_attach(struct uart_dev_s *dev) -{ - /* Nothing to do here... this is all handled in bcm_aux.c */ - - return OK; -} - -/**************************************************************************** - * Name: bcm_detach - * - * Description: - * Detach Mini-UART interrupts. This method is called when the serial port - * is closed normally just before the shutdown method is called. The - * exception is the serial console which is never shutdown. - * - ****************************************************************************/ - -static void bcm_detach(struct uart_dev_s *dev) -{ - struct bcm_dev_s *priv = (struct bcm_dev_s *)dev->priv; - - /* There is not much to do here. Interrupt related logic is handled in - * handled in bcm_aux.c. - */ - - /* Disable Mini-UART interrupts */ - - bcm_restoreuartint(priv, 0); -} - -/**************************************************************************** - * Name: bcm_ioctl - * - * Description: - * All ioctl calls will be routed through this method - * - ****************************************************************************/ - -static int bcm_ioctl(struct file *filep, int cmd, unsigned long arg) -{ -#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_SERIAL_TIOCSERGSTRUCT) || \ - defined(CONFIG_KINETIS_SERIALBRK_BSDCOMPAT) - struct inode *inode; - struct uart_dev_s *dev; - uint8_t regval; -#endif -#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_KINETIS_SERIALBRK_BSDCOMPAT) - struct bcm_dev_s *priv; - bool iflow = false; - bool oflow = false; -#endif - int ret = OK; - -#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_SERIAL_TIOCSERGSTRUCT) || \ - defined(CONFIG_KINETIS_SERIALBRK_BSDCOMPAT) - DEBUGASSERT(filep != NULL && filep->f_inode != NULL); - inode = filep->f_inode; - dev = inode->i_private; - DEBUGASSERT(dev != NULL && dev->priv != NULL); -#endif - -#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_KINETIS_SERIALBRK_BSDCOMPAT) - priv = (struct bcm_dev_s *)dev->priv; -#endif - - switch (cmd) - { -#ifdef CONFIG_SERIAL_TIOCSERGSTRUCT - case TIOCSERGSTRUCT: - { - struct bcm_dev_s *user = (struct bcm_dev_s *)arg; - if (!user) - { - ret = -EINVAL; - } - else - { - memcpy(user, dev, sizeof(struct bcm_dev_s)); - } - } - break; -#endif - -#ifdef CONFIG_SERIAL_TERMIOS - case TCGETS: - { - struct termios *termiosp = (struct termios *)arg; - - if (!termiosp) - { - ret = -EINVAL; - break; - } - - cfsetispeed(termiosp, priv->baud); - - /* Note: CSIZE only supports 5-8 bits. The driver only support 8/9 bit - * modes and therefore is no way to report 9-bit mode, we always claim - * 8 bit mode. - */ - - termiosp->c_cflag = - ((priv->parity != 0) ? PARENB : 0) | - ((priv->parity == 1) ? PARODD : 0) | - ((priv->stop2) ? CSTOPB : 0) | -# ifdef CONFIG_SERIAL_OFLOWCONTROL - ((priv->oflow) ? CCTS_OFLOW : 0) | -# endif -# ifdef CONFIG_SERIAL_IFLOWCONTROL - ((priv->iflow) ? CRTS_IFLOW : 0) | -# endif - CS8; - - /* TODO: CCTS_IFLOW, CCTS_OFLOW */ - } - break; - - case TCSETS: - { - struct termios *termiosp = (struct termios *)arg; - struct uart_config_s config; - - if (!termiosp) - { - ret = -EINVAL; - break; - } - - /* Perform some sanity checks before accepting any changes */ - - if (((termiosp->c_cflag & CSIZE) != CS8) -# ifdef CONFIG_SERIAL_OFLOWCONTROL - || ((termiosp->c_cflag & CCTS_OFLOW) && (priv->cts_gpio == 0)) -# endif -# ifdef CONFIG_SERIAL_IFLOWCONTROL - || ((termiosp->c_cflag & CRTS_IFLOW) && (priv->rts_gpio == 0)) -# endif - ) - { - ret = -EINVAL; - break; - } - - if (termiosp->c_cflag & PARENB) - { - priv->parity = (termiosp->c_cflag & PARODD) ? 1 : 2; - } - else - { - priv->parity = 0; - } - - priv->stop2 = (termiosp->c_cflag & CSTOPB) != 0; -# ifdef CONFIG_SERIAL_OFLOWCONTROL - priv->oflow = (termiosp->c_cflag & CCTS_OFLOW) != 0; - oflow = priv->oflow; -# endif -# ifdef CONFIG_SERIAL_IFLOWCONTROL - priv->iflow = (termiosp->c_cflag & CRTS_IFLOW) != 0; - iflow = priv->iflow; -# endif - - /* Note that since there is no way to request 9-bit mode - * and no way to support 5/6/7-bit modes, we ignore them - * all here. - */ - - /* Note that only cfgetispeed is used because we have knowledge - * that only one speed is supported. - */ - - priv->baud = cfgetispeed(termiosp); - - /* Effect the changes immediately - note that we do not implement - * TCSADRAIN / TCSAFLUSH - */ - - config.baud = priv->baud; - config.parity = priv->parity; - config.bits = priv->bits; - config.stopbits2 = priv->stop2; -#ifdef CONFIG_SERIAL_IFLOWCONTROL - config.iflow = priv->iflow; -#endif -#ifdef CONFIG_SERIAL_OFLOWCONTROL - config.oflow = priv->oflow; -#endif - bcm_miniuart_configure(&config); - } - break; -#endif /* CONFIG_SERIAL_TERMIOS */ - -#ifdef CONFIG_BCM2708_MINI_UART_BREAKS - case TIOCSBRK: - { - irqstate_t flags; - uint8_t lcr; - - /* Send a break signal */ - - flags = enter_critical_section(); - lcr = getreg8(BCM_AUX_MU_LCR); - lcr |= BCM_AUX_MU_LCR_BREAK; - putreg8(lcd, BCM_AUX_MU_LCR); - - /* Disable TX activity */ - - bcm_txint(dev, false); - leave_critical_section(flags); - } - break; - - case TIOCCBRK: - { - irqstate_t flags; - uint8_t lcr; - - /* Configure TX back to UART */ - - flags = enter_critical_section(); - lcr = getreg8(BCM_AUX_MU_LCR); - lcr &= ~BCM_AUX_MU_LCR_BREAK; - putreg8(lcd, BCM_AUX_MU_LCR); - - /* Enable further TX activity */ - - bcm_txint(dev, true); - leave_critical_section(flags); - } - break; -#endif /* CONFIG_BCM2708_MINI_UART_BREAKS */ - - default: - ret = -ENOTTY; - break; - } - - return ret; -} - -/**************************************************************************** - * Name: bcm_receive - * - * Description: - * Called (usually) from the interrupt level to receive one - * character from the Mini-UART. Error bits associated with the - * receipt are provided in the return 'status'. - * - ****************************************************************************/ - -static int bcm_receive(struct uart_dev_s *dev, uint32_t *status) -{ - /* Revisit... RX status not returned */ - - *status = 0; - - /* RX data is available when reading from the I/O register */ - - return getreg8(BCM_AUX_MU_IO); -} - -/**************************************************************************** - * Name: bcm_rxint - * - * Description: - * Call to enable or disable RX interrupts - * - ****************************************************************************/ - -static void bcm_rxint(struct uart_dev_s *dev, bool enable) -{ - struct bcm_dev_s *priv = (struct bcm_dev_s *)dev->priv; - irqstate_t flags; - - flags = enter_critical_section(); - if (enable) - { - /* Receive an interrupt when their is anything in the Rx data register - * (or an Rx related error occurs). - */ - -#ifndef CONFIG_SUPPRESS_SERIAL_INTS - priv->ier |= BCM_AUX_MU_IER_RXD; - bcm_setuartint(priv); -#endif - } - else - { - priv->ier &= ~BCM_AUX_MU_IER_RXD; - bcm_setuartint(priv); - } - - leave_critical_section(flags); -} - -/**************************************************************************** - * Name: bcm_rxavailable - * - * Description: - * Return true if the receive register is not empty - * - ****************************************************************************/ - -static bool bcm_rxavailable(struct uart_dev_s *dev) -{ - /* Return true if there is at least one more by in the RX FIFO. - * NOTE: This has the side effect of clearing any RX overrun status. - */ - - return (getreg8(BCM_AUX_MU_LSR) & BCM_AUX_MU_LSR_DTREADY) != 0; -} - -/**************************************************************************** - * Name: bcm_rxflowcontrol - * - * Description: - * Called when Rx buffer is full (or exceeds configured watermark levels - * if CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS is defined). - * Return true if UART activated RX flow control to block more incoming - * data - * - * Input Parameters: - * dev - UART device instance - * nbuffered - the number of characters currently buffered - * (if CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS is - * not defined the value will be 0 for an empty buffer or the - * defined buffer size for a full buffer) - * upper - true indicates the upper watermark was crossed where - * false indicates the lower watermark has been crossed - * - * Returned Value: - * true if RX flow control activated. - * - ****************************************************************************/ - -#ifdef CONFIG_SERIAL_IFLOWCONTROL -static bool bcm_rxflowcontrol(struct uart_dev_s *dev, - unsigned int nbuffered, bool upper) -{ -#warning Missing logic - return false; -} -#endif - -/**************************************************************************** - * Name: bcm_send - * - * Description: - * This method will send one byte on the Mini-UART. - * - ****************************************************************************/ - -static void bcm_send(struct uart_dev_s *dev, int ch) -{ - /* Data is sent be writing to the IO register */ - - putreg8((uint8_t)ch, BCM_AUX_MU_IO); -} - -/**************************************************************************** - * Name: bcm_txint - * - * Description: - * Call to enable or disable TX interrupts - * - ****************************************************************************/ - -static void bcm_txint(struct uart_dev_s *dev, bool enable) -{ - struct bcm_dev_s *priv = (struct bcm_dev_s *)dev->priv; - irqstate_t flags; - - flags = enter_critical_section(); - if (enable) - { - /* Enable the TX interrupt */ - -#ifndef CONFIG_SUPPRESS_SERIAL_INTS - priv->ier |= BCM_AUX_MU_IER_TXD; - bcm_setuartint(priv); - - /* Fake a TX interrupt here by just calling uart_xmitchars() with - * interrupts disabled (note this may recurse). - */ - - uart_xmitchars(dev); -#endif - } - else - { - /* Disable the TX interrupt */ - - priv->ier &= ~BCM_AUX_MU_IER_TXD; - bcm_setuartint(priv); - } - - leave_critical_section(flags); -} - -/**************************************************************************** - * Name: bcm_txready - * - * Description: - * Return true if the hardware can accept another by for transfer. - * - ****************************************************************************/ - -static bool bcm_txready(struct uart_dev_s *dev) -{ - /* Return true if the TX FIFO can accept at least one more byte. - * NOTE: This has the side effect of clearing any RX overrun status. - */ - - return (getreg8(BCM_AUX_MU_LSR) & BCM_AUX_MU_LSR_TXEMPTY) != 0; -} - -/**************************************************************************** - * Name: bcm_txempty - * - * Description: - * Return true if the transmit FIFO is empty - * - ****************************************************************************/ - -static bool bcm_txempty(struct uart_dev_s *dev) -{ - /* Return true if the TX FIFO is empty. - * NOTE: This has the side effect of clearing any RX overrun status. - */ - - return (getreg8(BCM_AUX_MU_LSR) & BCM_AUX_MU_LSR_TXIDLE) != 0; -} - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: bcm_mu_interrupt - * - * Description: - * This is the Mini-UART status interrupt handler. It will be invoked by - * logic in bcm_aux.c when the common AUX interrupt interupt is received - * and a pending Mini-UART interrupt is pending. - * - * Then interrupt handler should call uart_transmitchars() or - * uart_receivechar() to perform the appropriate data transfers.\ - * - ****************************************************************************/ - -int bcm_mu_interrupt(int irq, void *context, void *arg) -{ - uint8_t iir; - - /* Loop while there are pending interrupts */ - - while (((iir = getreg8(BCM_AUX_MU_IIR)) & BCM_AUX_MU_IIR_PEND) != 0) - { - switch (iir & BCM_AUX_MU_IIR_MASK) - { - case BCM_AUX_MU_IIR_NONE: /* No interrupts */ - default: /* Shouldn't happen */ - return OK; - - case BCM_AUX_MU_IIR_TXEMPTY: /* TX FIFO empty (read) */ - uart_xmitchars(&g_miniuart_port); - break; - - case BCM_AUX_MU_IIR_RXDATA: /* Data in RX FIFO (read) */ - uart_recvchars(&g_miniuart_port); - break; - } - } - - return OK; -} - -/**************************************************************************** - * Name: bcm_miniuart_earlyserialinit - * - * Description: - * Performs the low level Mini-UART initialization early in debug so that the - * serial console will be available during bootup. This must be called - * before up_serialinit. NOTE: This function depends on GPIO pin - * configuration performed in bcm_lowsetup() and main clock initialization - * performed in up_clkinitialize(). - * - ****************************************************************************/ - -void bcm_miniuart_earlyserialinit(void) -{ - /* Disable interrupts from all Mini-UARTS. The console is enabled in - * bcm_setup() - */ - - bcm_restoreuartint(g_miniuart_port.priv, 0); - -#ifdef CONFIG_BCM2708_MINI_UART_SERIAL_CONSOLE - /* Configure the Mini-USAR console */ - - g_miniuart_port.isconsole = true; - bcm_setup(&g_miniuart_port); -#endif -} - -/**************************************************************************** - * Name: bcm_miniuart_serialinit - * - * Description: - * Register the Mini-UART serial console and serial port. This assumes - * that up_earlyserialinit was called previously. - * - * Input Parameters: - * - * Returned Value: - * None - * - ****************************************************************************/ - -void bcm_miniuart_serialinit(void) -{ -/* Register Mini-UART the console */ - -#ifdef CONFIG_BCM2708_MINI_UART_SERIAL_CONSOLE - (void)uart_register("/dev/console", &g_miniuart_port); -#endif - - /* Register the Mini-UART as /dev/ttyS0 */ - - (void)uart_register("/dev/ttyS0", &g_miniuart_port); -} - -/**************************************************************************** - * Name: up_putc - * - * Description: - * Provide priority, low-level access to support OS debug writes - * - ****************************************************************************/ - -int up_putc(int ch) -{ -#ifdef CONFIG_BCM2708_MINI_UART_SERIAL_CONSOLE - struct bcm_dev_s *priv = (struct bcm_dev_s *)g_miniuart_port.priv; - uint8_t ier; - - bcm_disableuartint(priv, &ier); - - /* Check for LF */ - - if (ch == '\n') - { - /* Add CR */ - - bcm_lowputc('\r'); - } - - bcm_lowputc(ch); - bcm_restoreuartint(priv, ier); -#endif - return ch; -} - -#else /* USE_SERIALDRIVER */ - -/**************************************************************************** - * Name: up_putc - * - * Description: - * Provide priority, low-level access to support OS debug writes - * - ****************************************************************************/ - -int up_putc(int ch) -{ -#ifdef CONFIG_BCM2708_MINI_UART_SERIAL_CONSOLE - /* Check for LF */ - - if (ch == '\n') - { - /* Add CR */ - - bcm_lowputc('\r'); - } - - bcm_lowputc(ch); -#endif - - return ch; -} - -#endif /* USE_SERIALDRIVER */ -#endif /* CONFIG_BCM2708_MINI_UART */ diff --git a/arch/arm/src/bcm2708/bcm_serial.c b/arch/arm/src/bcm2708/bcm_serial.c deleted file mode 100644 index ed031db9b9..0000000000 --- a/arch/arm/src/bcm2708/bcm_serial.c +++ /dev/null @@ -1,115 +0,0 @@ -/**************************************************************************** - * arch/arm/src/bcm/bcm_serialinit.c - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include - -#include "bcm_config.h" -#include "bcm_serial.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -#if !defined(HAVE_UART_DEVICE) && !defined(HAVE_LPUART_DEVICE) -# undef CONFIG_KINETS_LPUART_LOWEST -#endif - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: bcm_earlyserialinit - * - * Description: - * Performs the low level UART initialization early in debug so that the - * serial console will be available during bootup. This must be called - * before up_serialinit. - * - ****************************************************************************/ - -#ifdef USE_EARLYSERIALINIT -void bcm_earlyserialinit(void) -{ -#ifdef CONFIG_BCM2708_MINI_UART_SERIAL_CONSOLE - /* Initialize the Mini-UART console */ - - bcm_miniuart_earlyserialinit(); -#endif - -#ifdef CONFIG_BCM2708_PL011_UART_SERIAL_CONSOLE - /* Initialize the PL011-UART console */ - - bcm_pl011uart_earlyserialinit(); -#endif -} -#endif - -/**************************************************************************** - * Name: up_serialinit - * - * Description: - * Register all the serial console and serial ports. This assumes - * that bcm_earlyserialinit was called previously. - * - ****************************************************************************/ - -#ifdef USE_SERIALDRIVER -void up_serialinit(void) -{ -#ifdef CONFIG_BCM2708_MINI_UART - /* Register the Mini-UART serial console and serial ports. This function - * will be called by uart_serialinit() if the Mini-UART is enabled. - */ - - bcm_miniuart_serialinit(); -#endif - -#ifdef CONFIG_BCM2708_PL011_UART - /* Register the PL011-UART serial console and serial ports. This function - * will be called by uart_serialinit() if the Mini-UART is enabled. - */ - - bcm_pl011uart_serialinit(); -#endif -} -#endif /* USE_SERIALDRIVER */ - diff --git a/arch/arm/src/bcm2708/bcm_serial.h b/arch/arm/src/bcm2708/bcm_serial.h deleted file mode 100644 index 624c6a9cd0..0000000000 --- a/arch/arm/src/bcm2708/bcm_serial.h +++ /dev/null @@ -1,156 +0,0 @@ -/**************************************************************************** - * arch/arm/src/bcm2708/bcm_serial.h - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -#ifndef __ARCH_ARM_SRC_BCM2708_BCM_SERIAL_H -#define __ARCH_ARM_SRC_BCM2708_BCM_SERIAL_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include "up_internal.h" -#include "bcm_config.h" - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -#ifndef __ASSEMBLY__ - -#undef EXTERN -#if defined(__cplusplus) -#define EXTERN extern "C" -extern "C" -{ -#else -#define EXTERN extern -#endif - -/**************************************************************************** - * Public Function Prototypes - ****************************************************************************/ - -/**************************************************************************** - * Name: bcm_earlyserialinit - * - * Description: - * Performs the low level UART initialization early in debug so that the - * serial console will be available during bootup. This must be called - * before up_serialinit. - * - ****************************************************************************/ - -#ifdef USE_EARLYSERIALINIT -void bcm_earlyserialinit(void); - -/**************************************************************************** - * Name: bcm_miniuart_earlyserialinit - * - * Description: - * Performs the low level Mini-UART initialization early in debug so that - * the Mini-UART serial console will be available during bootup. This - * function will be called by bcm_earlyserialinit() if the Mini-UART is - * selected for the serial console. - * - ****************************************************************************/ - -#ifdef CONFIG_BCM2708_MINI_UART_SERIAL_CONSOLE -void bcm_miniuart_earlyserialinit(void); -#endif - -/**************************************************************************** - * Name: bcm_pl011uart_earlyserialinit - * - * Description: - * Performs the low level PL011-UART initialization early in debug so that - * the PL011-UART serial console will be available during bootup. This - * function will be called by bcm_earlyserialinit() if the PL011-UART is - * selected for the serial console. - * - ****************************************************************************/ - -#ifdef CONFIG_BCM2708_PL011_UART_SERIAL_CONSOLE -void bcm_pl011uart_earlyserialinit(void); -#endif -#endif /* USE_EARLYSERIALINIT */ - -/**************************************************************************** - * Name: uart_serialinit - * - * Description: - * Register the UART serial console and serial ports. This assumes that - * uart_earlyserialinit was called previously. - * - ****************************************************************************/ - -#ifdef USE_SERIALDRIVER -void uart_serialinit(void); - -/**************************************************************************** - * Name: bcm_miniuart_serialinit - * - * Description: - * Register the Mini-UART serial console and serial ports. This function - * will be called by uart_serialinit() if the Mini-UART is enabled. - * - ****************************************************************************/ - -#ifdef CONFIG_BCM2708_MINI_UART -void bcm_miniuart_serialinit(void); -#endif - -/**************************************************************************** - * Name: bcm_pl011uart_serialinit - * - * Description: - * Register the PL011-UART serial console and serial ports. This function - * will be called by uart_serialinit() if the Mini-UART is enabled. - * - ****************************************************************************/ - -#ifdef CONFIG_BCM2708_PL011_UART -void bcm_pl011uart_serialinit(void); -#endif -#endif /* USE_SERIALDRIVER */ - -#undef EXTERN -#if defined(__cplusplus) -} -#endif - -#endif /* __ASSEMBLY__ */ -#endif /* __ARCH_ARM_SRC_BCM2708_BCM_SERIAL_H */ diff --git a/arch/arm/src/bcm2708/bcm_tickless.c b/arch/arm/src/bcm2708/bcm_tickless.c deleted file mode 100644 index 0de6e6dd7a..0000000000 --- a/arch/arm/src/bcm2708/bcm_tickless.c +++ /dev/null @@ -1,489 +0,0 @@ -/**************************************************************************** - * arch/arm/src/bcm2708/bcm_tickless.c - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ -/**************************************************************************** - * Tickless OS Support. - * - * When CONFIG_SCHED_TICKLESS is enabled, all support for timer interrupts - * is suppressed and the platform specific code is expected to provide the - * following custom functions. - * - * void arm_timer_initialize(void): Initializes the timer facilities. - * Called early in the initialization sequence (by up_intialize()). - * int up_timer_gettime(FAR struct timespec *ts): Returns the current - * time from the platform specific time source. - * int up_timer_cancel(void): Cancels the interval timer. - * int up_timer_start(FAR const struct timespec *ts): Start (or re-starts) - * the interval timer. - * - * The RTOS will provide the following interfaces for use by the platform- - * specific interval timer implementation: - * - * void sched_timer_expiration(void): Called by the platform-specific - * logic when the interval timer expires. - * - ****************************************************************************/ -/**************************************************************************** - * BCM2708 Timer Usage - * - * This implementation uses the BCM2708 64-bit system timer. The 64-bit - * timer provides the running time; comparison registers are used to - * generate interval interrupt. - * - * Comparison registrs C1 and C3 are available to the ARM. C0 and C2 are - * used by the GPU. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "up_arch.h" - -#include "chip/bcm2708_systimr.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -#ifndef CONFIG_SCHED_TICKLESS -# error CONFIG_SCHED_TICKLESS is required -#endif - -#if CONFIG_USEC_PER_TICK != 1 -# error CONFIG_USEC_PER_TICK=1 is required -#endif - -/**************************************************************************** - * Private Types - ****************************************************************************/ - -struct systimr_s -{ - volatile uint64_t start; /* Timer interval timer started */ - volatile uint64_t interval; /* Duration of the interval timer */ - volatile bool running; /* True if the interval timer is running */ -}; - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -static struct systimr_s g_systimr; - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: bcm_read_systimr - * - * Description: - * Read the 64-bit system timer - * - * Input Parameters: - * None - * - * Returned Value: - * The 64-bit system timer - * - * Assumptions: - * Called from a critical section. - * - ****************************************************************************/ - -static uint64_t bcm_read_systimr(void) -{ - uint32_t check; - uint32_t chi; - uint32_t clo; - - /* Loop to handle overflow from CLO to CHI (should be a rare event) */ - - do - { - chi = getreg32(BCM_SYSTIMR_CHI); - clo = getreg32(BCM_SYSTIMR_CLO); - check = getreg32(BCM_SYSTIMR_CHI); - } - while (chi != check); - - /* Then return the full 64-bit value */ - - return ((uint64_t)chi << 32) | (uint64_t)clo; -} - -/**************************************************************************** - * Name: bcm_convert_systimr - * - * Description: - * Convert the 64-bit system timer value to a standard struct ts - * - * Input Parameters: - * ts = Location to return the converted system timer value - * - * Returned Value: - * None - * - ****************************************************************************/ - -static void bcm_convert_systimr(uint64_t usec, FAR struct timespec *ts) -{ - uint32_t sec; - - /* Convert and return the timer value */ - - sec = (uint32_t)(usec / USEC_PER_SEC); - ts->tv_sec = sec; - ts->tv_nsec = (usec - (sec * USEC_PER_SEC)) * NSEC_PER_USEC; -} - -/**************************************************************************** - * Name: bcm_systimr_interrupt - * - * Description: - * System tmer compare interrupt - * - * Input Parameters: - * Standard interrupt input parameters - * - * Returned Value: - * Always returns OK - * - * Assumptions: - * Interrupts ar disabled - * - ****************************************************************************/ - -static int bcm_systimr_interrupt(int irq, FAR void *context, FAR void *arg) -{ - /* Disable the Match 0 compare interrupt now. */ - - up_disable_irq(BCM_IRQ_TIMER1); - - /* Clear the pending Match 0 compare interrupt */ - - putreg32(SYSTIMR_C_M0, BCM_SYSTIMR_C); - - g_systimr.running = false; - g_systimr.interval = 0; - - /* Then process the timer expiration */ - - sched_timer_expiration(); - return OK; -} - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: arm_timer_initialize - * - * Description: - * Initializes all platform-specific timer facilities. This function is - * called early in the initialization sequence by up_intialize(). - * On return, the current up-time should be available from - * up_timer_gettime() and the interval timer is ready for use (but not - * actively timing. - * - * Provided by platform-specific code and called from the architecture- - * specific logic. - * - * Input Parameters: - * None - * - * Returned Value: - * None - * - * Assumptions: - * Called early in the initialization sequence before any special - * concurrency protections are required. - * - ****************************************************************************/ - -void arm_timer_initialize(void) -{ - /* Disable and attach the Match 1 compare interrupt handler. */ - - up_disable_irq(BCM_IRQ_TIMER1); - (void)irq_attach(BCM_IRQ_TIMER1, bcm_systimr_interrupt, NULL); -} - -/**************************************************************************** - * Name: up_timer_gettime - * - * Description: - * Return the elapsed time since power-up (or, more correctly, since - * arm_timer_initialize() was called). This function is functionally - * equivalent to: - * - * int clock_gettime(clockid_t clockid, FAR struct timespec *ts); - * - * when clockid is CLOCK_MONOTONIC. - * - * This function provides the basis for reporting the current time and - * also is used to eliminate error build-up from small errors in interval - * time calculations. - * - * Provided by platform-specific code and called from the RTOS base code. - * - * Input Parameters: - * ts - Provides the location in which to return the up-time. - * - * Returned Value: - * Zero (OK) is returned on success; a negated errno value is returned on - * any failure. - * - * Assumptions: - * Called from the normal tasking context. The implementation must - * provide whatever mutual exclusion is necessary for correct operation. - * This can include disabling interrupts in order to assure atomic register - * operations. - * - ****************************************************************************/ - -#ifndef CONFIG_CLOCK_TIMEKEEPING -int up_timer_gettime(FAR struct timespec *ts) -{ - uint64_t now; - irqstate_t flags; - - DEBUGASSERT(ts != NULL); - - /* Read the 64-bit system timer */ - - flags = enter_critical_section(); - now = bcm_read_systimr(); - leave_critical_section(flags); - - /* Return the value of the timer */ - - bcm_convert_systimr(now, ts); - return OK; -} -#else -int up_timer_getcounter(FAR uint64_t *cycles) -{ - irqstate_t flags; - - DEBUGASSERT(cycles != NULL); - - flags = enter_critical_section(); - *cycles = bcm_read_systimr(); - - leave_critical_section(flags); - return OK; -} -#endif /* CONFIG_CLOCK_TIMEKEEPING */ - -/**************************************************************************** - * Name: up_timer_getmask - * - * Description: - * To be provided - * - * Input Parameters: - * mask - Location to return the 64-bit mask - * - * Returned Value: - * None - * - ****************************************************************************/ - -#ifdef CONFIG_CLOCK_TIMEKEEPING -void up_timer_getmask(FAR uint64_t *mask) -{ - DEBUGASSERT(mask != NULL); - *mask = 0xffffffffull; -} -#endif /* CONFIG_CLOCK_TIMEKEEPING */ - -/**************************************************************************** - * Name: up_timer_cancel - * - * Description: - * Cancel the interval timer and return the time remaining on the timer. - * These two steps need to be as nearly atomic as possible. - * sched_timer_expiration() will not be called unless the timer is - * restarted with up_timer_start(). - * - * If, as a race condition, the timer has already expired when this - * function is called, then that pending interrupt must be cleared so - * that up_timer_start() and the remaining time of zero should be - * returned. - * - * NOTE: This function may execute at a high rate with no timer running (as - * when pre-emption is enabled and disabled). - * - * Provided by platform-specific code and called from the RTOS base code. - * - * Input Parameters: - * ts - Location to return the remaining time. Zero should be returned - * if the timer is not active. ts may be zero in which case the - * time remaining is not returned. - * - * Returned Value: - * Zero (OK) is returned on success. A call to up_timer_cancel() when - * the timer is not active should also return success; a negated errno - * value is returned on any failure. - * - * Assumptions: - * May be called from interrupt level handling or from the normal tasking - * level. Interrupts may need to be disabled internally to assure - * non-reentrancy. - * - ****************************************************************************/ - -int up_timer_cancel(FAR struct timespec *ts) -{ - uint64_t elapsed = 0; - irqstate_t flags; - - DEBUGASSERT(ts != NULL); - - /* Disable the Match 1 comparison interrupt */ - - flags = enter_critical_section(); - up_disable_irq(BCM_IRQ_TIMER1); - - /* Check if the timer was actually running */ - - if (!g_systimr.running) - { - goto errout; - } - - g_systimr.running = false; - - /* Get the time elapsed time since the interval timer was started */ - - elapsed = bcm_read_systimr() - g_systimr.start; - if (elapsed >= g_systimr.interval) - { - goto errout; - } - - g_systimr.interval = 0; - - /* Return the value remaining on the timer */ - - leave_critical_section(flags); - bcm_convert_systimr(g_systimr.interval - elapsed, ts); - return OK; - -errout: - g_systimr.running = false; - g_systimr.interval = 0; - leave_critical_section(flags); - - ts->tv_sec = 0; - ts->tv_nsec = 0; - return -ENODATA; -} - -/**************************************************************************** - * Name: up_timer_start - * - * Description: - * Start the interval timer. sched_timer_expiration() will be - * called at the completion of the timeout (unless up_timer_cancel - * is called to stop the timing. - * - * Provided by platform-specific code and called from the RTOS base code. - * - * Input Parameters: - * ts - Provides the time interval until sched_timer_expiration() is - * called. - * - * Returned Value: - * Zero (OK) is returned on success; a negated errno value is returned on - * any failure. - * - * Assumptions: - * May be called from interrupt level handling or from the normal tasking - * level. Interrupts may need to be disabled internally to assure - * non-reentrancy. - * - ****************************************************************************/ - -int up_timer_start(FAR const struct timespec *ts) -{ - irqstate_t flags; - uint64_t interval; - uint64_t now; - - DEBUGASSERT(ts != NULL); - - /* Convert the time to microseconds. WARNING: Bad things might happen if - * this interval is very small! - */ - - interval = (uint64_t)ts->tv_sec * USEC_PER_SEC + - (uint64_t)(ts->tv_nsec / NSEC_PER_USEC); - - /* Make certain that the Match 0 comparison interrupt is disabled */ - - flags = enter_critical_section(); - up_disable_irq(BCM_IRQ_TIMER1); - - /* Configure the Match 1 comparison reigster*/ - - now = bcm_read_systimr(); - putreg32(now + interval, BCM_SYSTIMR_C1); - - g_systimr.start = now; - g_systimr.interval = interval; - g_systimr.running = true; - - /* Enable the comparison interrupt */ - - up_enable_irq(BCM_IRQ_TIMER1); - leave_critical_section(flags); - return OK; -} diff --git a/arch/arm/src/bcm2708/chip.h b/arch/arm/src/bcm2708/chip.h deleted file mode 100644 index 8bea165fa8..0000000000 --- a/arch/arm/src/bcm2708/chip.h +++ /dev/null @@ -1,67 +0,0 @@ -/************************************************************************************ - * arch/arm/src/bcm2708/chip.h - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -#ifndef __ARCH_ARM_SRC_BCM2708_CHIP_H -#define __ARCH_ARM_SRC_BCM2708_CHIP_H - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include -#include "chip/bcm2708_memorymap.h" - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/* Cache line sizes (in bytes) */ - -#define ARM_DCACHE_LINESIZE 32 /* 32 bytes (8 words) */ -#define ARM_ICACHE_LINESIZE 32 /* 32 bytes (8 words) */ - -/************************************************************************************ - * Public Types - ************************************************************************************/ - -/************************************************************************************ - * Public Data - ************************************************************************************/ - -/************************************************************************************ - * Public Functions - ************************************************************************************/ - -#endif /* __ARCH_ARM_SRC_BCM2708_CHIP_H */ diff --git a/arch/arm/src/bcm2708/chip/bcm2708_aux.h b/arch/arm/src/bcm2708/chip/bcm2708_aux.h deleted file mode 100644 index 097076c563..0000000000 --- a/arch/arm/src/bcm2708/chip/bcm2708_aux.h +++ /dev/null @@ -1,215 +0,0 @@ -/************************************************************************************ - * arch/arm/src/bcm2708/chip/bcm2708_aux.h - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Alan Carvalho de Assis - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -#ifndef __ARCH_ARM_SRC_BCM2708_CHIP_BCM2708_AUX_H -#define __ARCH_ARM_SRC_BCM2708_CHIP_BCM2708_AUX_H - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include - -#include "chip/bcm2708_memorymap.h" - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/* UART/AUX Register Offsets ********************************************************/ - -#define BCM_AUX_IRQ_OFFSET 0x0000 /* Auxiliary Interrupt status */ -#define BCM_AUX_ENB_OFFSET 0x0004 /* Auxiliary enables */ -#define BCM_AUX_MU_IO_OFFSET 0x0040 /* Mini Uart I/O Data */ -#define BCM_AUX_MU_IER_OFFSET 0x0044 /* Mini Uart Interrupt Enable */ -#define BCM_AUX_MU_IIR_OFFSET 0x0048 /* Mini Uart Interrupt Identify */ -#define BCM_AUX_MU_LCR_OFFSET 0x004c /* Mini Uart Line Control */ -#define BCM_AUX_MU_MCR_OFFSET 0x0050 /* Mini Uart Modem Control */ -#define BCM_AUX_MU_LSR_OFFSET 0x0054 /* Mini Uart Line Status */ -#define BCM_AUX_MU_MSR_OFFSET 0x0058 /* Mini Uart Modem Status */ -#define BCM_AUX_MU_SCRATCH_OFFSET 0x005c /* Mini Uart Scratch */ -#define BCM_AUX_MU_CNTL_OFFSET 0x0060 /* Mini Uart Extra Control */ -#define BCM_AUX_MU_STAT_OFFSET 0x0064 /* Mini Uart Extra Status */ -#define BCM_AUX_MU_BAUD_OFFSET 0x0068 /* Mini Uart Baudrate */ -#define BCM_AUX_SPI0_CNTL0_OFFSET 0x0080 /* SPI 1 Control register 0 */ -#define BCM_AUX_SPI0_CNTL1_OFFSET 0x0084 /* SPI 1 Control register 1 */ -#define BCM_AUX_SPI0_STAT_OFFSET 0x0088 /* SPI 1 Status */ -#define BCM_AUX_SPI0_IO_OFFSET 0x0090 /* SPI 1 Data */ -#define BCM_AUX_SPI0_PEEK_OFFSET 0x0094 /* SPI 1 Peek */ -#define BCM_AUX_SPI1_CNTL0_OFFSET 0x00c0 /* SPI 2 Control register 0 */ -#define BCM_AUX_SPI1_CNTL1_OFFSET 0x00c4 /* SPI 2 Control register 1 */ -#define BCM_AUX_SPI1_STAT_OFFSET 0x00c8 /* SPI 2 Status */ -#define BCM_AUX_SPI1_IO_OFFSET 0x00d0 /* SPI 2 Data */ -#define BCM_AUX_SPI1_PEEK_OFFSET 0x00d4 /* SPI 2 Peek */ - - -/* UART Register Addresses **********************************************************/ - -#define BCM_AUX_IRQ (BCM_AUX_VBASE+BCM_AUX_IRQ_OFFSET) -#define BCM_AUX_ENB (BCM_AUX_VBASE+BCM_AUX_ENB_OFFSET) -#define BCM_AUX_MU_IO (BCM_AUX_VBASE+BCM_AUX_MU_IO_OFFSET) -#define BCM_AUX_MU_IER (BCM_AUX_VBASE+BCM_AUX_MU_IER_OFFSET) -#define BCM_AUX_MU_IIR (BCM_AUX_VBASE+BCM_AUX_MU_IIR_OFFSET) -#define BCM_AUX_MU_LCR (BCM_AUX_VBASE+BCM_AUX_MU_LCR_OFFSET) -#define BCM_AUX_MU_MCR (BCM_AUX_VBASE+BCM_AUX_MU_MCR_OFFSET) -#define BCM_AUX_MU_LSR (BCM_AUX_VBASE+BCM_AUX_MU_LSR_OFFSET) -#define BCM_AUX_MU_MSR (BCM_AUX_VBASE+BCM_AUX_MU_MSR_OFFSET) -#define BCM_AUX_MU_SCRATCH (BCM_AUX_VBASE+BCM_AUX_MU_SCRATCH_OFFSET) -#define BCM_AUX_MU_CNTL (BCM_AUX_VBASE+BCM_AUX_MU_CNTL_OFFSET) -#define BCM_AUX_MU_STAT (BCM_AUX_VBASE+BCM_AUX_MU_STAT_OFFSET) -#define BCM_AUX_MU_BAUD (BCM_AUX_VBASE+BCM_AUX_MU_BAUD_OFFSET) -#define BCM_AUX_SPI0_CNTL0 (BCM_AUX_VBASE+BCM_AUX_SPI0_CNTL0_OFFSET) -#define BCM_AUX_SPI0_CNTL1 (BCM_AUX_VBASE+BCM_AUX_SPI0_CNTL1_OFFSET) -#define BCM_AUX_SPI0_STAT (BCM_AUX_VBASE+BCM_AUX_SPI0_STAT_OFFSET) -#define BCM_AUX_SPI0_IO (BCM_AUX_VBASE+BCM_AUX_SPI0_IO_OFFSET) -#define BCM_AUX_SPI0_PEEK (BCM_AUX_VBASE+BCM_AUX_SPI0_PEEK_OFFSET) -#define BCM_AUX_SPI1_CNTL0 (BCM_AUX_VBASE+BCM_AUX_SPI1_CNTL0_OFFSET) -#define BCM_AUX_SPI1_CNTL1 (BCM_AUX_VBASE+BCM_AUX_SPI1_CNTL1_OFFSET) -#define BCM_AUX_SPI1_STAT (BCM_AUX_VBASE+BCM_AUX_SPI1_STAT_OFFSET) -#define BCM_AUX_SPI1_IO (BCM_AUX_VBASE+BCM_AUX_SPI1_IO_OFFSET) -#define BCM_AUX_SPI1_PEEK (BCM_AUX_VBASE+BCM_AUX_SPI1_PEEK_OFFSET) - - -/* UART Register Bit Definitions ****************************************************/ - -#define BCM_AUX_IRQ_MU (1 << 0) /* Mini UART IRQ pending */ -#define BCM_AUX_IRQ_SPI1 (1 << 1) /* SPI 1 IRQ pending */ -#define BCM_AUX_IRQ_SPI2 (1 << 2) /* SPI 2 IRQ pending */ - -#define BCM_AUX_ENB_MU (1 << 0) /* Mini UART Enable */ -#define BCM_AUX_ENB_SPI1 (1 << 1) /* SPI 1 Enable */ -#define BCM_AUX_ENB_SPI2 (1 << 2) /* SPI 2 Enable */ - -#define BCM_AUX_MU_IO_SHIFT 0 /* LSB 8-bit of baudrate or TXD/RXD */ -#define BCM_AUX_MU_IO_BAUDRATE (0xff << BCM_AUX_MU_IO_SHIFT) /* If DLAB = 1 */ -#define BCM_AUX_MU_IO_TXD (0 << BCM_AUX_MU_IO_SHIFT) /* If DLAB = 0 */ -#define BCM_AUX_MU_IO_RXD (1 << BCM_AUX_MU_IO_SHIFT) /* If DLAB = 0 */ - -#define BCM_AUX_MU_IER_SHIFT 0 /* MSB 8-bit of baudrate or IRQTXE/IRQRXE */ -#define BCM_AUX_MU_IER_BAUDRATE (0xff << BCM_AUX_MU_IER_SHIFT) /* If DLAB = 1 */ -#define BCM_AUX_MU_IER_TXD (1 << 0) /* Enable Transmit Interrupt */ -#define BCM_AUX_MU_IER_RXD (1 << 1) /* Enable Receive Interrupt */ - -#define BCM_AUX_MU_IIR_PEND (1 << 0) /* This bit is clear whenever an IRQ is pending */ -#define BCM_AUX_MU_IIR_SHIFT 1 /* On read this register shows the interrupt ID bit */ -#define BCM_AUX_MU_IIR_MASK (3 << BCM_AUX_MU_IIR_SHIFT) -# define BCM_AUX_MU_IIR_NONE (0 << BCM_AUX_MU_IIR_SHIFT) /* No interrupts */ -# define BCM_AUX_MU_IIR_TXEMPTY (1 << BCM_AUX_MU_IIR_SHIFT) /* TX FIFO empty (read) */ -# define BCM_AUX_MU_IIR_RXDATA (2 << BCM_AUX_MU_IIR_SHIFT) /* Data in RX FIFO (read) */ -# define BCM_AUX_MU_IIR_TXCLEAR (1 << BCM_AUX_MU_IIR_SHIFT) /* Clear RX FIFO (write) */ -# define BCM_AUX_MU_IIR_RXCLEAR (2 << BCM_AUX_MU_IIR_SHIFT) /* Clear TX FIFO (write) */ - -#define BCM_AUX_MU_LCR_DATA8BIT (1 << 0) /* 1 = UART 8-bit 0 = UART 7-bit */ -#define BCM_AUX_MU_LCR_BREAK (1 << 6) /* Set UART TX line to low, breaks if at least 12 bits times */ -#define BCM_AUX_MU_LCR_DLAB (1 << 7) /* If set access Baudrate register */ - -#define BCM_AUX_MU_MCR_RTS (1 << 1) /* if set RTS line is low */ - -#define BCM_AUX_MU_LSR_DTREADY (1 << 0) /* This bit is set if FIFO has data */ -#define BCM_AUX_MU_LSR_RXOVR (1 << 1) /* Receiver Overrun */ -#define BCM_AUX_MU_LSR_TXEMPTY (1 << 5) /* TX FIFO can accept at least 1 byte */ -#define BCM_AUX_MU_LSR_TXIDLE (1 << 6) /* TX FIFO empty and transmitter idle */ - -#define BCM_AUX_MU_MSR_CTS (1 << 5) /* Holds the inverse of UART CTS status */ - -#define BCM_AUX_MU_CNTL_RXEN (1 << 0) /* Receiver Enable */ -#define BCM_AUX_MU_CNTL_TXEN (1 << 1) /* Transmitter Enable */ -#define BCM_AUX_MU_CNTL_RXAUTOFLOW (1 << 2) /* Enable RXD Auto-flow using RTS */ -#define BCM_AUX_MU_CNTL_TXAUTOFLOW (1 << 3) /* Enable TXD Auto-flow using CTS */ -#define BCM_AUX_MU_CNTL_RTSLEVEL_SHIFT 4 /* RX FIFO level to deassert RTS */ -#define BCM_AUX_MU_CNTL_RTSLEVEL_MASK (3 << BCM_AUX_MU_CNTL_RTSLEVEL_SHIFT) -# define BCM_AUX_MU_CNTL_RTSLEVEL_3 (0 << BCM_AUX_MU_CNTL_RTSLEVEL_SHIFT) -# define BCM_AUX_MU_CNTL_RTSLEVEL_2 (1 << BCM_AUX_MU_CNTL_RTSLEVEL_SHIFT) -# define BCM_AUX_MU_CNTL_RTSLEVEL_1 (2 << BCM_AUX_MU_CNTL_RTSLEVEL_SHIFT) -# define BCM_AUX_MU_CNTL_RTSLEVEL_4 (3 << BCM_AUX_MU_CNTL_RTSLEVEL_SHIFT) -#define BCM_AUX_MU_CNTL_RTS_ASSERT (1 << 6) /* Invert RTS auto-flow polarity */ -#define BCM_AUX_MU_CNTL_CTS_ASSERT (1 << 7) /* Invert CTS auto-flow polarity */ - -#define BCM_AUX_MU_STAT_SYM_AVAIL (1 << 0) /* There is at least one symbol in the RX FIFO */ -#define BCM_AUX_MU_STAT_SPC_AVAIL (1 << 1) /* There is at least one free position in the TX FIFO */ -#define BCM_AUX_MU_STAT_RX_IDLE (1 << 2) /* The RX is Idle */ -#define BCM_AUX_MU_STAT_TX_IDLE (1 << 3) /* The TX is Idle */ -#define BCM_AUX_MU_STAT_RX_OVR (1 << 4) /* Receiver overrun */ -#define BCM_AUX_MU_STAT_TX_FULL (1 << 5) /* This is the inverse of bit 1 */ -#define BCM_AUX_MU_STAT_RTS_STAT (1 << 6) /* Status of RTS line */ -#define BCM_AUX_MU_STAT_CTS_STAT (1 << 7) /* Status of CTS line */ -#define BCM_AUX_MU_STAT_TX_EMPTY (1 << 8) /* TX FIFO is Empty */ -#define BCM_AUX_MU_STAT_TX_DONE (1 << 9) /* TX is Idle and FIFO is Empty */ -#define BCM_AUX_MU_STAT_RX_LEVEL_SHIFT 16 /* Bits 19-16: how many symbols in RX FIFO */ -#define BCM_AUX_MU_STAT_RX_LEVEL_MASK (0xf << BCM_AUX_MU_STAT_RX_LEVEL_SHIFT) -#define BCM_AUX_MU_STAT_TX_LEVEL_SHIFT 24 /* Bits 27-24: how many symbols in TX FIFO */ -#define BCM_AUX_MU_STAT_TX_LEVEL_MASK (0xf << BCM_AUX_MU_STAT_TX_LEVEL_SHIFT) - -#define BCM_AUX_SPI_CNTL0_SFT_LEN_SHIFT 0 /* Specifies the number of bits to shift */ -#define BCM_AUX_SPI_CNTL0_SFT_LEN_MASK (0x3f << BCM_AUX_SPI_CNTL0_SFT_LEN_SHIFT) -#define BCM_AUX_SPI_CNTL0_MSB_FIRST (1 << 6) /* If 1 the data is shifted out starting with the MS bit */ -#define BCM_AUX_SPI_CNTL0_INV_SPICLK (1 << 7) /* If 1 the 'idle' clock line state is high */ -#define BCM_AUX_SPI_CNTL0_OUT_RISING (1 << 8) /* if 1 data is clocked out on the rising edge of the SPI clock */ -#define BCM_AUX_SPI_CNTL0_CLR_FIFO (1 << 9) /* Clear RX and TX FIFOs */ -#define BCM_AUX_SPI_CNTL0_IN_RISING (1 << 10) /* If 1 data is clocked in on the rising edge of the SPI clock */ -#define BCM_AUX_SPI_CNTL0_ENABLE (1 << 11) /* Enables the SPI interface. */ -#define BCM_AUX_SPI_CNTL0_DOHT_SHIFT 12 /* Bit 13-12: DOUT Hold Time */ -#define BCM_AUX_SPI_CNTL0_DOHT_MASK (3 << BCM_AUX_SPI_CNTL0_DOHT_SHIFT) -# define BCM_AUX_SPI_CNTL0_DOHT_NONE (0 << BCM_AUX_SPI_CNTL0_DOHT_SHIFT) -# define BCM_AUX_SPI_CNTL0_DOHT_1CLK (1 << BCM_AUX_SPI_CNTL0_DOHT_SHIFT) -# define BCM_AUX_SPI_CNTL0_DOHT_4CLK (2 << BCM_AUX_SPI_CNTL0_DOHT_SHIFT) -# define BCM_AUX_SPI_CNTL0_DOHT_7CLK (3 << BCM_AUX_SPI_CNTL0_DOHT_SHIFT) -#define BCM_AUX_SPI_CNTL0_VAR_WIDTH (1 << 14) /* Variable Width based on TX FIFO */ -#define BCM_AUX_SPI_CNTL0_VAR_CS (1 << 15) /* CS pattern and data from TX FIFO */ -#define BCM_AUX_SPI_CNTL0_PIM (1 << 16) /* Post Input Mode */ -#define BCM_AUX_SPI_CNTL0_CS_SHIFT 17 /* The pattern output on the CS pins when active */ -#define BCM_AUX_SPI_CNTL0_CS_MASK (7 << BCM_AUX_SPI_CNTL0_CS_SHIFT) -#define BCM_AUX_SPI_CNTL0_SPEED_SHIFT 20 -#define BCM_AUX_SPI_CNTL0_SPEED_MASK (0xfff << BCM_AUX_SPI_CNTL0_SPEED_SHIFT) - -#define BCM_AUX_SPI_CNTL1_KEEP_IN (1 << 0) /* Keep input, shift register is not cleared */ -#define BCM_AUX_SPI_CNTL1_MSB_FIRST (1 << 1) /* Shift data from MSB */ -#define BCM_AUX_SPI_CNTL1_DONE_IRQ (1 << 6) /* If 1 the interrupt line is high when the interface is idle */ -#define BCM_AUX_SPI_CNTL1_TXEMPTY_IRQ (1 << 7) /* Enable IRQ Line when FIFO is Empty */ -#define BCM_AUX_SPI_CNTL1_CSHT_SHIFT 8 /* Bits 10-8: Additional CS High Time */ -#define BCM_AUX_SPI_CNTL1_CSHT_MASK (7 << BCM_AUX_SPI_CNTL1_CSHT_SHIFT) - -#define BCM_AUX_SPI_STAT_BITCNT_SHIFT 0 /* Bits 5-0: The number of bits still to be processed */ -#define BCM_AUX_SPI_STAT_BITCNT_MASK (0x3f << BCM_AUX_SPI_STAT_BITCNT_SHIFT) -#define BCM_AUX_SPI_STAT_BUSY (1 << 6) /* The module is busy transferring data */ -#define BCM_AUX_SPI_STAT_RXEMPTY (1 << 7) /* RX FIFO is empty */ -#define BCM_AUX_SPI_STAT_TXEMPTY (1 << 8) /* TX FIFO is empty */ -#define BCM_AUX_SPI_STAT_TXFULL (1 << 9) /* TX FIFO is full */ -#define BCM_AUX_SPI_STAT_RXLEVEL_SHIFT 12 /* Data units in the RX FIFO */ -#define BCM_AUX_SPI_STAT_RXLEVEL_MASK (0xfff << BCM_AUX_SPI_STAT_RXLEVEL_SHIFT) -#define BCM_AUX_SPI_STAT_TXLEVEL_SHIFT 24 /* Data units in the FX FIFO */ -#define BCM_AUX_SPI_STAT_TXLEVEL_MASK (0xff << BCM_AUX_SPI_STAT_TXLEVEL_SHIFT) - -#endif /* __ARCH_ARM_SRC_BCM2708_CHIP_BCM2708_AUX_H */ diff --git a/arch/arm/src/bcm2708/chip/bcm2708_gpio.h b/arch/arm/src/bcm2708/chip/bcm2708_gpio.h deleted file mode 100644 index b6fad4e153..0000000000 --- a/arch/arm/src/bcm2708/chip/bcm2708_gpio.h +++ /dev/null @@ -1,278 +0,0 @@ -/************************************************************************************ - * arch/arm/src/bcm2708/chip/bcm2708_gpio.h - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Alan Carvalho de Assis - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -#ifndef __ARCH_ARM_SRC_BCM2708_CHIP_BCM2708_GPIO_H -#define __ARCH_ARM_SRC_BCM2708_CHIP_BCM2708_GPIO_H - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include - -#include "chip/bcm2708_memorymap.h" - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/* GPIO Register Offsets ************************************************************/ - -#define BCM_GPIO_GPFSEL_INDEX(n) ((n) / 10) -#define BCM_GPIO_GPFSEL_FIELD(n) ((n) % 10) - -#define BCM_GPIO_GPFSEL_OFFSET(n) (0x0000 + (BCM_GPIO_GPFSEL_INDEX(n) << 2)) -# define BCM_GPIO_GPFSEL0_OFFSET 0x0000 /* GPIO Function Select 0 */ -# define BCM_GPIO_GPFSEL1_OFFSET 0x0004 /* GPIO Function Select 1 */ -# define BCM_GPIO_GPFSEL2_OFFSET 0x0008 /* GPIO Function Select 2 */ -# define BCM_GPIO_GPFSEL3_OFFSET 0x000c /* GPIO Function Select 3 */ -# define BCM_GPIO_GPFSEL4_OFFSET 0x0010 /* GPIO Function Select 4 */ -# define BCM_GPIO_GPFSEL5_OFFSET 0x0014 /* GPIO Function Select 5 */ -#define BCM_GPIO_GPSET_OFFSET(n) (0x001c + (((n) >> 5) << 2)) -# define BCM_GPIO_GPSET0_OFFSET 0x001c /* GPIO Pin Output Set 0 */ -# define BCM_GPIO_GPSET1_OFFSET 0x0020 /* GPIO Pin Output Set 1 */ -#define BCM_GPIO_GPCLR_OFFSET(n) (0x0028 + (((n) >> 5) << 2)) -# define BCM_GPIO_GPCLR0_OFFSET 0x0028 /* GPIO Pin Output Clear 0 */ -# define BCM_GPIO_GPCLR1_OFFSET 0x002c /* GPIO Pin Output Clear 1 */ -#define BCM_GPIO_GPLEV_OFFSET(n) (0x0034 + (((n) >> 5) << 2)) -# define BCM_GPIO_GPLEV0_OFFSET 0x0034 /* GPIO Pin Level 0 */ -# define BCM_GPIO_GPLEV1_OFFSET 0x0038 /* GPIO Pin Level 1 */ -#define BCM_GPIO_GPEDS_OFFSET(n) (0x0040 + (((n) >> 5) << 2)) -# define BCM_GPIO_GPEDS0_OFFSET 0x0040 /* GPIO Pin Event Detect Status 0 */ -# define BCM_GPIO_GPEDS1_OFFSET 0x0044 /* GPIO Pin Event Detect Status 1 */ -#define BCM_GPIO_GPREN_OFFSET(n) (0x004c + (((n) >> 5) << 2)) -# define BCM_GPIO_GPREN0_OFFSET 0x004c /* GPIO Pin Rising Edge Detect Enable 0 */ -# define BCM_GPIO_GPREN1_OFFSET 0x0050 /* GPIO Pin Rising Edge Detect Enable 1 */ -#define BCM_GPIO_GPFEN_OFFSET(n) (0x0058 + (((n) >> 5) << 2)) -# define BCM_GPIO_GPFEN0_OFFSET 0x0058 /* GPIO Pin Falling Edge Detect Enable 0 */ -# define BCM_GPIO_GPFEN1_OFFSET 0x005c /* GPIO Pin Falling Edge Detect Enable 1 */ -#define BCM_GPIO_GPHEN_OFFSET(n) (0x0064 + (((n) >> 5) << 2)) -# define BCM_GPIO_GPHEN0_OFFSET 0x0064 /* GPIO Pin High Detect Enable 0 */ -# define BCM_GPIO_GPHEN1_OFFSET 0x0068 /* GPIO Pin High Detect Enable 1 */ -#define BCM_GPIO_GPLEN_OFFSET(n) (0x0070 + (((n) >> 5) << 2)) -# define BCM_GPIO_GPLEN0_OFFSET 0x0070 /* GPIO Pin Low Detect Enable 0 */ -# define BCM_GPIO_GPLEN1_OFFSET 0x0074 /* GPIO Pin Low Detect Enable 1 */ -#define BCM_GPIO_GPAREN_OFFSET(n) (0x007c + (((n) >> 5) << 2)) -# define BCM_GPIO_GPAREN0_OFFSET 0x007c /* GPIO Pin Async. Rising Edge Detect 0 */ -# define BCM_GPIO_GPAREN1_OFFSET 0x0080 /* GPIO Pin Async. Rising Edge Detect 1 */ -#define BCM_GPIO_GPAFEN_OFFSET(n) (0x0088 + (((n) >> 5) << 2)) -# define BCM_GPIO_GPAFEN0_OFFSET 0x0088 /* GPIO Pin Async. Falling Edge Detect 0 */ -# define BCM_GPIO_GPAFEN1_OFFSET 0x008c /* GPIO Pin Async. Falling Edge Detect 1 */ -#define BCM_GPIO_GPPUD_OFFSET 0x0094 /* GPIO Pin Pull-up/down Enable */ -#define BCM_GPIO_GPPUDCLK_OFFSET(n) (0x0098 + (((n) >> 5) << 2)) -# define BCM_GPIO_GPPUDCLK0_OFFSET 0x0098 /* GPIO Pin Pull-up/down Enable Clock 0 */ -# define BCM_GPIO_GPPUDCLK1_OFFSET 0x009c /* GPIO Pin Pull-up/down Enable Clock 1 */ - -/* GPIO Register Addresses **********************************************************/ - -#define BCM_GPIO_GPFSEL(n) (BCM_GPIO_VBASE+BCM_GPIO_GPFSEL_OFFSET(n)) -# define BCM_GPIO_GPFSEL0 (BCM_GPIO_VBASE+BCM_GPIO_GPFSEL0_OFFSET) -# define BCM_GPIO_GPFSEL1 (BCM_GPIO_VBASE+BCM_GPIO_GPFSEL1_OFFSET) -# define BCM_GPIO_GPFSEL2 (BCM_GPIO_VBASE+BCM_GPIO_GPFSEL2_OFFSET) -# define BCM_GPIO_GPFSEL3 (BCM_GPIO_VBASE+BCM_GPIO_GPFSEL3_OFFSET) -# define BCM_GPIO_GPFSEL4 (BCM_GPIO_VBASE+BCM_GPIO_GPFSEL4_OFFSET) -# define BCM_GPIO_GPFSEL5 (BCM_GPIO_VBASE+BCM_GPIO_GPFSEL5_OFFSET) -#define BCM_GPIO_GPSET(n) (BCM_GPIO_VBASE+BCM_GPIO_GPSET_OFFSET(n)) -# define BCM_GPIO_GPSET0 (BCM_GPIO_VBASE+BCM_BCM_GPIO_GPSET0_OFFSET) -# define BCM_GPIO_GPSET1 (BCM_GPIO_VBASE+BCM_BCM_GPIO_GPSET1_OFFSET) -#define BCM_GPIO_GPCLR(n) (BCM_GPIO_VBASE+BCM_GPIO_GPCLR_OFFSET(n)) -# define BCM_GPIO_GPCLR0 (BCM_GPIO_VBASE+BCM_GPIO_GPCLR0_OFFSET) -# define BCM_GPIO_GPCLR1 (BCM_GPIO_VBASE+BCM_GPIO_GPCLR1_OFFSET) -#define BCM_GPIO_GPLEV(n) (BCM_GPIO_VBASE+BCM_GPIO_GPLEV_OFFSET(n)) -# define BCM_GPIO_GPLEV0 (BCM_GPIO_VBASE+BCM_GPIO_GPLEV0_OFFSET) -# define BCM_GPIO_GPLEV1 (BCM_GPIO_VBASE+BCM_GPIO_GPLEV1_OFFSET) -#define BCM_GPIO_GPEDS(n) (BCM_GPIO_VBASE+BCM_GPIO_GPEDS_OFFSET(n)) -# define BCM_GPIO_GPEDS0 (BCM_GPIO_VBASE+BCM_GPIO_GPEDS0_OFFSET) -# define BCM_GPIO_GPEDS1 (BCM_GPIO_VBASE+BCM_GPIO_GPEDS1_OFFSET) -#define BCM_GPIO_GPREN(n) (BCM_GPIO_VBASE+BCM_GPIO_GPREN_OFFSET(n)) -# define BCM_GPIO_GPREN0 (BCM_GPIO_VBASE+BCM_GPIO_GPREN0_OFFSET) -# define BCM_GPIO_GPREN1 (BCM_GPIO_VBASE+BCM_GPIO_GPREN1_OFFSET) -#define BCM_GPIO_GPFEN(n) (BCM_GPIO_VBASE+BCM_GPIO_GPFEN_OFFSET(n)) -# define BCM_GPIO_GPFEN0 (BCM_GPIO_VBASE+BCM_GPIO_GPFEN0_OFFSET) -# define BCM_GPIO_GPFEN1 (BCM_GPIO_VBASE+BCM_GPIO_GPFEN1_OFFSET) -#define BCM_GPIO_GPHEN(n) (BCM_GPIO_VBASE+BCM_GPIO_GPHEN_OFFSET(n)) -# define BCM_GPIO_GPHEN0 (BCM_GPIO_VBASE+BCM_GPIO_GPHEN0_OFFSET) -# define BCM_GPIO_GPHEN1 (BCM_GPIO_VBASE+BCM_GPIO_GPHEN1_OFFSET) -#define BCM_GPIO_GPLEN(n) (BCM_GPIO_VBASE+BCM_GPIO_GPLEN_OFFSET(n)) -# define BCM_GPIO_GPLEN0 (BCM_GPIO_VBASE+BCM_GPIO_GPLEN0_OFFSET) -# define BCM_GPIO_GPLEN1 (BCM_GPIO_VBASE+BCM_GPIO_GPLEN1_OFFSET) -#define BCM_GPIO_GPAREN(n) (BCM_GPIO_VBASE+BCM_GPIO_GPAREN_OFFSET(n)) -# define BCM_GPIO_GPAREN0 (BCM_GPIO_VBASE+BCM_GPIO_GPAREN0_OFFSET) -# define BCM_GPIO_GPAREN1 (BCM_GPIO_VBASE+BCM_GPIO_GPAREN1_OFFSET) -#define BCM_GPIO_GPAFEN(n) (BCM_GPIO_VBASE+BCM_GPIO_GPAFEN_OFFSET(n)) -# define BCM_GPIO_GPAFEN0 (BCM_GPIO_VBASE+BCM_GPIO_GPAFEN0_OFFSET) -# define BCM_GPIO_GPAFEN1 (BCM_GPIO_VBASE+BCM_GPIO_GPAFEN1_OFFSET) -#define BCM_GPIO_GPPUD (BCM_GPIO_VBASE+BCM_GPIO_GPPUD_OFFSET) -#define BCM_GPIO_GPPUDCLK(n) (BCM_GPIO_VBASE+BCM_GPIO_GPPUDCLK_OFFSET(n)) -# define BCM_GPIO_GPPUDCLK0 (BCM_GPIO_VBASE+BCM_GPIO_GPPUDCLK0_OFFSET) -# define BCM_GPIO_GPPUDCLK1 (BCM_GPIO_VBASE+BCM_GPIO_GPPUDCLK1_OFFSET) - -/* GPIO Register Bit Definitions ****************************************************/ - -#define BCM_GPIO_GPFSEL_FSEL_SHIFT(n) (3 * BCM_GPIO_GPFSEL_FIELD(n)) -#define BCM_GPIO_GPFSEL_FSEL_MASK(n) (7 << BCM_GPIO_GPFSEL_FSEL_SHIFT(n)) -# define BCM_GPIO_GPFSEL_FSEL(n,f) ((uint32_t)(f) << BCM_GPIO_GPFSEL_FSEL_SHIFT(n)) -# define BCM_GPIO_GPFSEL_FSEL_INPUT (0) -# define BCM_GPIO_GPFSEL_FSEL_OUTPUT (1) -# define BCM_GPIO_GPFSEL_FSEL_ALT0 (4) -# define BCM_GPIO_GPFSEL_FSEL_ALT1 (5) -# define BCM_GPIO_GPFSEL_FSEL_ALT2 (6) -# define BCM_GPIO_GPFSEL_FSEL_ALT3 (7) -# define BCM_GPIO_GPFSEL_FSEL_ALT4 (3) -# define BCM_GPIO_GPFSEL_FSEL_ALT5 (2) - -#define BCM_GPIO_GPFSEL_FSELx0_SHIFT 0 -#define BCM_GPIO_GPFSEL_FSELx0_MASK (7 << BCM_GPIO_GPFSEL_FSELx0_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx0_INPUT (0 << BCM_GPIO_GPFSEL_FSELx0_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx0_OUTPUT (1 << BCM_GPIO_GPFSEL_FSELx0_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx0_ALT0 (4 << BCM_GPIO_GPFSEL_FSELx0_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx0_ALT1 (5 << BCM_GPIO_GPFSEL_FSELx0_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx0_ALT2 (6 << BCM_GPIO_GPFSEL_FSELx0_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx0_ALT3 (7 << BCM_GPIO_GPFSEL_FSELx0_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx0_ALT4 (3 << BCM_GPIO_GPFSEL_FSELx0_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx0_ALT5 (2 << BCM_GPIO_GPFSEL_FSELx0_SHIFT) -#define BCM_GPIO_GPFSEL_FSELx1_SHIFT 3 -#define BCM_GPIO_GPFSEL_FSELx1_MASK (7 << BCM_GPIO_GPFSEL_FSELx1_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx1_INPUT (0 << BCM_GPIO_GPFSEL_FSELx1_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx1_OUTPUT (1 << BCM_GPIO_GPFSEL_FSELx1_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx1_ALT0 (4 << BCM_GPIO_GPFSEL_FSELx1_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx1_ALT1 (5 << BCM_GPIO_GPFSEL_FSELx1_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx1_ALT2 (6 << BCM_GPIO_GPFSEL_FSELx1_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx1_ALT3 (7 << BCM_GPIO_GPFSEL_FSELx1_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx1_ALT4 (3 << BCM_GPIO_GPFSEL_FSELx1_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx1_ALT5 (2 << BCM_GPIO_GPFSEL_FSELx1_SHIFT) -#define BCM_GPIO_GPFSEL_FSELx2_SHIFT 6 -#define BCM_GPIO_GPFSEL_FSELx2_MASK (7 << BCM_GPIO_GPFSEL_FSELx2_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx2_INPUT (0 << BCM_GPIO_GPFSEL_FSELx2_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx2_OUTPUT (1 << BCM_GPIO_GPFSEL_FSELx2_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx2_ALT0 (4 << BCM_GPIO_GPFSEL_FSELx2_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx2_ALT1 (5 << BCM_GPIO_GPFSEL_FSELx2_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx2_ALT2 (6 << BCM_GPIO_GPFSEL_FSELx2_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx2_ALT3 (7 << BCM_GPIO_GPFSEL_FSELx2_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx2_ALT4 (3 << BCM_GPIO_GPFSEL_FSELx2_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx2_ALT5 (2 << BCM_GPIO_GPFSEL_FSELx2_SHIFT) -#define BCM_GPIO_GPFSEL_FSELx3_SHIFT 9 -#define BCM_GPIO_GPFSEL_FSELx3_MASK (7 << BCM_GPIO_GPFSEL_FSELx3_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx3_INPUT (0 << BCM_GPIO_GPFSEL_FSELx3_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx3_OUTPUT (1 << BCM_GPIO_GPFSEL_FSELx3_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx3_ALT0 (4 << BCM_GPIO_GPFSEL_FSELx3_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx3_ALT1 (5 << BCM_GPIO_GPFSEL_FSELx3_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx3_ALT2 (6 << BCM_GPIO_GPFSEL_FSELx3_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx3_ALT3 (7 << BCM_GPIO_GPFSEL_FSELx3_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx3_ALT4 (3 << BCM_GPIO_GPFSEL_FSELx3_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx3_ALT5 (2 << BCM_GPIO_GPFSEL_FSELx3_SHIFT) -#define BCM_GPIO_GPFSEL_FSELx4_SHIFT 12 -#define BCM_GPIO_GPFSEL_FSELx4_MASK (7 << BCM_GPIO_GPFSEL_FSELx4_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx4_INPUT (0 << BCM_GPIO_GPFSEL_FSELx4_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx4_OUTPUT (1 << BCM_GPIO_GPFSEL_FSELx4_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx4_ALT0 (4 << BCM_GPIO_GPFSEL_FSELx4_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx4_ALT1 (5 << BCM_GPIO_GPFSEL_FSELx4_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx4_ALT2 (6 << BCM_GPIO_GPFSEL_FSELx4_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx4_ALT3 (7 << BCM_GPIO_GPFSEL_FSELx4_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx4_ALT4 (3 << BCM_GPIO_GPFSEL_FSELx4_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx4_ALT5 (2 << BCM_GPIO_GPFSEL_FSELx4_SHIFT) -#define BCM_GPIO_GPFSEL_FSELx5_SHIFT 15 -#define BCM_GPIO_GPFSEL_FSELx5_MASK (7 << BCM_GPIO_GPFSEL_FSELx5_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx5_INPUT (0 << BCM_GPIO_GPFSEL_FSELx5_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx5_OUTPUT (1 << BCM_GPIO_GPFSEL_FSELx5_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx5_ALT0 (4 << BCM_GPIO_GPFSEL_FSELx5_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx5_ALT1 (5 << BCM_GPIO_GPFSEL_FSELx5_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx5_ALT2 (6 << BCM_GPIO_GPFSEL_FSELx5_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx5_ALT3 (7 << BCM_GPIO_GPFSEL_FSELx5_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx5_ALT4 (3 << BCM_GPIO_GPFSEL_FSELx5_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx5_ALT5 (2 << BCM_GPIO_GPFSEL_FSELx5_SHIFT) -#define BCM_GPIO_GPFSEL_FSELx6_SHIFT 18 -#define BCM_GPIO_GPFSEL_FSELx6_MASK (7 << BCM_GPIO_GPFSEL_FSELx6_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx6_INPUT (0 << BCM_GPIO_GPFSEL_FSELx6_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx6_OUTPUT (1 << BCM_GPIO_GPFSEL_FSELx6_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx6_ALT0 (4 << BCM_GPIO_GPFSEL_FSELx6_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx6_ALT1 (5 << BCM_GPIO_GPFSEL_FSELx6_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx6_ALT2 (6 << BCM_GPIO_GPFSEL_FSELx6_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx6_ALT3 (7 << BCM_GPIO_GPFSEL_FSELx6_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx6_ALT4 (3 << BCM_GPIO_GPFSEL_FSELx6_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx6_ALT5 (2 << BCM_GPIO_GPFSEL_FSELx6_SHIFT) -#define BCM_GPIO_GPFSEL_FSELx7_SHIFT 21 -#define BCM_GPIO_GPFSEL_FSELx7_MASK (7 << BCM_GPIO_GPFSEL_FSELx7_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx7_INPUT (0 << BCM_GPIO_GPFSEL_FSELx7_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx7_OUTPUT (1 << BCM_GPIO_GPFSEL_FSELx7_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx7_ALT0 (4 << BCM_GPIO_GPFSEL_FSELx7_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx7_ALT1 (5 << BCM_GPIO_GPFSEL_FSELx7_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx7_ALT2 (6 << BCM_GPIO_GPFSEL_FSELx7_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx7_ALT3 (7 << BCM_GPIO_GPFSEL_FSELx7_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx7_ALT4 (3 << BCM_GPIO_GPFSEL_FSELx7_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx7_ALT5 (2 << BCM_GPIO_GPFSEL_FSELx7_SHIFT) -#define BCM_GPIO_GPFSEL_FSELx8_SHIFT 24 -#define BCM_GPIO_GPFSEL_FSELx8_MASK (7 << BCM_GPIO_GPFSEL_FSELx8_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx8_INPUT (0 << BCM_GPIO_GPFSEL_FSELx8_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx8_OUTPUT (1 << BCM_GPIO_GPFSEL_FSELx8_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx8_ALT0 (4 << BCM_GPIO_GPFSEL_FSELx8_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx8_ALT1 (5 << BCM_GPIO_GPFSEL_FSELx8_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx8_ALT2 (6 << BCM_GPIO_GPFSEL_FSELx8_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx8_ALT3 (7 << BCM_GPIO_GPFSEL_FSELx8_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx8_ALT4 (3 << BCM_GPIO_GPFSEL_FSELx8_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx8_ALT5 (2 << BCM_GPIO_GPFSEL_FSELx8_SHIFT) -#define BCM_GPIO_GPFSEL_FSELx9_SHIFT 27 -#define BCM_GPIO_GPFSEL_FSELx9_MASK (7 << BCM_GPIO_GPFSEL_FSELx9_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx9_INPUT (0 << BCM_GPIO_GPFSEL_FSELx9_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx9_OUTPUT (1 << BCM_GPIO_GPFSEL_FSELx9_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx9_ALT0 (4 << BCM_GPIO_GPFSEL_FSELx9_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx9_ALT1 (5 << BCM_GPIO_GPFSEL_FSELx9_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx9_ALT2 (6 << BCM_GPIO_GPFSEL_FSELx9_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx9_ALT3 (7 << BCM_GPIO_GPFSEL_FSELx9_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx9_ALT4 (3 << BCM_GPIO_GPFSEL_FSELx9_SHIFT) -# define BCM_GPIO_GPFSEL_FSELx9_ALT5 (2 << BCM_GPIO_GPFSEL_FSELx9_SHIFT) - -#define BCM_GPIO_GPSET_SET(n) (1 << ((n) & 0x1f)) -#define BCM_GPIO_GPCLR_CLR(n) (1 << ((n) & 0x1f)) -#define BCM_GPIO_GPLEV_LEV(n) (1 << ((n) & 0x1f)) -#define BCM_GPIO_GPEDS_EDS(n) (1 << ((n) & 0x1f)) -#define BCM_GPIO_GPREN_REN(n) (1 << ((n) & 0x1f)) -#define BCM_GPIO_GPFEN_FEN(n) (1 << ((n) & 0x1f)) -#define BCM_GPIO_GPHEN_HEN(n) (1 << ((n) & 0x1f)) -#define BCM_GPIO_GPLEN_LEN(n) (1 << ((n) & 0x1f)) -#define BCM_GPIO_GPAREN_AREN(n) (1 << ((n) & 0x1f)) -#define BCM_GPIO_GPAFEN_AFEN(n) (1 << ((n) & 0x1f)) - -#define BCM_GPIO_GPPUD_PUD_SHIFT 0 /* bit 0-1: Pull-up/down register */ -#define BCM_GPIO_GPPUD_PUD_MASK (3 << BCM_GPIO_GPPUD_PUD_SHIFT) -# define BCM_GPIO_GPPUD_PUD_OFF (0 << BCM_GPIO_GPPUD_PUD_SHIFT) /* Disable Pull-up/down */ -# define BCM_GPIO_GPPUD_PUD_PD (1 << BCM_GPIO_GPPUD_PUD_SHIFT) /* Enable Pull-down */ -# define BCM_GPIO_GPPUD_PUD_PU (2 << BCM_GPIO_GPPUD_PUD_SHIFT) /* Enable Pull-up */ - -#define BCM_GPIO_GPPUD_PUDCLK_SHIFT(n) ((n) & 0x1f) -# define BCM_GPIO_GPPUD_PUDCLK_MASK(n) (1 << BCM_GPIO_GPPUD_PUDCLK_SHIFT(n)) -# define BCM_GPIO_GPPUD_PUDCLK(n,v) ((uint32_t)(v) << BCM_GPIO_GPPUD_PUDCLK_SHIFT(n)) - -#endif /* __ARCH_ARM_SRC_BCM2708_CHIP_BCM2708_GPIO_H */ diff --git a/arch/arm/src/bcm2708/chip/bcm2708_irq.h b/arch/arm/src/bcm2708/chip/bcm2708_irq.h deleted file mode 100644 index 5a33e6f015..0000000000 --- a/arch/arm/src/bcm2708/chip/bcm2708_irq.h +++ /dev/null @@ -1,135 +0,0 @@ -/************************************************************************************ - * arch/arm/src/bcm2708/chip/bcm2708_irq.h - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Alan Carvalho de Assis - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -#ifndef __ARCH_ARM_SRC_BCM2708_CHIP_BCM2780_IRQ_H -#define __ARCH_ARM_SRC_BCM2708_CHIP_BCM2780_IRQ_H - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include - -#include - -#include "chip/bcm2708_memorymap.h" - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/* IRQ Register Offsets ************************************************************/ - -#define BCM_IRQ_BPR_OFFSET 0x0200 /* IRQ basic pending register */ -#define BCM_IRQ_IPR1_OFSET 0x0204 /* IRQ pending 1 register */ -#define BCM_IRQ_IPR2_OFFSET 0x0208 /* IRQ pending 2 register */ -#define BCM_IRQ_FIQC_OFFSET 0x020c /* FIQ control register */ -#define BCM_IRQ_EIR1_OFFSET 0x0210 /* Enable IRQs 1 register */ -#define BCM_IRQ_EIR2_OFFSET 0x0214 /* Enable IRQs 2 register */ -#define BCM_IRQ_EBR_OFFSET 0x0218 /* Enable Basic IRQs register */ -#define BCM_IRQ_DIR1_OFFSET 0x021c /* Disable IRQs 1 register */ -#define BCM_IRQ_DIR2_OFFSET 0x0220 /* Disable IRQs 2 register */ -#define BCM_IRQ_DBR_OFFSET 0x0224 /* Disable Basic IRQs */ - -/* IRQ Register Addresses **********************************************************/ - -#define BCM_IRQ_BPR (BCM_IRQ_OFFSET + BCM_IRQ_BPR_OFFSET) -#define BCM_IRQ_IPR1 (BCM_IRQ_OFFSET + BCM_IRQ_IPR1_OFSET) -#define BCM_IRQ_IPR2 (BCM_IRQ_OFFSET + BCM_IRQ_IPR2_OFFSET) -#define BCM_IRQ_FIQC (BCM_IRQ_OFFSET + BCM_IRQ_FIQC_OFFSET) -#define BCM_IRQ_EIR1 (BCM_IRQ_OFFSET + BCM_IRQ_EIR1_OFFSET) -#define BCM_IRQ_EIR2 (BCM_IRQ_OFFSET + BCM_IRQ_EIR2_OFFSET) -#define BCM_IRQ_EBR (BCM_IRQ_OFFSET + BCM_IRQ_EBR_OFFSET) -#define BCM_IRQ_DIR1 (BCM_IRQ_OFFSET + BCM_IRQ_DIR1_OFFSET) -#define BCM_IRQ_DIR2 (BCM_IRQ_OFFSET + BCM_IRQ_DIR2_OFFSET) -#define BCM_IRQ_DBR (BCM_IRQ_OFFSET + BCM_IRQ_DBR_OFFSET) - -/* IRQ Register Bit Definitions ****************************************************/ - -/* IRQ basic pending, IRQ pending 1, and IRQ pending 2 registers: - * (See arch/arm/include/bcm2708/irq.h) - */ - -#define IRQ_BPR_ALLINTS BPR_BIT_IRQMASK -#define IRQ_IPR1_ALLINTS IPR1_BIT_IRQMASK -#define IRQ_IPR2_ALLINTS IPR2_BIT_IRQMASK - -/* The following provide interrupt numbers that may be used with the FIQC register. - */ - -#define IPR1_IRQ_AUX_INT 29 /* Aux interrupt */ -#define IPR2_IRQ_I2C_SPI_SLV 43 /* I2C/SPI slave */ -#define IPR2_IRQ_PWA0 45 /* PWA0 */ -#define IPR2_IRQ_PWA1 46 /* PWA1 */ -#define IPR2_IRQ_SMI 48 /* SMI */ -#define IPR2_IRQ_GPIO0 49 /* GPIO interrupt 0 */ -#define IPR2_IRQ_GPIO1 50 /* GPIO interrupt 1 */ -#define IPR2_IRQ_GPIO2 51 /* GPIO interrupt 2 */ -#define IPR2_IRQ_GPIO3 52 /* GPIO interrupt 3 */ -#define IPR2_IRQ_I2C 53 /* I2C interrupt */ -#define IPR2_IRQ_SPI 54 /* SPI interrupt */ -#define IPR2_IRQ_PCM 55 /* PCM interrupt */ -#define IPR2_IRQ_UART 57 /* UART interrupt */ -#define BPR_IRQ_ARM_TIMER 64 /* ARM Timer interrupt */ -#define BPR_IRQ_ARM_MAILBOX 65 /* ARM Mailbox interrupt */ -#define BPR_IRQ_ARM_DOORBELL_0 66 /* ARM Doorbell 0 interrupt */ -#define BPR_IRQ_ARM_DOORBELL_1 67 /* ARM Doorbell 1 interrupt */ -#define BPR_IRQ_GPU0_HALTED 68 /* GPU0 Halted interrupt (or GPU1) */ -#define BPR_IRQ_GPU1_HALTED 69 /* GPU1 Halted interrupt */ -#define BPR_IRQ_ILLEGAL_ACCESS_1 70 /* Illegal access type-1 interrupt */ -#define BPR_IRQ_ILLEGAL_ACCESS_0 71 /* Illegal access type-0 interrupt */ - -/* FIQ control register */ - -#define IRQ_FIQC_SOURCE_SHIFT 0 /* Bits 0-6: FIQ source */ -#define IRQ_FIQC_SOURCE_MASK (0x3f << IRQ_FIQC_SOURCE_SHIFT) -# define IRQ_FIQC_SOURCE(n) (0x3f << IRQ_FIQC_SOURCE_SHIFT) -#define IRQ_FIQC_ENABLE (1 << 7) /* Bit 7: FIQ enable */ - -/* IRQ basic enable/disable, IRQ enable/disable 1, and IRQ enable/disable 2 - * registers: Same as the interrupt pending registers except that only bits - * 0-7 of the BPR are available (see arch/arm/include/bcm2708/irq.h). - */ - -#define IRQ_EBR_ALLINTS 0x000000ff -#define IRQ_EIR1_ALLINTS IPR1_BIT_IRQMASK -#define IRQ_EIR2_ALLINTS IPR2_BIT_IRQMASK - -#define IRQ_DBR_ALLINTS 0x000000ff -#define IRQ_DIR1_ALLINTS IPR1_BIT_IRQMASK -#define IRQ_DIR2_ALLINTS IPR2_BIT_IRQMASK - -#endif /* __ARCH_ARM_SRC_BCM2708_CHIP_BCM2780_IRQ_H */ - diff --git a/arch/arm/src/bcm2708/chip/bcm2708_memorymap.h b/arch/arm/src/bcm2708/chip/bcm2708_memorymap.h deleted file mode 100644 index 0f24db9c98..0000000000 --- a/arch/arm/src/bcm2708/chip/bcm2708_memorymap.h +++ /dev/null @@ -1,189 +0,0 @@ -/************************************************************************************ - * arch/arm/src/bcm2708/chip/bcm2708_memorymap.h - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Alan Carvalho de Assis - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -#ifndef __ARCH_ARM_SRC_BCM_CHIP_BCM_MEMORYMAP_H -#define __ARCH_ARM_SRC_BCM_CHIP_BCM_MEMORYMAP_H - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include -#include "chip.h" - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/* BCM2835 Physical (unmapped) Memory Map *******************************************/ -/* BCM2835 System 1-Mbyte aligned physical sections (PSECTIONS) */ - -#define BCM_SDRAM_PSECTION 0x00000000 /* Beginning of SDRAM section */ -#define BCM_VCSDRAM_PSECTION 0x16000000 /* The VideoCore SDRAM is part of SDRAM */ -#define BCM_PERIPH_PSECTION 0x20000000 /* Beginning of the peripheral section */ - -/* BCM2708 Peripherals PSECTION Offsets */ - -#define BCM_SYSTMR_OFFSET 0x00003000 /* System Timer peripheral */ -#define BCM_MPHI_OFFSET 0x00006000 /* Message Parallel Host Interface */ -#define BCM_DMA_OFFSET 0x00007000 /* DMA Controller */ -#define BCM_IRQ_OFFSET 0x0000b000 /* ARM interrupt register */ -#define BCM_TIMER_OFFSET 0x0000b400 /* Timer peripheral */ -#define BCM_PM_OFFSET 0x00100000 /* Power Management, Reset and Watchdog */ -#define BCM_CMGPCLK_OFFSET 0x00101070 /* Clock Manager General Purpose Clocks*/ -#define BCM_PCM_CLK_OFFSET 0x00101098 /* PCM Clock */ -#define BCM_RNG_OFFSET 0x00104000 /* Hardware RNG */ -#define BCM_GPIO_OFFSET 0x00200000 /* GPIO peripheral */ -#define BCM_PL011_OFFSET 0x00201000 /* PL011 UART peripheral */ -#define BCM_MMCI0_OFFSET 0x00202000 /* MMC0 peripheral */ -#define BCM_I2S_OFFSET 0x00203000 /* PCM/I2S audio interface */ -#define BCM_SPI0_OFFSET 0x00204000 /* Serial interface peripheral */ -#define BCM_BSC0_OFFSET 0x00205000 /* Broadcom Serial Controller 0 (BSC0) */ -#define BCM_PWM_OFFSET 0x0020c000 /* Pulse Width Modulator interface */ -#define BCM_BSCSPI_OFFSET 0x00214000 /* BSC/SPI peripheral */ -#define BCM_AUX_OFFSET 0x00215000 /* AUX/Mini-UART/SPI peripherals */ -#define BCM_EMMC_OFFSET 0x00300000 /* External Mass Media Controller */ -#define BCM_SMI_OFFSET 0x00600000 /* SMI */ -#define BCM_BSC1_OFFSET 0x00804000 /* Broadcom Serial Controller 1 (BSC1) */ -#define BCM_BSC2_OFFSET 0x00805000 /* Broadcom Serial Controller 2 (BSC2) */ -#define BCM_USB_OFFSET 0x00980000 /* USB Controller */ - -/* Sizes of memory regions in bytes. */ - -#define BCM_SDRAM_SIZE (352*1024*1024) /* 00000000-15ffffff: 352MiB RAM */ -#define BCM_VCSDRAM_SIZE (160*1024*1024) /* 16000000-1fffffff: 160MiB Video RAM*/ -#define BCM_PERIPH_SIZE (10*1024*1024) /* 20000000-209fffff: Peripherals */ - -/* Convert size in bytes to number of sections (in Mb). */ - -#define _NSECTIONS(b) (((b)+0x000fffff) >> 20) - -/* Sizes of memory regions in sections */ - -#define BCM_SDRAM_NSECTIONS _NSECTIONS(BCM_SDRAM_SIZE) -#define BCM_VCSDRAM_NSECTIONS _NSECTIONS(BCM_VCSDRAM_SIZE) -#define BCM_PERIPH_NSECTIONS _NSECTIONS(BCM_PERIPH_SIZE) - -/* Section MMU Flags - * - * SDRAM is a special case because it requires non-cached access of its - * initial configuration, then cached access thereafter. - */ - -#define BCM_SDRAM_MMUFLAGS MMU_MEMFLAGS -#define BCM_VCRAM_MMUFLAGS MMU_IOFLAGS -#define BCM_PERIPH_MMUFLAGS MMU_IOFLAGS - -/* BCM2835 System 1-Mbyte aligned virtual sections (VSECTIONS). */ - -#ifdef CONFIG_ARCH_ROMPGTABLE -# error This configuration does not support a ROM page table -#endif - -#define BCM_SDRAM_VSECTION 0x00000000 /* Virtual section of the SDRAM */ -#define BCM_VCSDRAM_VSECTION 0x16000000 /* Virtual section of the GPU RAM: 160MiB */ -#define BCM_PERIPH_VSECTION 0xf2000000 /* Virtual section of the peripherals */ - -/* BCM2708 Peripherals Virtual Base Addresses */ - -#define BCM_SYSTMR_VBASE (BCM_PERIPH_VSECTION + BCM_SYSTMR_OFFSET) -#define BCM_MPHI_VBASE (BCM_PERIPH_VSECTION + BCM_MPHI_OFFSET) -#define BCM_DMA_VBASE (BCM_PERIPH_VSECTION + BCM_DMA_OFFSET) -#define BCM_IRQ_VBASE (BCM_PERIPH_VSECTION + BCM_IRQ_OFFSET) -#define BCM_TIMER_VBASE (BCM_PERIPH_VSECTION + BCM_TIMER_OFFSET) -#define BCM_PM_VBASE (BCM_PERIPH_VSECTION + BCM_PM_OFFSET) -#define BCM_CMGPCLK_VBASE (BCM_PERIPH_VSECTION + BCM_CMGPCLK_OFFSET) -#define BCM_PCM_CLK_VBASE (BCM_PERIPH_VSECTION + BCM_PCM_CLK_OFFSET) -#define BCM_RNG_VBASE (BCM_PERIPH_VSECTION + BCM_RNG_OFFSET) -#define BCM_GPIO_VBASE (BCM_PERIPH_VSECTION + BCM_GPIO_OFFSET) -#define BCM_PL011_VBASE (BCM_PERIPH_VSECTION + BCM_PL011_OFFSET) -#define BCM_MMCI0_VBASE (BCM_PERIPH_VSECTION + BCM_MMCI0_OFFSET) -#define BCM_I2S_VBASE (BCM_PERIPH_VSECTION + BCM_I2S_OFFSET) -#define BCM_SPI0_VBASE (BCM_PERIPH_VSECTION + BCM_SPI0_OFFSET) -#define BCM_BSC0_VBASE (BCM_PERIPH_VSECTION + BCM_BSC0_OFFSET) -#define BCM_PWM_VBASE (BCM_PERIPH_VSECTION + BCM_PWM_OFFSET) -#define BCM_BSCSPI_VBASE (BCM_PERIPH_VSECTION + BCM_BSCSPI_OFFSET) -#define BCM_AUX_VBASE (BCM_PERIPH_VSECTION + BCM_AUX_OFFSET) -#define BCM_EMMC_VBASE (BCM_PERIPH_VSECTION + BCM_EMMC_OFFSET) -#define BCM_SMI_VBASE (BCM_PERIPH_VSECTION + BCM_SMI_OFFSET) -#define BCM_BSC1_VBASE (BCM_PERIPH_VSECTION + BCM_BSC1_OFFSET) -#define BCM_BSC2_VBASE (BCM_PERIPH_VSECTION + BCM_BSC2_OFFSET) -#define BCM_USB_VBASE (BCM_PERIPH_VSECTION + BCM_USB_OFFSET) - -/* Vector table: - * - * BCM_VECTOR_PADDR - Unmapped, physical address of vector table in SDRAM - * BCM_VECTOR_VSDRAM - Virtual address of vector table in SDRAM - * BCM_VECTOR_VADDR - Virtual address of vector table (must be 0x00000000) - * - * NOTE: Vectors in hight memory are not supported. - */ - -#ifndef CONFIG_ARCH_LOWVECTORS -# errno CONFIG_ARCH_LOWVECTORS is required for this memory configuration. -#endif - -#define VECTOR_TABLE_SIZE 0x00004000 -#define BCM_VECTOR_PADDR BCM_SDRAM_PSECTION -#define BCM_VECTOR_VSDRAM BCM_SDRAM_VSECTION -#define BCM_VECTOR_VADDR 0x00000000 -#define BCM_VECTOR_VCOARSE 0x00000000 - -/* Page Table. The page table immediately follows the vector table. .text - * should then be positioned after the page table. - * - * The L1 page table must be on a physical address that is 16KiB aligned. - * This is assured by the value of VECTOR_TABLE_SIZE. The size of the L1 - * page table is also 16KiB: 16KiB / (4bytes/entry) * 1MB gives a 4GB - * address space. - */ - -#define PGTABLE_BASE_PADDR (BCM_VECTOR_PADDR + VECTOR_TABLE_SIZE) -#define PGTABLE_BASE_VADDR (BCM_VECTOR_VADDR + VECTOR_TABLE_SIZE) - -/* The boot logic will create a temporarily mapping based on where NuttX is - * executing in memory. In this case, there is support only for NuttX - * running from SDRAM. NuttX is assumed to be positioned by the linker - * script to lie immediately following the L1 page table. - */ - -#if defined(CONFIG_BOOT_RUNFROMSDRAM) -# define NUTTX_START_VADDR (PGTABLE_BASE_VADDR + PGTABLE_SIZE) -# define NUTTX_START_PADDR (PGTABLE_BASE_PADDR + PGTABLE_SIZE) -#else -# error Unsupported boot memory -#endif - -#endif /* __ARCH_ARM_SRC_BCM_CHIP_BCM_MEMORYMAP_H */ diff --git a/arch/arm/src/bcm2708/chip/bcm2708_pinmap.h b/arch/arm/src/bcm2708/chip/bcm2708_pinmap.h deleted file mode 100644 index 6761b91d65..0000000000 --- a/arch/arm/src/bcm2708/chip/bcm2708_pinmap.h +++ /dev/null @@ -1,217 +0,0 @@ -/**************************************************************************** - * arch/arm/src/bcm2708/bcm2708_pinmap.h - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -#ifndef __ARCH_ARM_SRC_BCM2708_CHIP_BCM2708_PINMAP_H -#define __ARCH_ARM_SRC_BCM2708_CHIP_BCM2708_PINMAP_H 1 - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -#define GPIO_ARM_RTCK (GPIO_PIN23 | GPIO_PUD_PULLDOWN | GPIO_ALT4) -#define GPIO_ARM_RTCK (GPIO_PIN6 | GPIO_PUD_PULLUP | GPIO_ALT5) -#define GPIO_ARM_TCK (GPIO_PIN13 | GPIO_PUD_PULLDOWN | GPIO_ALT5) -#define GPIO_ARM_TCK (GPIO_PIN25 | GPIO_PUD_PULLDOWN | GPIO_ALT4) -#define GPIO_ARM_TDI (GPIO_PIN26 | GPIO_PUD_PULLDOWN | GPIO_ALT4) -#define GPIO_ARM_TDI (GPIO_PIN4 | GPIO_PUD_PULLUP | GPIO_ALT5) -#define GPIO_ARM_TDO (GPIO_PIN24 | GPIO_PUD_PULLDOWN | GPIO_ALT4) -#define GPIO_ARM_TDO (GPIO_PIN5 | GPIO_PUD_PULLUP | GPIO_ALT5) -#define GPIO_ARM_TMS (GPIO_PIN12 | GPIO_PUD_PULLDOWN | GPIO_ALT5) -#define GPIO_ARM_TMS (GPIO_PIN27 | GPIO_PUD_PULLDOWN | GPIO_ALT4) -#define GPIO_ARM_TRST (GPIO_PIN22 | GPIO_PUD_PULLDOWN | GPIO_ALT4) - -#define GPIO_BSCSL (GPIO_PIN20 | GPIO_PUD_PULLDOWN | GPIO_ALT3) -#define GPIO_BSCSL (GPIO_PIN21 | GPIO_PUD_PULLDOWN | GPIO_ALT3) -#define GPIO_BSCSL_SCL (GPIO_PIN19 | GPIO_PUD_PULLDOWN | GPIO_ALT3) -#define GPIO_BSCSL_SDA (GPIO_PIN18 | GPIO_PUD_PULLDOWN | GPIO_ALT3) -#define GPIO_MISO (GPIO_PIN20 | GPIO_PUD_PULLDOWN | GPIO_ALT3) -#define GPIO_MOSI (GPIO_PIN18 | GPIO_PUD_PULLDOWN | GPIO_ALT3) -#define GPIO_SCL0 (GPIO_PIN1 | GPIO_PUD_PULLUP | GPIO_ALT0) -#define GPIO_SCL0 (GPIO_PIN29 | GPIO_ALT0) -#define GPIO_SCL0 (GPIO_PIN45 | GPIO_ALT1) -#define GPIO_SCL1 (GPIO_PIN3 | GPIO_PUD_PULLUP | GPIO_ALT0) -#define GPIO_SCL1 (GPIO_PIN45 | GPIO_ALT2) -#define GPIO_SCLK (GPIO_PIN19 | GPIO_PUD_PULLDOWN | GPIO_ALT3) - -#define GPIO_CE_N (GPIO_PIN21 | GPIO_PUD_PULLDOWN | GPIO_ALT3) - -#define GPIO_CTS0 (GPIO_PIN16 | GPIO_PUD_PULLDOWN | GPIO_ALT3) -#define GPIO_CTS0 (GPIO_PIN30 | GPIO_PUD_PULLDOWN | GPIO_ALT3) -#define GPIO_CTS0 (GPIO_PIN39 | GPIO_PUD_PULLDOWN | GPIO_ALT2) -#define GPIO_CTS1 (GPIO_PIN16 | GPIO_PUD_PULLDOWN | GPIO_ALT5) -#define GPIO_CTS1 (GPIO_PIN30 | GPIO_PUD_PULLDOWN | GPIO_ALT5) -#define GPIO_CTS1 (GPIO_PIN43 | GPIO_PUD_PULLDOWN | GPIO_ALT5) - -#define GPIO_GPCLK0 (GPIO_PIN20 | GPIO_PUD_PULLDOWN | GPIO_ALT5) -#define GPIO_GPCLK0 (GPIO_PIN32 | GPIO_PUD_PULLDOWN | GPIO_ALT0) -#define GPIO_GPCLK0 (GPIO_PIN34 | GPIO_PUD_PULLUP | GPIO_ALT0) -#define GPIO_GPCLK0 (GPIO_PIN4 | GPIO_PUD_PULLUP | GPIO_ALT0) -#define GPIO_GPCLK1 (GPIO_PIN21 | GPIO_PUD_PULLDOWN | GPIO_ALT5) -#define GPIO_GPCLK1 (GPIO_PIN42 | GPIO_PUD_PULLDOWN | GPIO_ALT0) -#define GPIO_GPCLK1 (GPIO_PIN44 | GPIO_ALT0) -#define GPIO_GPCLK1 (GPIO_PIN5 | GPIO_PUD_PULLUP | GPIO_ALT0) -#define GPIO_GPCLK2 (GPIO_PIN43 | GPIO_PUD_PULLDOWN | GPIO_ALT0) -#define GPIO_GPCLK2 (GPIO_PIN6 | GPIO_PUD_PULLUP | GPIO_ALT0) - -#define GPIO_PCM_CLK (GPIO_PIN18 | GPIO_PUD_PULLDOWN | GPIO_ALT0) -#define GPIO_PCM_CLK (GPIO_PIN28 | GPIO_ALT2) -#define GPIO_PCM_DIN (GPIO_PIN20 | GPIO_PUD_PULLDOWN | GPIO_ALT0) -#define GPIO_PCM_DIN (GPIO_PIN30 | GPIO_PUD_PULLDOWN | GPIO_ALT2) -#define GPIO_PCM_DOUT (GPIO_PIN21 | GPIO_PUD_PULLDOWN | GPIO_ALT0) -#define GPIO_PCM_DOUT (GPIO_PIN31 | GPIO_PUD_PULLDOWN | GPIO_ALT2) -#define GPIO_PCM_FS (GPIO_PIN19 | GPIO_PUD_PULLDOWN | GPIO_ALT0) -#define GPIO_PCM_FS (GPIO_PIN29 | GPIO_ALT2) - -#define GPIO_PWM0 (GPIO_PIN12 | GPIO_PUD_PULLDOWN | GPIO_ALT0) -#define GPIO_PWM0 (GPIO_PIN18 | GPIO_PUD_PULLDOWN | GPIO_ALT5) -#define GPIO_PWM0 (GPIO_PIN40 | GPIO_PUD_PULLDOWN | GPIO_ALT0) -#define GPIO_PWM1 (GPIO_PIN13 | GPIO_PUD_PULLDOWN | GPIO_ALT0) -#define GPIO_PWM1 (GPIO_PIN19 | GPIO_PUD_PULLDOWN | GPIO_ALT5) -#define GPIO_PWM1 (GPIO_PIN41 | GPIO_PUD_PULLDOWN | GPIO_ALT0) -#define GPIO_PWM1 (GPIO_PIN45 | GPIO_ALT0) - -#define GPIO_RTS0 (GPIO_PIN17 | GPIO_PUD_PULLDOWN | GPIO_ALT3) -#define GPIO_RTS0 (GPIO_PIN31 | GPIO_PUD_PULLDOWN | GPIO_ALT3) -#define GPIO_RTS0 (GPIO_PIN38 | GPIO_PUD_PULLDOWN | GPIO_ALT2) -#define GPIO_RTS1 (GPIO_PIN17 | GPIO_PUD_PULLDOWN | GPIO_ALT5) -#define GPIO_RTS1 (GPIO_PIN31 | GPIO_PUD_PULLDOWN | GPIO_ALT5) -#define GPIO_RTS1 (GPIO_PIN42 | GPIO_PUD_PULLDOWN | GPIO_ALT5) - -#define GPIO_SA0 (GPIO_PIN33 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SA0 (GPIO_PIN5 | GPIO_PUD_PULLUP | GPIO_ALT1) -#define GPIO_SA1 (GPIO_PIN32 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SA1 (GPIO_PIN4 | GPIO_PUD_PULLUP | GPIO_ALT1) -#define GPIO_SA2 (GPIO_PIN3 | GPIO_PUD_PULLUP | GPIO_ALT1) -#define GPIO_SA2 (GPIO_PIN31 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SA3 (GPIO_PIN2 | GPIO_PUD_PULLUP | GPIO_ALT1) -#define GPIO_SA3 (GPIO_PIN30 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SA4 (GPIO_PIN1 | GPIO_PUD_PULLUP | GPIO_ALT1) -#define GPIO_SA4 (GPIO_PIN29 | GPIO_ALT1) -#define GPIO_SA5 (GPIO_PIN0 | GPIO_PUD_PULLUP | GPIO_ALT1) -#define GPIO_SA5 (GPIO_PIN28 | GPIO_ALT1) - -#define GPIO_SD0 (GPIO_PIN36 | GPIO_PUD_PULLUP | GPIO_ALT1) -#define GPIO_SD0 (GPIO_PIN8 | GPIO_PUD_PULLUP | GPIO_ALT1) -#define GPIO_SD1 (GPIO_PIN37 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SD1 (GPIO_PIN9 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SD1_CLK (GPIO_PIN22 | GPIO_PUD_PULLDOWN | GPIO_ALT3) -#define GPIO_SD1_CMD (GPIO_PIN23 | GPIO_PUD_PULLDOWN | GPIO_ALT3) -#define GPIO_SD1_DAT0 (GPIO_PIN24 | GPIO_PUD_PULLDOWN | GPIO_ALT3) -#define GPIO_SD1_DAT1 (GPIO_PIN25 | GPIO_PUD_PULLDOWN | GPIO_ALT3) -#define GPIO_SD1_DAT2 (GPIO_PIN26 | GPIO_PUD_PULLDOWN | GPIO_ALT3) -#define GPIO_SD1_DAT3 (GPIO_PIN27 | GPIO_PUD_PULLDOWN | GPIO_ALT3) -#define GPIO_SD2 (GPIO_PIN10 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SD2 (GPIO_PIN38 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SD3 (GPIO_PIN11 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SD3 (GPIO_PIN39 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SD4 (GPIO_PIN12 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SD4 (GPIO_PIN40 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SD5 (GPIO_PIN13 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SD5 (GPIO_PIN41 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SD6 (GPIO_PIN14 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SD6 (GPIO_PIN42 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SD7 (GPIO_PIN15 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SD7 (GPIO_PIN43 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SD8 (GPIO_PIN16 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SD9 (GPIO_PIN17 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SD10 (GPIO_PIN18 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SD11 (GPIO_PIN19 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SD12 (GPIO_PIN20 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SD13 (GPIO_PIN21 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SD14 (GPIO_PIN22 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SD15 (GPIO_PIN23 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SD16 (GPIO_PIN24 | GPIO_PUD_PULLDOWN | GPIO_ALT1) -#define GPIO_SD17 (GPIO_PIN25 | GPIO_PUD_PULLDOWN | GPIO_ALT1) - -#define GPIO_SDA0 (GPIO_PIN0 | GPIO_PUD_PULLUP | GPIO_ALT0) -#define GPIO_SDA0 (GPIO_PIN28 | GPIO_ALT0) -#define GPIO_SDA0 (GPIO_PIN44 | GPIO_ALT1) -#define GPIO_SDA1 (GPIO_PIN2 | GPIO_PUD_PULLUP | GPIO_ALT0) -#define GPIO_SDA1 (GPIO_PIN44 | GPIO_ALT2) - -#define GPIO_SE (GPIO_PIN34 | GPIO_PUD_PULLUP | GPIO_ALT1) -#define GPIO_SE (GPIO_PIN6 | GPIO_PUD_PULLUP | GPIO_ALT1) -#define GPIO_SOE_N (GPIO_PIN34 | GPIO_PUD_PULLUP | GPIO_ALT1) -#define GPIO_SOE_N (GPIO_PIN6 | GPIO_PUD_PULLUP | GPIO_ALT1) - -#define GPIO_SPI0_CE0_N (GPIO_PIN36 | GPIO_PUD_PULLUP | GPIO_ALT0) -#define GPIO_SPI0_CE0_N (GPIO_PIN8 | GPIO_PUD_PULLUP | GPIO_ALT0) -#define GPIO_SPI0_CE1_N (GPIO_PIN35 | GPIO_PUD_PULLUP | GPIO_ALT0) -#define GPIO_SPI0_CE1_N (GPIO_PIN7 | GPIO_PUD_PULLUP | GPIO_ALT0) -#define GPIO_SPI0_MISO (GPIO_PIN37 | GPIO_PUD_PULLDOWN | GPIO_ALT0) -#define GPIO_SPI0_MISO (GPIO_PIN9 | GPIO_PUD_PULLDOWN | GPIO_ALT0) -#define GPIO_SPI0_MOSI (GPIO_PIN10 | GPIO_PUD_PULLDOWN | GPIO_ALT0) -#define GPIO_SPI0_MOSI (GPIO_PIN38 | GPIO_PUD_PULLDOWN | GPIO_ALT0) -#define GPIO_SPI0_SCLK (GPIO_PIN11 | GPIO_PUD_PULLDOWN | GPIO_ALT0) -#define GPIO_SPI0_SCLK (GPIO_PIN39 | GPIO_PUD_PULLDOWN | GPIO_ALT0) -#define GPIO_SPI1_CE0_N (GPIO_PIN18 | GPIO_PUD_PULLDOWN | GPIO_ALT4) -#define GPIO_SPI1_CE1_N (GPIO_PIN17 | GPIO_PUD_PULLDOWN | GPIO_ALT4) -#define GPIO_SPI1_CE2_N (GPIO_PIN16 | GPIO_PUD_PULLDOWN | GPIO_ALT4) -#define GPIO_SPI1_MISO (GPIO_PIN19 | GPIO_PUD_PULLDOWN | GPIO_ALT4) -#define GPIO_SPI1_MOSI (GPIO_PIN20 | GPIO_PUD_PULLDOWN | GPIO_ALT4) -#define GPIO_SPI1_SCLK (GPIO_PIN21 | GPIO_PUD_PULLDOWN | GPIO_ALT4) -#define GPIO_SPI2_CE0_N (GPIO_PIN43 | GPIO_PUD_PULLDOWN | GPIO_ALT4) -#define GPIO_SPI2_CE1_N (GPIO_PIN44 | GPIO_ALT4) -#define GPIO_SPI2_CE2_N (GPIO_PIN45 | GPIO_ALT4) -#define GPIO_SPI2_MISO (GPIO_PIN40 | GPIO_PUD_PULLDOWN | GPIO_ALT4) -#define GPIO_SPI2_MOSI (GPIO_PIN41 | GPIO_PUD_PULLDOWN | GPIO_ALT4) -#define GPIO_SPI2_SCLK (GPIO_PIN42 | GPIO_PUD_PULLDOWN | GPIO_ALT4) - -#define GPIO_SRW_N (GPIO_PIN35 | GPIO_PUD_PULLUP | GPIO_ALT1) -#define GPIO_SRW_N (GPIO_PIN7 | GPIO_PUD_PULLUP | GPIO_ALT1) -#define GPIO_SWE_N (GPIO_PIN35 | GPIO_PUD_PULLUP | GPIO_ALT1) -#define GPIO_SWE_N (GPIO_PIN7 | GPIO_PUD_PULLUP | GPIO_ALT1) - -#define GPIO_RXD0 (GPIO_PIN15 | GPIO_PUD_PULLDOWN | GPIO_ALT0) -#define GPIO_RXD0 (GPIO_PIN33 | GPIO_PUD_PULLDOWN | GPIO_ALT3) -#define GPIO_RXD0 (GPIO_PIN37 | GPIO_PUD_PULLDOWN | GPIO_ALT2) -#define GPIO_RXD1 (GPIO_PIN15 | GPIO_PUD_PULLDOWN | GPIO_ALT5) -#define GPIO_RXD1 (GPIO_PIN33 | GPIO_PUD_PULLDOWN | GPIO_ALT5) -#define GPIO_RXD1 (GPIO_PIN41 | GPIO_PUD_PULLDOWN | GPIO_ALT5) - -#define GPIO_TXD0 (GPIO_PIN14 | GPIO_PUD_PULLDOWN | GPIO_ALT0) -#define GPIO_TXD0 (GPIO_PIN32 | GPIO_PUD_PULLDOWN | GPIO_ALT3) -#define GPIO_TXD0 (GPIO_PIN36 | GPIO_PUD_PULLUP | GPIO_ALT2) -#define GPIO_TXD1 (GPIO_PIN14 | GPIO_PUD_PULLDOWN | GPIO_ALT5) -#define GPIO_TXD1 (GPIO_PIN32 | GPIO_PUD_PULLDOWN | GPIO_ALT5) -#define GPIO_TXD1 (GPIO_PIN40 | GPIO_PUD_PULLDOWN | GPIO_ALT5) - -#endif /* __ARCH_ARM_SRC_BCM2708_CHIP_BCM2708_PINMAP_H */ diff --git a/arch/arm/src/bcm2708/chip/bcm2708_systimr.h b/arch/arm/src/bcm2708/chip/bcm2708_systimr.h deleted file mode 100644 index ff3af4f78f..0000000000 --- a/arch/arm/src/bcm2708/chip/bcm2708_systimr.h +++ /dev/null @@ -1,88 +0,0 @@ -/************************************************************************************ - * arch/arm/src/bcm2708/chip/bcm2708_systimr.h - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Alan Carvalho de Assis - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -#ifndef __ARCH_ARM_SRC_BCM2708_CHIP_BCM2780_SYSTIMR_H -#define __ARCH_ARM_SRC_BCM2708_CHIP_BCM2780_SYSTIMR_H - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include - -#include "chip/bcm2708_memorymap.h" - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/* System Tmer Register Offsets *****************************************************/ - -#define BCM_SYSTIMR_C_OFFSET 0x0000 /* System Timer Control/Status */ -#define BCM_SYSTIMR_CLO_OFFSET 0x0004 /* System Timer Counter Lower 32 bits */ -#define BCM_SYSTIMR_CHI_OFFSET 0x0008 /* System Timer Counter Higher 32 bits */ -#define BCM_SYSTIMR_C0_OFFSET 0x000c /* System Timer Compare 0 */ -#define BCM_SYSTIMR_C1_OFFSET 0x0010 /* System Timer Compare 1 */ -#define BCM_SYSTIMR_C2_OFFSET 0x0014 /* System Timer Compare 2 */ -#define BCM_SYSTIMR_C3_OFFSET 0x0018 /* System Timer Compare 3 */ - -/* System Tmer Register Addresses ***************************************************/ - -#define BCM_SYSTIMR_C (BCM_SYSTMR_VBASE+BCM_SYSTIMR_C_OFFSET) -#define BCM_SYSTIMR_CLO (BCM_SYSTMR_VBASE+BCM_SYSTIMR_CLO_OFFSET) -#define BCM_SYSTIMR_CHI (BCM_SYSTMR_VBASE+BCM_SYSTIMR_CHI_OFFSET) -#define BCM_SYSTIMR_C0 (BCM_SYSTMR_VBASE+BCM_SYSTIMR_C0_OFFSET) -#define BCM_SYSTIMR_C1 (BCM_SYSTMR_VBASE+BCM_SYSTIMR_C1_OFFSET) -#define BCM_SYSTIMR_C2 (BCM_SYSTMR_VBASE+BCM_SYSTIMR_C2_OFFSET) -#define BCM_SYSTIMR_C3 (BCM_SYSTMR_VBASE+BCM_SYSTIMR_C3_OFFSET) - -/* System Tmer Register Bit Definitions ****************************************************/ - -/* System Timer Control/Status */ - -#define SYSTIMR_C_M0 (1 << 0) /* Bit nn: System Timer Match 0 */ -#define SYSTIMR_C_M1 (1 << 1) /* Bit nn: System Timer Match 1 */ -#define SYSTIMR_C_M2 (1 << 2) /* Bit nn: System Timer Match 2 */ -#define SYSTIMR_C_M3 (1 << 3) /* Bit nn: System Timer Match 3 */ - -/* System Timer Counter Lower 32 bits (32 bit counter value) */ -/* System Timer Counter Higher 32 bits (32 bit counter value) */ - -/* System Timer Compare 0 (32 bit compare value) */ -/* System Timer Compare 1 (32 bit compare value) */ -/* System Timer Compare 2 (32 bit compare value) */ -/* System Timer Compare 3 (32 bit compare value) */ - -#endif /* __ARCH_ARM_SRC_BCM2708_CHIP_BCM2780_SYSTIMR_H */