Add a rudimentary arch/arm/src/imx6 directory for the i.MX6 family
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@ -14,8 +14,6 @@ config ARCH_CHIP_A1X
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bool "Allwinner A1X"
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select ARCH_CORTEXA8
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select ARCH_HAVE_FPU
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select ARCH_HAVE_MMU
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select ARCH_USE_MMU
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select ARCH_HAVE_IRQPRIO
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select ARCH_HAVE_LOWVECTORS
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select ARCH_HAVE_SDRAM
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@ -58,15 +56,28 @@ config ARCH_CHIP_EFM32
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Energy Micro EFM32 microcontrollers (ARM Cortex-M).
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config ARCH_CHIP_IMX1
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bool "Freescale iMX.1"
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bool "NXP/Freescale iMX.1"
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select ARCH_ARM920T
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select ARCH_HAVE_HEAP2
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select ARCH_HAVE_LOWVECTORS
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---help---
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Freescale iMX.1 architectures (ARM920T)
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config ARCH_CHIP_IMX6
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bool "NXP/Freescale iMX.6"
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select ARCH_CORTEXA9
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select ARCH_HAVE_FPU
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select ARCH_HAVE_LOWVECTORS
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select ARCH_HAVE_SDRAM
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select BOOT_RUNFROMSDRAM
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select ARCH_HAVE_ADDRENV
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select ARCH_NEED_ADDRENV_MAPPING
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depends on EXPERIMENTAL
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---help---
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Freescale iMX.6 architectures (Cortex-A9)
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config ARCH_CHIP_KINETIS
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bool "Freescale Kinetis"
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bool "NXP/Freescale Kinetis"
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select ARCH_CORTEXM4
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select ARCH_HAVE_MPU
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select ARM_HAVE_MPU_UNIFIED
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@ -76,7 +87,7 @@ config ARCH_CHIP_KINETIS
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Freescale Kinetis Architectures (ARM Cortex-M4)
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config ARCH_CHIP_KL
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bool "Freescale Kinetis L"
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bool "NXP/Freescale Kinetis L"
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select ARCH_CORTEXM0
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select ARCH_HAVE_CMNVECTOR
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---help---
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@ -316,6 +327,13 @@ config ARCH_CORTEXA8
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select ARCH_USE_MMU
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select ARCH_HAVE_COHERENT_DCACHE if ELF || MODULE
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config ARCH_CORTEXA9
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bool
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default n
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select ARCH_HAVE_MMU
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select ARCH_USE_MMU
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select ARCH_HAVE_COHERENT_DCACHE if ELF || MODULE
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config ARCH_CORTEXR4
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bool
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default n
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@ -359,7 +377,7 @@ config ARCH_FAMILY
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string
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default "arm" if ARCH_ARM7TDMI || ARCH_ARM926EJS || ARCH_ARM920T
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default "armv6-m" if ARCH_CORTEXM0
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default "armv7-a" if ARCH_CORTEXA5 || ARCH_CORTEXA8
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default "armv7-a" if ARCH_CORTEXA5 || ARCH_CORTEXA8 || ARCH_CORTEXA9
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default "armv7-m" if ARCH_CORTEXM3 || ARCH_CORTEXM4 || ARCH_CORTEXM7
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default "armv7-r" if ARCH_CORTEXR4 || ARCH_CORTEXR4F || ARCH_CORTEXR5 || ARCH_CORTEXR5F || ARCH_CORTEX74 || ARCH_CORTEXR7F
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@ -371,6 +389,7 @@ config ARCH_CHIP
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default "dm320" if ARCH_CHIP_DM320
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default "efm32" if ARCH_CHIP_EFM32
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default "imx1" if ARCH_CHIP_IMX1
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default "imx6" if ARCH_CHIP_IMX6
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default "kinetis" if ARCH_CHIP_KINETIS
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default "kl" if ARCH_CHIP_KL
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default "tiva" if ARCH_CHIP_LM || ARCH_CHIP_TIVA
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@ -527,7 +546,7 @@ config DEBUG_HARDFAULT
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if ARCH_CORTEXM0
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source arch/arm/src/armv6-m/Kconfig
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endif
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if ARCH_CORTEXA5 || ARCH_CORTEXA8
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if ARCH_CORTEXA5 || ARCH_CORTEXA8 || ARCH_CORTEXA9
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source arch/arm/src/armv7-a/Kconfig
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endif
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if ARCH_CORTEXM3 || ARCH_CORTEXM4 || ARCH_CORTEXM7
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@ -557,6 +576,9 @@ endif
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if ARCH_CHIP_IMX1
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source arch/arm/src/imx1/Kconfig
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endif
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if ARCH_CHIP_IMX6
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source arch/arm/src/imx6/Kconfig
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endif
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if ARCH_CHIP_KINETIS
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source arch/arm/src/kinetis/Kconfig
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endif
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@ -20,7 +20,7 @@ config IMX1_UART2
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select ARCH_HAVE_UART2
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config IMX1_UART3
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bool "UART2"
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bool "UART3"
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default n
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select ARCH_HAVE_UART3
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48
arch/arm/src/imx6/Kconfig
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48
arch/arm/src/imx6/Kconfig
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@ -0,0 +1,48 @@
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#
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# For a description of the syntax of this configuration file,
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# see the file kconfig-language.txt in the NuttX tools repository.
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#
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if ARCH_CHIP_IMX6
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# choice "iMX.6 Chip Selection"
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menu "iMX.6 Peripheral Selection"
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config IMX6_UART1
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bool "UART1"
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default n
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select ARCH_HAVE_UART1
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config IMX6_UART2
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bool "UART2"
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default n
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select ARCH_HAVE_UART2
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config IMX6_UART3
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bool "UART3"
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default n
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select ARCH_HAVE_UART3
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config IMX6_UART4
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bool "UART4"
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default n
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select ARCH_HAVE_UART3
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config IMX6_UART5
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bool "UART5"
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default n
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select ARCH_HAVE_UART3
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config IMX6_SPI1
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bool "SPI1"
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default n
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select SPI
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config IMX6_SPI2
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bool "SPI2"
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default n
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select SPI
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endmenu # iMX Peripheral Selection
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endif # ARCH_CHIP_IMX6
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135
arch/arm/src/imx6/Make.defs
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135
arch/arm/src/imx6/Make.defs
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@ -0,0 +1,135 @@
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############################################################################
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# arch/arm/imx6/Make.defs
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#
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# Copyright (C) 2016 Gregory Nutt. All rights reserved.
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# Author: Gregory Nutt <gnutt@nuttx.org>
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in
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# the documentation and/or other materials provided with the
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# distribution.
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# 3. Neither the name Gregory Nutt nor the names of its contributors may be
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# used to endorse or promote products derived from this software
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# without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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#
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############################################################################
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# The vector table is the "head" object, i.e., the one that must forced into
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# the link in order to draw in all of the other components
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HEAD_ASRC = arm_vectortab.S
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ifeq ($(CONFIG_BUILD_KERNEL),y)
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STARTUP_OBJS = crt0$(OBJEXT)
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endif
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# Force the start-up logic to be at the beginning of the .text to simplify
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# debug.
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ifeq ($(CONFIG_PAGING),y)
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CMN_ASRCS = arm_pghead.S
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else
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CMN_ASRCS = arm_head.S
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endif
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# Common assembly language files
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CMN_ASRCS += arm_vectors.S arm_fpuconfig.S arm_fullcontextrestore.S
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CMN_ASRCS += arm_saveusercontext.S arm_vectoraddrexcptn.S arm_vfork.S
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CMN_ASRCS += arm_testset.S
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CMN_ASRCS += cp15_coherent_dcache.S cp15_invalidate_dcache.S
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CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S cp15_invalidate_dcache_all.S
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ifeq ($(CONFIG_ARCH_MEMCPY),y)
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CMN_ASRCS += arm_memcpy.S
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endif
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# Common C source files
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CMN_CSRCS = up_initialize.c up_idle.c up_interruptcontext.c up_exit.c
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CMN_CSRCS += up_createstack.c up_releasestack.c up_usestack.c up_vfork.c
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CMN_CSRCS += up_puts.c up_mdelay.c up_stackframe.c up_udelay.c
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CMN_CSRCS += up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
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CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_dataabort.c
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CMN_CSRCS += arm_doirq.c arm_initialstate.c arm_mmu.c arm_prefetchabort.c
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CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c
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CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c
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# Use common heap allocation for now (may need to be customized later)
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CMN_CSRCS += up_allocateheap.c
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# Configuration dependent C and assembly language files
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ifeq ($(CONFIG_PAGING),y)
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CMN_CSRCS += arm_allocpage.c arm_checkmapping.c arm_pginitialize.c
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CMN_CSRCS += arm_va2pte.c
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endif
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ifeq ($(CONFIG_BUILD_KERNEL),y)
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CMN_CSRCS += up_task_start.c up_pthread_start.c arm_signal_dispatch.c
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endif
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ifeq ($(CONFIG_ARCH_ADDRENV),y)
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CMN_CSRCS += arm_addrenv.c arm_addrenv_utils.c arm_pgalloc.c
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ifeq ($(CONFIG_ARCH_STACK_DYNAMIC),y)
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CMN_CSRCS += arm_addrenv_ustack.c
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endif
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ifeq ($(CONFIG_ARCH_KERNEL_STACK),y)
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CMN_CSRCS += arm_addrenv_kstack.c
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endif
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ifeq ($(CONFIG_MM_SHM),y)
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CMN_CSRCS += arm_addrenv_shm.c
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endif
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endif
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ifeq ($(CONFIG_MM_PGALLOC),y)
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CMN_CSRCS += arm_physpgaddr.c
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ifeq ($(CONFIG_ARCH_PGPOOL_MAPPING),y)
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CMN_CSRCS += arm_virtpgaddr.c
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endif
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endif
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ifeq ($(CONFIG_ELF),y)
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CMN_CSRCS += arm_elf.c arm_coherent_dcache.c
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else ifeq ($(CONFIG_MODULE),y)
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CMN_CSRCS += arm_elf.c arm_coherent_dcache.c
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endif
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ifeq ($(CONFIG_ARCH_FPU),y)
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CMN_ASRCS += arm_savefpu.S arm_restorefpu.S
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CMN_CSRCS += arm_copyarmstate.c
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endif
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ifeq ($(CONFIG_STACK_COLORATION),y)
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CMN_CSRCS += up_checkstack.c
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endif
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# i.MX6-specific assembly language files
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CHIP_ASRCS =
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# i.MX6-specific C source files
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CHIP_CSRCS =
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