Add a rudimentary arch/arm/src/imx6 directory for the i.MX6 family

arch/arm/Kconfig

@@ -14,8 +14,6 @@ config ARCH_CHIP_A1X
 	bool "Allwinner A1X"
 	select ARCH_CORTEXA8
 	select ARCH_HAVE_FPU
-	select ARCH_HAVE_MMU
-	select ARCH_USE_MMU
 	select ARCH_HAVE_IRQPRIO
 	select ARCH_HAVE_LOWVECTORS
 	select ARCH_HAVE_SDRAM
@@ -58,15 +56,28 @@ config ARCH_CHIP_EFM32
 		Energy Micro EFM32 microcontrollers (ARM Cortex-M).
 
 config ARCH_CHIP_IMX1
-	bool "Freescale iMX.1"
+	bool "NXP/Freescale iMX.1"
 	select ARCH_ARM920T
 	select ARCH_HAVE_HEAP2
 	select ARCH_HAVE_LOWVECTORS
 	---help---
 		Freescale iMX.1 architectures (ARM920T)
 
+config ARCH_CHIP_IMX6
+	bool "NXP/Freescale iMX.6"
+	select ARCH_CORTEXA9
+	select ARCH_HAVE_FPU
+	select ARCH_HAVE_LOWVECTORS
+	select ARCH_HAVE_SDRAM
+	select BOOT_RUNFROMSDRAM
+	select ARCH_HAVE_ADDRENV
+	select ARCH_NEED_ADDRENV_MAPPING
+	depends on EXPERIMENTAL
+	---help---
+		Freescale iMX.6 architectures (Cortex-A9)
+
 config ARCH_CHIP_KINETIS
-	bool "Freescale Kinetis"
+	bool "NXP/Freescale Kinetis"
 	select ARCH_CORTEXM4
 	select ARCH_HAVE_MPU
 	select ARM_HAVE_MPU_UNIFIED
@@ -76,7 +87,7 @@ config ARCH_CHIP_KINETIS
 		Freescale Kinetis Architectures (ARM Cortex-M4)
 
 config ARCH_CHIP_KL
-	bool "Freescale Kinetis L"
+	bool "NXP/Freescale Kinetis L"
 	select ARCH_CORTEXM0
 	select ARCH_HAVE_CMNVECTOR
 	---help---
@@ -316,6 +327,13 @@ config ARCH_CORTEXA8
 	select ARCH_USE_MMU
 	select ARCH_HAVE_COHERENT_DCACHE if ELF || MODULE
 
+config ARCH_CORTEXA9
+	bool
+	default n
+	select ARCH_HAVE_MMU
+	select ARCH_USE_MMU
+	select ARCH_HAVE_COHERENT_DCACHE if ELF || MODULE
+
 config ARCH_CORTEXR4
 	bool
 	default n
@@ -359,7 +377,7 @@ config ARCH_FAMILY
 	string
 	default "arm"		if ARCH_ARM7TDMI || ARCH_ARM926EJS || ARCH_ARM920T
 	default "armv6-m"	if ARCH_CORTEXM0
-	default "armv7-a"	if ARCH_CORTEXA5 || ARCH_CORTEXA8
+	default "armv7-a"	if ARCH_CORTEXA5 || ARCH_CORTEXA8 || ARCH_CORTEXA9
 	default "armv7-m"	if ARCH_CORTEXM3 || ARCH_CORTEXM4 || ARCH_CORTEXM7
 	default "armv7-r"	if ARCH_CORTEXR4 || ARCH_CORTEXR4F || ARCH_CORTEXR5 || ARCH_CORTEXR5F || ARCH_CORTEX74 || ARCH_CORTEXR7F
 
@@ -371,6 +389,7 @@ config ARCH_CHIP
 	default "dm320"		if ARCH_CHIP_DM320
 	default "efm32"		if ARCH_CHIP_EFM32
 	default "imx1"		if ARCH_CHIP_IMX1
+	default "imx6"		if ARCH_CHIP_IMX6
 	default "kinetis"	if ARCH_CHIP_KINETIS
 	default "kl"		if ARCH_CHIP_KL
 	default "tiva"		if ARCH_CHIP_LM || ARCH_CHIP_TIVA
@@ -527,7 +546,7 @@ config DEBUG_HARDFAULT
 if ARCH_CORTEXM0
 source arch/arm/src/armv6-m/Kconfig
 endif
-if ARCH_CORTEXA5 || ARCH_CORTEXA8
+if ARCH_CORTEXA5 || ARCH_CORTEXA8 || ARCH_CORTEXA9
 source arch/arm/src/armv7-a/Kconfig
 endif
 if ARCH_CORTEXM3 || ARCH_CORTEXM4 || ARCH_CORTEXM7
@@ -557,6 +576,9 @@ endif
 if ARCH_CHIP_IMX1
 source arch/arm/src/imx1/Kconfig
 endif
+if ARCH_CHIP_IMX6
+source arch/arm/src/imx6/Kconfig
+endif
 if ARCH_CHIP_KINETIS
 source arch/arm/src/kinetis/Kconfig
 endif

arch/arm/src/imx1/Kconfig

@@ -20,7 +20,7 @@ config IMX1_UART2
 	select ARCH_HAVE_UART2
 
 config IMX1_UART3
-	bool "UART2"
+	bool "UART3"
 	default n
 	select ARCH_HAVE_UART3
 

arch/arm/src/imx6/Kconfig

@@ -0,0 +1,48 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_CHIP_IMX6
+
+# choice "iMX.6 Chip Selection"
+
+menu "iMX.6 Peripheral Selection"
+
+config IMX6_UART1
+	bool "UART1"
+	default n
+	select ARCH_HAVE_UART1
+
+config IMX6_UART2
+	bool "UART2"
+	default n
+	select ARCH_HAVE_UART2
+
+config IMX6_UART3
+	bool "UART3"
+	default n
+	select ARCH_HAVE_UART3
+
+config IMX6_UART4
+	bool "UART4"
+	default n
+	select ARCH_HAVE_UART3
+
+config IMX6_UART5
+	bool "UART5"
+	default n
+	select ARCH_HAVE_UART3
+
+config IMX6_SPI1
+	bool "SPI1"
+	default n
+	select SPI
+
+config IMX6_SPI2
+	bool "SPI2"
+	default n
+	select SPI
+
+endmenu # iMX Peripheral Selection
+endif # ARCH_CHIP_IMX6

arch/arm/src/imx6/Make.defs

@@ -0,0 +1,135 @@
+############################################################################
+# arch/arm/imx6/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt <gnutt@nuttx.org>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name Gregory Nutt nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+# The vector table is the "head" object, i.e., the one that must forced into
+# the link in order to draw in all of the other components
+
+HEAD_ASRC  = arm_vectortab.S
+
+ifeq ($(CONFIG_BUILD_KERNEL),y)
+STARTUP_OBJS = crt0$(OBJEXT)
+endif
+
+# Force the start-up logic to be at the beginning of the .text to simplify
+# debug.
+
+ifeq ($(CONFIG_PAGING),y)
+CMN_ASRCS  = arm_pghead.S
+else
+CMN_ASRCS  = arm_head.S
+endif
+
+# Common assembly language files
+
+CMN_ASRCS += arm_vectors.S arm_fpuconfig.S arm_fullcontextrestore.S
+CMN_ASRCS += arm_saveusercontext.S arm_vectoraddrexcptn.S arm_vfork.S
+CMN_ASRCS += arm_testset.S
+CMN_ASRCS += cp15_coherent_dcache.S cp15_invalidate_dcache.S
+CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S cp15_invalidate_dcache_all.S
+
+ifeq ($(CONFIG_ARCH_MEMCPY),y)
+CMN_ASRCS += arm_memcpy.S
+endif
+
+# Common C source files
+
+CMN_CSRCS  = up_initialize.c up_idle.c up_interruptcontext.c up_exit.c
+CMN_CSRCS += up_createstack.c up_releasestack.c up_usestack.c up_vfork.c
+CMN_CSRCS += up_puts.c up_mdelay.c up_stackframe.c up_udelay.c
+CMN_CSRCS += up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
+
+CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_dataabort.c
+CMN_CSRCS += arm_doirq.c arm_initialstate.c arm_mmu.c arm_prefetchabort.c
+CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c
+CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c
+CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c
+
+# Use common heap allocation for now (may need to be customized later)
+
+CMN_CSRCS += up_allocateheap.c
+
+# Configuration dependent C and assembly language files
+
+ifeq ($(CONFIG_PAGING),y)
+CMN_CSRCS += arm_allocpage.c arm_checkmapping.c arm_pginitialize.c
+CMN_CSRCS += arm_va2pte.c
+endif
+
+ifeq ($(CONFIG_BUILD_KERNEL),y)
+CMN_CSRCS += up_task_start.c up_pthread_start.c arm_signal_dispatch.c
+endif
+
+ifeq ($(CONFIG_ARCH_ADDRENV),y)
+CMN_CSRCS += arm_addrenv.c arm_addrenv_utils.c arm_pgalloc.c
+ifeq ($(CONFIG_ARCH_STACK_DYNAMIC),y)
+CMN_CSRCS += arm_addrenv_ustack.c
+endif
+ifeq ($(CONFIG_ARCH_KERNEL_STACK),y)
+CMN_CSRCS += arm_addrenv_kstack.c
+endif
+ifeq ($(CONFIG_MM_SHM),y)
+CMN_CSRCS += arm_addrenv_shm.c
+endif
+endif
+
+ifeq ($(CONFIG_MM_PGALLOC),y)
+CMN_CSRCS += arm_physpgaddr.c
+ifeq ($(CONFIG_ARCH_PGPOOL_MAPPING),y)
+CMN_CSRCS += arm_virtpgaddr.c
+endif
+endif
+
+ifeq ($(CONFIG_ELF),y)
+CMN_CSRCS += arm_elf.c arm_coherent_dcache.c
+else ifeq ($(CONFIG_MODULE),y)
+CMN_CSRCS += arm_elf.c arm_coherent_dcache.c
+endif
+
+ifeq ($(CONFIG_ARCH_FPU),y)
+CMN_ASRCS += arm_savefpu.S arm_restorefpu.S
+CMN_CSRCS += arm_copyarmstate.c
+endif
+
+ifeq ($(CONFIG_STACK_COLORATION),y)
+CMN_CSRCS += up_checkstack.c
+endif
+
+# i.MX6-specific assembly language files
+
+CHIP_ASRCS  =
+
+# i.MX6-specific C source files
+
+CHIP_CSRCS  =