arch/xtensa: Few typos and style fixes.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>

arch/xtensa/src/common/xtensa_cpuint.S

@@ -99,7 +99,7 @@ xtensa_enable_cpuint:
  *   writes that value to the hardware INTENABLE register.  Can be called
  *   from interrupt handlers.
  *
- *   NOTE: It is possible only to enable interrupts on the current CPU
+ *   NOTE: It is possible only to disable interrupts on the current CPU
  *   because there is an INTENABLE register implemented in each CPU.
  *
  ****************************************************************************/

arch/xtensa/src/common/xtensa_cpupause.c

@@ -88,9 +88,9 @@ bool up_cpu_pausereq(int cpu)
  * Description:
  *   Handle a pause request from another CPU.  Normally, this logic is
  *   executed from interrupt handling logic within the architecture-specific
- *   However, it is sometimes necessary necessary to perform the pending
- *   pause operation in other contexts where the interrupt cannot be taken
- *   in order to avoid deadlocks.
+ *   However, it is sometimes necessary to perform the pending pause
+ *   operation in other contexts where the interrupt cannot be taken in
+ *   order to avoid deadlocks.
  *
  *   This function performs the following operations:
  *
@@ -186,7 +186,7 @@ void xtensa_pause_handler(void)
   int cpu = up_cpu_index();
 
   /* Check for false alarms.  Such false could occur as a consequence of
-   * some deadlock breaking logic that might have already serviced the SG2
+   * some deadlock breaking logic that might have already serviced the
    * interrupt by calling up_cpu_paused.
    */
 
@@ -228,9 +228,9 @@ int up_cpu_pause(int cpu)
 
   DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS && cpu != this_cpu());
 
-  /* Take the both spinlocks.  The g_cpu_wait spinlock will prevent the SGI2
+  /* Take both spinlocks.  The g_cpu_wait spinlock will prevent the interrupt
    * handler from returning until up_cpu_resume() is called; g_cpu_paused
-   * is a handshake that will prefent this function from returning until
+   * is a handshake that will prevent this function from returning until
    * the CPU is actually paused.
    */
 
@@ -240,7 +240,7 @@ int up_cpu_pause(int cpu)
   spin_lock(&g_cpu_wait[cpu]);
   spin_lock(&g_cpu_paused[cpu]);
 
-  /* Execute SGI2 */
+  /* Execute the intercpu interrupt */
 
   ret = xtensa_intercpu_interrupt(cpu, CPU_INTCODE_PAUSE);
   if (ret < 0)
@@ -276,8 +276,8 @@ int up_cpu_pause(int cpu)
  *   state of the task at the head of the g_assignedtasks[cpu] list, and
  *   resume normal tasking.
  *
- *   This function is called after up_cpu_pause in order resume operation of
- *   the CPU after modifying its g_assignedtasks[cpu] list.
+ *   This function is called after up_cpu_pause in order to resume operation
+ *   of the CPU after modifying its g_assignedtasks[cpu] list.
  *
  * Input Parameters:
  *   cpu - The index of the CPU being re-started.
@@ -297,7 +297,7 @@ int up_cpu_resume(int cpu)
 
   DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS && cpu != this_cpu());
 
-  /* Release the spinlock.  Releasing the spinlock will cause the SGI2
+  /* Release the spinlock.  Releasing the spinlock will cause the interrupt
    * handler on 'cpu' to continue and return from interrupt to the newly
    * established thread.
    */

arch/xtensa/src/esp32/esp32_start.c

@@ -109,9 +109,9 @@ void IRAM_ATTR __start(void)
     }
 #endif
 
-  /* Move the stack to a known location.  Although we were give a stack
+  /* Move the stack to a known location.  Although we were given a stack
    * pointer at start-up, we don't know where that stack pointer is
-   * positioned respect to our memory map.  The only safe option is to
+   * positioned with respect to our memory map.  The only safe option is to
    * switch to a well-known IDLE thread stack.
    */
 

arch/xtensa/src/lx6/Toolchain.defs

@@ -33,7 +33,6 @@
 #
 ############################################################################
 
-
 # Supported toolchains
 #
 # Each toolchain definition should set: