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This commit is contained in:
Gregory Nutt 2014-11-17 12:48:01 -06:00
parent ee50831a5f
commit a1598152d1
3 changed files with 23 additions and 8 deletions
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2
ChangeLog
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@ -9005,4 +9005,6 @@
when both Ethernet and SLIP are enabled (2014-11-16).
* configs/sama5d4-ek/bridge: Add a simple test for the dual EMACs on
the SAMA5D4 (2014-11-17).
* arch/arm/src/sama5/sam_emacb.c: Fix several typos that will prevent
EMAC1 from initializing properly (2014-11-17).

12
arch/arm/src/sama5/sam_emacb.c
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@ -266,7 +266,7 @@
# else
# error EMAC PHY unrecognized
# endif
#endif /* CONFIG_SAMA5_EMAC0 */
#endif /* CONFIG_SAMA5_EMAC1 */
/* Common Configuration *****************************************************/
@ -587,7 +587,7 @@ static struct emac_rxdesc_s g_emac1_rxdesc[CONFIG_SAMA5_EMAC1_NRXBUFFERS]
static uint8_t g_emac1_txbuffer[CONFIG_SAMA5_EMAC1_NTXBUFFERS * EMAC_TX_UNITSIZE];
__attribute__((aligned(8)))
/* EMAC0 Receive Buffers */
/* EMAC1 Receive Buffers */
static uint8_t g_emac1_rxbuffer[CONFIG_SAMA5_EMAC1_NRXBUFFERS * EMAC_RX_UNITSIZE]
__attribute__((aligned(8)));
@ -641,8 +641,8 @@ static const struct sam_emacattr_s g_emac0_attr =
.std =
{
.stdmask = (CONFIG_SAMA5_EMAC0_PHYSR_SPEED | CONFIG_SAMA5_EMAC0_PHYSR_MODE),
.speed100 = CONFIG_SAMA5_EMAC1_PHYSR_100MBPS,
.fduplex = CONFIG_SAMA5_EMAC1_PHYSR_FULLDUPLEX,
.speed100 = CONFIG_SAMA5_EMAC0_PHYSR_100MBPS,
.fduplex = CONFIG_SAMA5_EMAC0_PHYSR_FULLDUPLEX,
},
#endif
},
@ -672,7 +672,7 @@ static const struct sam_emacattr_s g_emac1_attr =
.base = SAM_EMAC1_VBASE,
.handler = sam_emac1_interrupt,
.emac = 0,
.emac = 1,
.irq = SAM_IRQ_EMAC1,
/* PHY Configuration */
@ -3279,7 +3279,7 @@ static inline void sam_ethgpioconfig(struct sam_emac_s *priv)
}
#endif
#if defined(CONFIG_SAMA5_EMAC0)
#if defined(CONFIG_SAMA5_EMAC1)
/* Configure EMAC0 PIO pins */
if (priv->attr->emac == 1)

17
configs/sama5d4-ek/README.txt
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@ -3668,8 +3668,21 @@ Configurations
the warning in the section "Information Common to All Configurations"
for further information.
3. This configuration executes from DRAM and must be loaded via some
bootloader. I use DRAMBOOT as described above.
3. EMAC0 and EMAC1 connect KSZ8081RNB PHYs and are available at the
ETH0 and ETH1 connector, respectively.
The ETH1 signals go through line drivers that are enabled via the
board LCD_ETH1_CONFIG signal. Jumper JP2 selects either the EMAC1
or the LCD by controlling the the LCD_ETH1_CONFIG signal on the
board.
- JP2 open, LCD_ETH1_CONFIG pulled high:
LCD_ETH1_CONFIG=1: LCD 5v enable(LCD_DETECT#=0); ETH1 disable
- JP2 closed, LCD_ETH1_CONFIG grounded:
LCD_ETH1_CONFIG=0: LCD 5v disable; ETH1 enable
STATUS: