Update ChangeLog
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@ -9005,4 +9005,6 @@
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when both Ethernet and SLIP are enabled (2014-11-16).
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when both Ethernet and SLIP are enabled (2014-11-16).
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* configs/sama5d4-ek/bridge: Add a simple test for the dual EMACs on
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* configs/sama5d4-ek/bridge: Add a simple test for the dual EMACs on
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the SAMA5D4 (2014-11-17).
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the SAMA5D4 (2014-11-17).
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* arch/arm/src/sama5/sam_emacb.c: Fix several typos that will prevent
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EMAC1 from initializing properly (2014-11-17).
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@ -266,7 +266,7 @@
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# else
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# else
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# error EMAC PHY unrecognized
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# error EMAC PHY unrecognized
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# endif
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# endif
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#endif /* CONFIG_SAMA5_EMAC0 */
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#endif /* CONFIG_SAMA5_EMAC1 */
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/* Common Configuration *****************************************************/
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/* Common Configuration *****************************************************/
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@ -587,7 +587,7 @@ static struct emac_rxdesc_s g_emac1_rxdesc[CONFIG_SAMA5_EMAC1_NRXBUFFERS]
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static uint8_t g_emac1_txbuffer[CONFIG_SAMA5_EMAC1_NTXBUFFERS * EMAC_TX_UNITSIZE];
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static uint8_t g_emac1_txbuffer[CONFIG_SAMA5_EMAC1_NTXBUFFERS * EMAC_TX_UNITSIZE];
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__attribute__((aligned(8)))
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__attribute__((aligned(8)))
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/* EMAC0 Receive Buffers */
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/* EMAC1 Receive Buffers */
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static uint8_t g_emac1_rxbuffer[CONFIG_SAMA5_EMAC1_NRXBUFFERS * EMAC_RX_UNITSIZE]
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static uint8_t g_emac1_rxbuffer[CONFIG_SAMA5_EMAC1_NRXBUFFERS * EMAC_RX_UNITSIZE]
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__attribute__((aligned(8)));
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__attribute__((aligned(8)));
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@ -641,8 +641,8 @@ static const struct sam_emacattr_s g_emac0_attr =
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.std =
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.std =
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{
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{
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.stdmask = (CONFIG_SAMA5_EMAC0_PHYSR_SPEED | CONFIG_SAMA5_EMAC0_PHYSR_MODE),
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.stdmask = (CONFIG_SAMA5_EMAC0_PHYSR_SPEED | CONFIG_SAMA5_EMAC0_PHYSR_MODE),
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.speed100 = CONFIG_SAMA5_EMAC1_PHYSR_100MBPS,
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.speed100 = CONFIG_SAMA5_EMAC0_PHYSR_100MBPS,
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.fduplex = CONFIG_SAMA5_EMAC1_PHYSR_FULLDUPLEX,
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.fduplex = CONFIG_SAMA5_EMAC0_PHYSR_FULLDUPLEX,
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},
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},
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#endif
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#endif
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},
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},
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@ -672,7 +672,7 @@ static const struct sam_emacattr_s g_emac1_attr =
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.base = SAM_EMAC1_VBASE,
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.base = SAM_EMAC1_VBASE,
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.handler = sam_emac1_interrupt,
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.handler = sam_emac1_interrupt,
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.emac = 0,
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.emac = 1,
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.irq = SAM_IRQ_EMAC1,
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.irq = SAM_IRQ_EMAC1,
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/* PHY Configuration */
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/* PHY Configuration */
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@ -3279,7 +3279,7 @@ static inline void sam_ethgpioconfig(struct sam_emac_s *priv)
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}
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}
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#endif
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#endif
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#if defined(CONFIG_SAMA5_EMAC0)
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#if defined(CONFIG_SAMA5_EMAC1)
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/* Configure EMAC0 PIO pins */
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/* Configure EMAC0 PIO pins */
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if (priv->attr->emac == 1)
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if (priv->attr->emac == 1)
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@ -3668,8 +3668,21 @@ Configurations
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the warning in the section "Information Common to All Configurations"
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the warning in the section "Information Common to All Configurations"
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for further information.
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for further information.
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3. This configuration executes from DRAM and must be loaded via some
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3. EMAC0 and EMAC1 connect KSZ8081RNB PHYs and are available at the
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bootloader. I use DRAMBOOT as described above.
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ETH0 and ETH1 connector, respectively.
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The ETH1 signals go through line drivers that are enabled via the
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board LCD_ETH1_CONFIG signal. Jumper JP2 selects either the EMAC1
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or the LCD by controlling the the LCD_ETH1_CONFIG signal on the
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board.
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- JP2 open, LCD_ETH1_CONFIG pulled high:
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LCD_ETH1_CONFIG=1: LCD 5v enable(LCD_DETECT#=0); ETH1 disable
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- JP2 closed, LCD_ETH1_CONFIG grounded:
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LCD_ETH1_CONFIG=0: LCD 5v disable; ETH1 enable
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STATUS:
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STATUS:
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