Updated stm32f3discovery configuration
* Added notes about external debugging to README * Added conditional pin assignments for I2C1 and I2C2 to prevent apps/system/i2c build failures.
This commit is contained in:
parent
188d72d1c3
commit
a1b780c000
@ -425,6 +425,30 @@ https://github.com/texane/stlink
|
||||
--------------------------------
|
||||
This is an open source server for the ST-Link that I have never used.
|
||||
|
||||
It is also possible to use an external debugger such as the Segger JLink
|
||||
(EDU or commercial models) provided:
|
||||
|
||||
1) The CN4 jumpers are removed to disconnect the on-board STLinkV2 from
|
||||
the STM32F3.
|
||||
|
||||
2) The appropriate (20 pin connector to flying wire) adapter is used to connect
|
||||
the debugger to the required pins on the expansion headers (see below).
|
||||
|
||||
Note that the 1x6 header on the STLinkV2 side of the board labeled "SWD"
|
||||
is for the STLink micro (STM32F1) and is not connected to the STM32F3.
|
||||
|
||||
3) OpenOCD version 0.9.0 or later is used. Earlier versions support either
|
||||
JTAG only or are buggy for SWD.
|
||||
|
||||
The signals used with external (SWD) debugging are:
|
||||
|
||||
VREF (3V)
|
||||
GROUND (GND)
|
||||
SWCLK (PA14)
|
||||
SWIO (PA13)
|
||||
SWO (PB3)
|
||||
RESET (NRST)
|
||||
|
||||
Atollic GDB Server
|
||||
------------------
|
||||
You can use the Atollic IDE, but I have never done that either.
|
||||
|
@ -241,22 +241,55 @@
|
||||
|
||||
/* Alternate function pin selections ************************************************/
|
||||
|
||||
/* UART2:
|
||||
*
|
||||
* The STM32F3Discovery has no on-board serial devices, but the console is
|
||||
* brought out to PA2 (TX) and PA3 (RX) for connection to an external serial device.
|
||||
* (See the README.txt file for other options)
|
||||
/* USART
|
||||
*
|
||||
* USART1: Hardwired to embedded STLinkV2 hardware debugger
|
||||
* RX (PC5)
|
||||
* TX (PC4)
|
||||
*
|
||||
* USART2: Connect to an external UART<->RS232 transceiver for use as console.
|
||||
* RX (PA3)
|
||||
* TX (PA2)
|
||||
*/
|
||||
|
||||
#define GPIO_USART2_RX GPIO_USART2_RX_2
|
||||
#define GPIO_USART2_TX GPIO_USART2_TX_2
|
||||
|
||||
/* SPI - There is a ST MEMS L3GD20 device on SPI1 using these pins: */
|
||||
/* SPI
|
||||
*
|
||||
* SPI1: Hardwired to ST L3GD20 MEMS device
|
||||
* MISO (PA6)
|
||||
* MSOI (PA7)
|
||||
* SCK (PA5)
|
||||
*/
|
||||
|
||||
#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
|
||||
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
|
||||
#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
|
||||
|
||||
/* I2C
|
||||
*
|
||||
* I2C1: Accessible via expansion headers
|
||||
* SCL (PA15)
|
||||
* SDA (PA14)
|
||||
* SMBA (PB5)
|
||||
*
|
||||
* I2C2: Accessible via expansion headers
|
||||
* SCL (PA9)
|
||||
* SDA (PA10)
|
||||
* SMBA (PB12)
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_STM32_I2C1
|
||||
#define GPIO_I2C1_SCL GPIO_I2C1_SCL_1
|
||||
#define GPIO_I2C1_SDA GPIO_I2C1_SDA_1
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_I2C2
|
||||
#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
|
||||
#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
Loading…
Reference in New Issue
Block a user