STM32 OTF FS device. USB console now works for me. Some of these changes are hacks that need to be revisited.
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4777 42af7a65-404d-4744-a932-0658087f49c3
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patacongo
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@ -2819,4 +2819,8 @@
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is an important USB serial fix.
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* arch/arc/src/stm32_otgfsdev.c: Bug fix: Don't process TXFE if we have
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already processed an XFRC interrupt. We have already done what needs
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to done in that case.
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to done in that case.
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* arch/arc/src/stm32_otgfsdev.c: Fixed some status settings in queuing of write
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messages. Added a "hack" to work around missing TxFIFO empty interrupts. The
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hack is basically to poll for space in the TxFIFO instead of of setting up
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the interrupt.
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@ -146,6 +146,15 @@
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# error "CONFIG_USBDEV_EP3_TXFIFO_SIZE is out of range"
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#endif
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/* REVISIT! This forces a hack that polls DTXFSTS for space in the Tx FIFO.
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* Enabling this option is a BAD thing. It will cause inline waits inside
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* of the USB interrupt handler. The correct way to handle this is to
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* enable the correct TxFIFO interrupt and wait until the Tx FIFO is empty.
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* Unfortunately, the interrupt driven logic is not working... Please fix!
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*/
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#define ENABLE_DTXFSTS_POLLHACK 1
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/* Debug ***********************************************************************/
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/* Trace error codes */
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@ -221,11 +230,13 @@
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#define STM32_TRACEINTID_EPIN_EPDISD (70 + 3)
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#define STM32_TRACEINTID_EPIN_TXFE (70 + 4)
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#define STM32_TRACEINTID_OUTNAK (80 + 0) /* RXFLVL second level decode */
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#define STM32_TRACEINTID_OUTRECVD (80 + 1)
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#define STM32_TRACEINTID_OUTDONE (80 + 2)
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#define STM32_TRACEINTID_SETUPDONE (80 + 3)
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#define STM32_TRACEINTID_SETUPRECVD (80 + 4)
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#define STM32_TRACEINTID_EPIN_EMPWAIT (80 + 0) /* EPIN second level decode */
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#define STM32_TRACEINTID_OUTNAK (90 + 0) /* RXFLVL second level decode */
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#define STM32_TRACEINTID_OUTRECVD (90 + 1)
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#define STM32_TRACEINTID_OUTDONE (90 + 2)
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#define STM32_TRACEINTID_SETUPDONE (90 + 3)
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#define STM32_TRACEINTID_SETUPRECVD (90 + 4)
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/* Endpoints ******************************************************************/
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@ -1071,17 +1082,32 @@ static void stm32_epin_request(FAR struct stm32_usbdev_s *priv,
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struct stm32_req_s *privreq;
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uint32_t regaddr;
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uint32_t regval;
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#ifdef ENABLE_DTXFSTS_POLLHACK
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int32_t timeout;
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#endif
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uint8_t *buf;
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int nbytes;
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int nwords;
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int bytesleft;
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/* We get here when an IN endpoint or Tx FIFO empty interrupt occurs. So
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* now we know that there is no TX transfer in progress.
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/* We get here in one of four possible ways. From three interrupting
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* events:
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*
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* 1. From stm32_epin as part of the transfer complete interrupt processing
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* This interrupt indicates that the last transfer has completed.
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* 2. As part of the ITTXFE interrupt processing. That interrupt indicates
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* that an IN token was received when the associated TxFIFO was empty.
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* 3. From stm32_epin_txfifoempty as part of the TXFE interrupt processing.
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* The TXFE interrupt is only enabled when the TxFIFO is full and the
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* software must wait for space to become available in the TxFIFO.
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*
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* And this function may be called immediately when the write request is
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* queue to start up the next transaction.
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*
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* 4. From stm32_ep_submit when a new write request is received WHILE the
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* endpoint is not active (privep->active == false).
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*/
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privep->active = false;
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/* Check the request from the head of the endpoint request queue */
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privreq = stm32_rqpeek(privep);
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@ -1192,14 +1218,33 @@ static void stm32_epin_request(FAR struct stm32_usbdev_s *priv,
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*/
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regaddr = STM32_OTGFS_DTXFSTS(privep->epphy);
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regval = stm32_getreg(regaddr);
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/* And terminate the loop if there is insufficient space in the TxFIFO
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* hold the entire packet.
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#ifdef ENABLE_DTXFSTS_POLLHACK
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/* If ENABLE_DTXFSTS_POLLHACK is enabled , then poll DTXFSTS until
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* space in the TxFIFO is available. If it doesn't become available,
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* in a reasonable amount of time, then just pretend that it is.
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*/
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for (timeout = 250000; timeout > 0; timeout--)
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{
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regval = stm32_getreg(regaddr);
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if ((regval & OTGFS_DTXFSTS_MASK) >= nwords)
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{
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break;
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}
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}
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#else
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/* If ENABLE_DTXFSTS_POLLHACK is not enabled, then check once for
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* space in the TxFIFO. If space in the TxFIFO is not available,
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* then set up an interrupt to resume the transfer when the TxFIFO
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* is empty.
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*/
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regval = stm32_getreg(regaddr);
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if ((regval & OTGFS_DTXFSTS_MASK) < nwords)
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{
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usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_EMPWAIT), (uint16_t)regval);
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/* There is insufficent space in the TxFIFO. Wait for a TxFIFO
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* empty interrupt and try again.
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*/
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@ -1207,8 +1252,12 @@ static void stm32_epin_request(FAR struct stm32_usbdev_s *priv,
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uint32_t empmsk = stm32_getreg(STM32_OTGFS_DIEPEMPMSK);
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empmsk |= OTGFS_DIEPEMPMSK(privep->epphy);
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stm32_putreg(empmsk, STM32_OTGFS_DIEPEMPMSK);
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/* Terminate the transfer loop */
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break;
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}
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#endif
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/* Transfer data to the TxFIFO */
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@ -4099,19 +4148,26 @@ static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
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}
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else
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{
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/* Add the new request to the request queue for the endpoint */
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/* Add the new request to the request queue for the endpoint. */
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if (stm32_req_addlast(privep, privreq))
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if (stm32_req_addlast(privep, privreq) && !privep->active)
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{
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/* If a request was added to an IN endpoint, then attempt to send
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* the request data buffer now (this will, of course, fail if there
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* is already a transmission in progress).
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* the request data buffer now.
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*/
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if (privep->isin)
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{
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usbtrace(TRACE_INREQQUEUED(privep->epphy), privreq->req.len);
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stm32_epin_request(priv, privep);
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/* If the endpoint is not busy with another write request,
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* then process the newly received write request now.
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*/
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if (!privep->active)
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{
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stm32_epin_request(priv, privep);
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}
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}
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/* If the request was added to an OUT endoutput, then attempt to
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@ -4875,7 +4931,7 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv)
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* FS AHB configuration register.
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*/
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stm32_putreg(0, STM32_OTGFS_GAHBCFG);
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stm32_putreg(OTGFS_GAHBCFG_TXFELVL, STM32_OTGFS_GAHBCFG);
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/* Common USB OTG core initialization */
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/* Reset after a PHY select and set Host mode. First, wait for AHB master
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@ -5068,11 +5124,11 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv)
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stm32_putreg(regval, STM32_OTGFS_GINTMSK);
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/* Ensable the USB global interrupt by setting GINTMSK in the global OTG
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/* Enable the USB global interrupt by setting GINTMSK in the global OTG
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* FS AHB configuration register.
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*/
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stm32_putreg(OTGFS_GAHBCFG_GINTMSK, STM32_OTGFS_GAHBCFG);
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stm32_putreg(OTGFS_GAHBCFG_GINTMSK | OTGFS_GAHBCFG_TXFELVL, STM32_OTGFS_GAHBCFG);
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}
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/*******************************************************************************
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