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arch/nrf{52|53|91}/spi: fix error message

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wrong parameters were passed to spierr()
This commit is contained in:
raiden00pl 2024-03-05 15:05:04 +01:00 committed by Xiang Xiao
parent 8b931b43b1
commit a20b3e8335
3 changed files with 9 additions and 9 deletions
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6
arch/arm/src/nrf52/nrf52_spi.c
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@ -1164,11 +1164,11 @@ static void nrf52_spi_exchange(struct spi_dev_s *dev,
nxsem_wait_uninterruptible(&priv->sem_isr); nxsem_wait_uninterruptible(&priv->sem_isr);
#endif #endif
if (nrf52_spi_getreg(priv, NRF52_SPIM_TXDAMOUNT_OFFSET) != regval = nrf52_spi_getreg(priv, NRF52_SPIM_TXDAMOUNT_OFFSET);
transfer_size) if (regval != transfer_size)
{ {
spierr("Incomplete transfer wrote %" PRId32 " expected %zu\n", spierr("Incomplete transfer wrote %" PRId32 " expected %zu\n",
regval, nwords); regval, transfer_size);
} }
/* SPI stop */ /* SPI stop */

6
arch/arm/src/nrf53/nrf53_spi.c
View File

@ -1158,11 +1158,11 @@ static void nrf53_spi_exchange(struct spi_dev_s *dev,
nxsem_wait_uninterruptible(&priv->sem_isr); nxsem_wait_uninterruptible(&priv->sem_isr);
#endif #endif
if (nrf53_spi_getreg(priv, NRF53_SPIM_TXDAMOUNT_OFFSET) != regval = nrf53_spi_getreg(priv, NRF53_SPIM_TXDAMOUNT_OFFSET);
transfer_size) if (regval != transfer_size)
{ {
spierr("Incomplete transfer wrote %" PRId32 " expected %zu\n", spierr("Incomplete transfer wrote %" PRId32 " expected %zu\n",
regval, nwords); regval, transfer_size);
} }
/* SPI stop */ /* SPI stop */

6
arch/arm/src/nrf91/nrf91_spi.c
View File

@ -1158,11 +1158,11 @@ static void nrf91_spi_exchange(struct spi_dev_s *dev,
nxsem_wait_uninterruptible(&priv->sem_isr); nxsem_wait_uninterruptible(&priv->sem_isr);
#endif #endif
if (nrf91_spi_getreg(priv, NRF91_SPIM_TXDAMOUNT_OFFSET) != regval = nrf91_spi_getreg(priv, NRF91_SPIM_TXDAMOUNT_OFFSET);
transfer_size) if (regval != transfer_size)
{ {
spierr("Incomplete transfer wrote %" PRId32 " expected %zu\n", spierr("Incomplete transfer wrote %" PRId32 " expected %zu\n",
regval, nwords); regval, transfer_size);
} }
/* SPI stop */ /* SPI stop */