From a29223c1562ab0940cbc3aaccd1f1a682f3372e4 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 29 Jul 2018 08:08:42 -0600 Subject: [PATCH] arch/arm/src/samd5e5: Fix some compilation issues introduced with last commit. --- arch/arm/src/samd5e5/chip/sam_i2c_master.h | 6 ++--- arch/arm/src/samd5e5/chip/sam_spi.h | 2 ++ arch/arm/src/samd5e5/sam_i2c_master.c | 31 +++++++--------------- arch/arm/src/samd5e5/sam_spi.c | 4 +-- 4 files changed, 15 insertions(+), 28 deletions(-) diff --git a/arch/arm/src/samd5e5/chip/sam_i2c_master.h b/arch/arm/src/samd5e5/chip/sam_i2c_master.h index b2cd88b0f2..e03bca43e2 100644 --- a/arch/arm/src/samd5e5/chip/sam_i2c_master.h +++ b/arch/arm/src/samd5e5/chip/sam_i2c_master.h @@ -145,7 +145,7 @@ #define SAM_I2C6_CTRLA (SAM_SERCOM6_BASE + SAM_I2C_CTRLA_OFFSET) #define SAM_I2C6_CTRLB (SAM_SERCOM6_BASE + SAM_I2C_CTRLB_OFFSET) -#define SAM_I26C_CTRLC (SAM_SERCOM6_BASE + SAM_I2C_CTRLC_OFFSET) +#define SAM_I2C6_CTRLC (SAM_SERCOM6_BASE + SAM_I2C_CTRLC_OFFSET) #define SAM_I2C6_BAUD (SAM_SERCOM6_BASE + SAM_I2C_BAUD_OFFSET) #define SAM_I2C6_INTENCLR (SAM_SERCOM6_BASE + SAM_I2C_INTENCLR_OFFSET) #define SAM_I2C6_INTENSET (SAM_SERCOM6_BASE + SAM_I2C_INTENSET_OFFSET) @@ -156,9 +156,9 @@ #define SAM_I2C6_DATA (SAM_SERCOM6_BASE + SAM_I2C_DATA_OFFSET) #define SAM_I2C6_DBGCTRL (SAM_SERCOM6_BASE + SAM_I2C_DBGCTRL_OFFSET) -#define SAM_I2C5_CTRLA (SAM_SERCOM7_BASE + SAM_I2C_CTRLA_OFFSET) +#define SAM_I2C7_CTRLA (SAM_SERCOM7_BASE + SAM_I2C_CTRLA_OFFSET) #define SAM_I2C7_CTRLB (SAM_SERCOM7_BASE + SAM_I2C_CTRLB_OFFSET) -#define SAM_I27C_CTRLC (SAM_SERCOM7_BASE + SAM_I2C_CTRLC_OFFSET) +#define SAM_I2C7_CTRLC (SAM_SERCOM7_BASE + SAM_I2C_CTRLC_OFFSET) #define SAM_I2C7_BAUD (SAM_SERCOM7_BASE + SAM_I2C_BAUD_OFFSET) #define SAM_I2C7_INTENCLR (SAM_SERCOM7_BASE + SAM_I2C_INTENCLR_OFFSET) #define SAM_I2C7_INTENSET (SAM_SERCOM7_BASE + SAM_I2C_INTENSET_OFFSET) diff --git a/arch/arm/src/samd5e5/chip/sam_spi.h b/arch/arm/src/samd5e5/chip/sam_spi.h index 90e83ef58e..fe5ff0287e 100644 --- a/arch/arm/src/samd5e5/chip/sam_spi.h +++ b/arch/arm/src/samd5e5/chip/sam_spi.h @@ -264,6 +264,8 @@ #define SPI_SYNCBUSY_CTRLB (1 << 2) /* Bit 2: CTRLB synchronization busy */ #define SPI_SYNCBUSY_LENGTH (1 << 4) /* Bit 4: LENGTH synchronization busy */ +#define SPI_SYNCBUSY_ALL 0x017 + /* Length register */ #define SPI_LENGTH_LEN_SHIFT (0) /* Bit 0-7: Data length enable */ diff --git a/arch/arm/src/samd5e5/sam_i2c_master.c b/arch/arm/src/samd5e5/sam_i2c_master.c index 7b973cae8f..ab8e73430b 100644 --- a/arch/arm/src/samd5e5/sam_i2c_master.c +++ b/arch/arm/src/samd5e5/sam_i2c_master.c @@ -7,15 +7,6 @@ * Author: Alan Carvalho de Assis * Author: Gregory Nutt * - * References: - * SAMD/SAML Series Data Sheet - * Atmel NoOS sample code. - * - * The Atmel sample code has a BSD compatible license that requires this - * copyright notice: - * - * Copyright (c) 2011, Atmel Corporation - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -26,8 +17,8 @@ * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. - * 3. Neither the name NuttX, Atmel, nor the names of its contributors may - * be used to endorse or promote products derived from this software + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS @@ -351,14 +342,6 @@ static const struct i2c_attr_s g_i2c5attr = static struct sam_i2c_dev_s g_i2c5; #endif -struct i2c_ops_s g_i2cops = -{ - .transfer = sam_i2c_transfer, -#ifdef CONFIG_I2C_RESET - .reset = sam_i2c_reset, -#endif -}; - #ifdef SAMD5E5_HAVE_I2C6_MASTER static const struct i2c_attr_s g_i2c6attr = { @@ -726,7 +709,7 @@ static int i2c_interrupt(int irq, FAR void *context, FAR void *arg) /* Clear error INTFLAG */ - i2c_putreg16(priv, I2C_INT_ERROR, SAM_I2C_INTFLAG_OFFSET); + i2c_putreg16(priv, I2C_INT_ERR, SAM_I2C_INTFLAG_OFFSET); /* Cancel timeout */ @@ -1159,6 +1142,7 @@ static void i2c_hw_initialize(struct sam_i2c_dev_s *priv, uint32_t frequency) irqstate_t flags; uint32_t regval; uint32_t ctrla = 0; + int channel; i2cinfo("I2C%d Initializing\n", priv->attr->i2c); @@ -1170,6 +1154,10 @@ static void i2c_hw_initialize(struct sam_i2c_dev_s *priv, uint32_t frequency) /* Configure the GCLKs for the SERCOM module */ sercom_coreclk_configure(priv->attr->sercom, priv->attr->coregen, false); + + channel = priv->attr->sercom + GCLK_CHAN_SERCOM0_CORE; + sam_gclk_chan_enable(channel, priv->attr->coregen); + sercom_slowclk_configure(priv->attr->sercom, priv->attr->slowgen); /* Check if module is enabled */ @@ -1177,8 +1165,7 @@ static void i2c_hw_initialize(struct sam_i2c_dev_s *priv, uint32_t frequency) regval = i2c_getreg32(priv, SAM_I2C_CTRLA_OFFSET); if (regval & I2C_CTRLA_ENABLE) { - i2cerr - ("ERROR: Cannot initialize I2C because it is already initialized!\n"); + i2cerr("ERROR: Cannot initialize I2C because it is already initialized!\n"); return; } diff --git a/arch/arm/src/samd5e5/sam_spi.c b/arch/arm/src/samd5e5/sam_spi.c index cbd33ca729..a4e0368ae4 100644 --- a/arch/arm/src/samd5e5/sam_spi.c +++ b/arch/arm/src/samd5e5/sam_spi.c @@ -1576,9 +1576,7 @@ struct spi_dev_s *sam_spibus_initialize(int port) struct sam_spidev_s *priv; irqstate_t flags; uint32_t regval; -#ifdef CONFIG_ARCH_FAMILY_SAML21 int channel; -#endif #if 0 /* Not used */ int ret; #endif @@ -1667,7 +1665,7 @@ struct spi_dev_s *sam_spibus_initialize(int port) sercom_coreclk_configure(priv->sercom, priv->coregen, false); channel = priv->sercom + GCLK_CHAN_SERCOM0_CORE; - sam_gclk_chan_enable(channel, config->coregen); + sam_gclk_chan_enable(channel, priv->coregen); sercom_slowclk_configure(priv->sercom, priv->slowgen);