Fix to SST25 driver to permit faster write modes. From David Sidrane
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ChangeLog
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ChangeLog
@ -5945,4 +5945,12 @@
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from David Sidrane plugs the hole for now (2013-11-1).
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* drivers/mtd/mtd_config.c: Reduce configuration header size. From
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Ken Pettit (2013-11-1).
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* drivers/mtd/sst25.c: Improved write performance by fixing a bug
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that prevented operation in the faster write mode. The code did
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not wait on the last write complete before issuing the WRDI The
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loop in general failed to wait on the fist 2 bytes after the
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SST25_AAI if the next 2 were FF FF, then it would reissue the
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address but not cancel the write. Reorganized to always wait for
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completion after and address with data write and on any data
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write so that the device is complete before WRDI is sent. From
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David Sidrane (2013-11-2).
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@ -465,7 +465,7 @@ CONFIG_SST25_SPIMODE=0
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CONFIG_SST25_SPIFREQUENCY=80000000
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# CONFIG_SST25_READONLY is not set
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CONFIG_SST25_SECTOR512=y
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CONFIG_SST25_SLOWWRITE=y
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# CONFIG_SST25_SLOWWRITE is not set
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# CONFIG_SST25_SLOWREAD is not set
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# CONFIG_MTD_SST39FV is not set
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# CONFIG_MTD_W25 is not set
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@ -439,7 +439,7 @@ CONFIG_SST25_SPIMODE=0
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CONFIG_SST25_SPIFREQUENCY=80000000
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# CONFIG_SST25_READONLY is not set
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CONFIG_SST25_SECTOR512=y
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CONFIG_SST25_SLOWWRITE=y
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# CONFIG_SST25_SLOWWRITE is not set
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# CONFIG_SST25_SLOWREAD is not set
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# CONFIG_MTD_SST39FV is not set
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# CONFIG_MTD_W25 is not set
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@ -439,7 +439,7 @@ CONFIG_SST25_SPIMODE=0
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CONFIG_SST25_SPIFREQUENCY=80000000
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# CONFIG_SST25_READONLY is not set
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CONFIG_SST25_SECTOR512=y
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CONFIG_SST25_SLOWWRITE=y
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# CONFIG_SST25_SLOWWRITE is not set
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# CONFIG_SST25_SLOWREAD is not set
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# CONFIG_MTD_SST39FV is not set
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# CONFIG_MTD_W25 is not set
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@ -259,7 +259,13 @@ config SST25_SECTOR512
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config SST25_SLOWWRITE
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bool
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default y
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default n
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---help---
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There used to be a bug in the current code when using the higher speed AAI
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write sequence. The nature of the bug is that the WRDI instruction is not
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working. At the end of the AAI sequence, the status register continues to
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report that the SST25 is write enabled (WEL bit) and in AAI mode (AAI
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bit). This has been fixed by David Sidrane!
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config SST25_SLOWREAD
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bool
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@ -82,17 +82,6 @@
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# define CONFIG_SST25_SPIFREQUENCY 20000000
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#endif
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/* There is a bug in the current code when using the higher speed AAI write sequence.
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* The nature of the bug is that the WRDI instruction is not working. At the end
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* of the AAI sequence, the status register continues to report that the SST25 is
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* write enabled (WEL bit) and in AAI mode (AAI bit). This *must* be fixed in any
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* production code if you want to have proper write performance.
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*/
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#warning "REVISIT"
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#undef CONFIG_SST25_SLOWWRITE
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#define CONFIG_SST25_SLOWWRITE 1
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/* SST25 Instructions ***************************************************************/
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/* Command Value Description Addr Data */
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/* Dummy */
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@ -225,9 +214,10 @@ static void sst25_lock(FAR struct spi_dev_s *dev);
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static inline void sst25_unlock(FAR struct spi_dev_s *dev);
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static inline int sst25_readid(FAR struct sst25_dev_s *priv);
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#ifndef CONFIG_SST25_READONLY
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static void sst25_unprotect(FAR struct spi_dev_s *dev);
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static void sst25_unprotect(FAR struct sst25_dev_s *priv);
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#endif
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static uint8_t sst25_waitwritecomplete(FAR struct sst25_dev_s *priv);
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static inline void sst25_cmd(struct sst25_dev_s *priv, uint8_t cmd);
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static inline void sst25_wren(FAR struct sst25_dev_s *priv);
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#if !defined(CONFIG_SST25_SLOWWRITE) && !defined(CONFIG_SST25_READONLY)
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static inline void sst25_wrdi(FAR struct sst25_dev_s *priv);
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@ -377,30 +367,23 @@ static inline int sst25_readid(struct sst25_dev_s *priv)
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************************************************************************************/
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#ifndef CONFIG_SST25_READONLY
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static void sst25_unprotect(FAR struct spi_dev_s *dev)
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static void sst25_unprotect(struct sst25_dev_s *priv)
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{
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/* Select this FLASH part */
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SPI_SELECT(dev, SPIDEV_FLASH, true);
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/* Send "Write enable status (EWSR)" */
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SPI_SEND(dev, SST25_EWSR);
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sst25_cmd(priv, SST25_EWSR);
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/* Re-select this FLASH part (This might not be necessary... but is it shown in
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* the timing diagrams)
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*/
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/* Send "Write enable status (WRSR)" */
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SPI_SELECT(dev, SPIDEV_FLASH, false);
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SPI_SELECT(dev, SPIDEV_FLASH, true);
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SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
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/* Send "Write enable status (EWSR)" */
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SPI_SEND(priv->dev, SST25_WRSR);
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SPI_SEND(dev, SST25_WRSR);
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/* Followed by the new status value */
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/* Following by the new status value */
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SPI_SEND(priv->dev, 0);
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SPI_SEND(dev, 0);
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SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
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}
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#endif
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@ -481,41 +464,45 @@ static uint8_t sst25_waitwritecomplete(struct sst25_dev_s *priv)
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}
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/************************************************************************************
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* Name: sst25_wren
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* Name: sst25_cmd
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************************************************************************************/
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static inline void sst25_wren(struct sst25_dev_s *priv)
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static inline void sst25_cmd(struct sst25_dev_s *priv, uint8_t cmd)
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{
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/* Select this FLASH part */
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SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
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/* Send "Write Enable (WREN)" command */
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/* Send command */
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(void)SPI_SEND(priv->dev, SST25_WREN);
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(void)SPI_SEND(priv->dev, cmd);
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/* Deselect the FLASH */
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SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
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}
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/************************************************************************************
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* Name: sst25_wren
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************************************************************************************/
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static inline void sst25_wren(struct sst25_dev_s *priv)
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{
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/* Send "Write Enable (WREN)" command */
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sst25_cmd(priv, SST25_WREN);
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}
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/************************************************************************************
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* Name: sst25_wrdi
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************************************************************************************/
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#if !defined(CONFIG_SST25_SLOWWRITE) && !defined(CONFIG_SST25_READONLY)
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static inline void sst25_wrdi(struct sst25_dev_s *priv)
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{
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/* Select this FLASH part */
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SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
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/* Send "Write Disable (WRDI)" command */
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(void)SPI_SEND(priv->dev, SST25_WRDI);
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/* Deselect the FLASH */
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SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
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sst25_cmd(priv, SST25_WRDI);
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}
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#endif
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@ -770,6 +757,11 @@ static void sst25_wordwrite(struct sst25_dev_s *priv, FAR const uint8_t *buffer,
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SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
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/* Wait for the preceding write to complete. */
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status = sst25_waitwritecomplete(priv);
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DEBUGASSERT((status & (SST25_SR_WEL|SST25_SR_BP_MASK|SST25_SR_AAI)) == (SST25_SR_WEL|SST25_SR_AAI));
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/* Decrement the word count and advance the write position */
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nwords--;
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@ -785,10 +777,6 @@ static void sst25_wordwrite(struct sst25_dev_s *priv, FAR const uint8_t *buffer,
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(buffer[0] != SST25_ERASED_STATE ||
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buffer[1] != SST25_ERASED_STATE))
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{
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/* Wait for the preceding write to complete. */
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status = sst25_waitwritecomplete(priv);
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DEBUGASSERT((status & (SST25_SR_WEL|SST25_SR_BP_MASK|SST25_SR_AAI)) == (SST25_SR_WEL|SST25_SR_AAI));
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/* Select this FLASH part */
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@ -806,6 +794,11 @@ static void sst25_wordwrite(struct sst25_dev_s *priv, FAR const uint8_t *buffer,
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SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
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/* Wait for the preceding write to complete. */
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status = sst25_waitwritecomplete(priv);
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DEBUGASSERT((status & (SST25_SR_WEL|SST25_SR_BP_MASK|SST25_SR_AAI)) == (SST25_SR_WEL|SST25_SR_AAI));
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/* Decrement the word count and advance the write position */
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nwords--;
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@ -1251,7 +1244,7 @@ FAR struct mtd_dev_s *sst25_initialize(FAR struct spi_dev_s *dev)
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/* Make sure that the FLASH is unprotected so that we can write into it */
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#ifndef CONFIG_SST25_READONLY
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sst25_unprotect(priv->dev);
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sst25_unprotect(priv);
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#endif
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#ifdef CONFIG_SST25_SECTOR512 /* Simulate a 512 byte sector */
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