SH-1 updates
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1142 42af7a65-404d-4744-a932-0658087f49c3
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@ -51,17 +51,7 @@
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* Definitions
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* Definitions
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****************************************************************************/
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****************************************************************************/
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/* IRQ Stack Frame Format:
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/* IRQ Stack Frame Format: */
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*
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* Context is always saved/restored in the same way:
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*
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* (1) stmia rx, {r0-r14}
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* (2) then the PC and CPSR
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*
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* This results in the following set of indices that
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* can be used to access individual registers in the
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* xcp.regs array:
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*/
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#define REG_R0 (0)
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#define REG_R0 (0)
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#define REG_R1 (1)
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#define REG_R1 (1)
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@ -79,71 +69,34 @@
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#define REG_R13 (13)
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#define REG_R13 (13)
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#define REG_R14 (14)
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#define REG_R14 (14)
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#define REG_R15 (15)
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#define REG_R15 (15)
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#define REG_CPSR (16)
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#define REG_SP REG_R15
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#define REG_SR (16)
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#define REG_PC (17)
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#define XCPTCONTEXT_REGS (17)
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#define XCPTCONTEXT_REGS (18)
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#define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS)
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#define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS)
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#define REG_A1 REG_R0
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#define REG_A2 REG_R1
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#define REG_A3 REG_R2
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#define REG_A4 REG_R3
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#define REG_V1 REG_R4
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#define REG_V2 REG_R5
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#define REG_V3 REG_R6
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#define REG_V4 REG_R7
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#define REG_V5 REG_R8
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#define REG_V6 REG_R9
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#define REG_V7 REG_R10
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#define REG_SB REG_R9
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#define REG_SL REG_R10
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#define REG_FP REG_R11
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#define REG_IP REG_R12
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#define REG_SP REG_R13
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#define REG_LR REG_R14
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#define REG_PC REG_R15
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/****************************************************************************
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/****************************************************************************
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* Public Types
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* Public Types
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****************************************************************************/
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****************************************************************************/
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/* This struct defines the way the registers are stored. We
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/* This struct defines the way the registers are stored. We need to save: */
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* need to save:
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*
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* 1 CPSR
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* 7 Static registers, v1-v7 (aka r4-r10)
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* 1 Frame pointer, fp (aka r11)
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* 1 Stack pointer, sp (aka r13)
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* 1 Return address, lr (aka r14)
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* ---
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* 11 (XCPTCONTEXT_USER_REG)
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*
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* On interrupts, we also need to save:
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* 4 Volatile registers, a1-a4 (aka r0-r3)
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* 1 Scratch Register, ip (aka r12)
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*---
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* 5 (XCPTCONTEXT_IRQ_REGS)
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*
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* For a total of 17 (XCPTCONTEXT_REGS)
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*/
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#ifndef __ASSEMBLY__
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#ifndef __ASSEMBLY__
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struct xcptcontext
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struct xcptcontext
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{
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{
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/* The following function pointer is non-zero if there
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/* The following function pointer is non-zero if there are pending signals
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* are pending signals to be processed.
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* to be processed.
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*/
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*/
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#ifndef CONFIG_DISABLE_SIGNALS
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#ifndef CONFIG_DISABLE_SIGNALS
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void *sigdeliver; /* Actual type is sig_deliver_t */
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void *sigdeliver; /* Actual type is sig_deliver_t */
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#endif
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#endif
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/* These are saved copies of LR and CPSR used during
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/* These are saved copies of LR and SR used during signal processing. */
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* signal processing.
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*/
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uint32 saved_pc;
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uint32 saved_pc;
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uint32 saved_cpsr;
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uint32 saved_sr;
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/* Register save area */
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/* Register save area */
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@ -71,7 +71,7 @@ typedef unsigned long long uint64;
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* irqsave()
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* irqsave()
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*/
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*/
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typedef unsigned int irqstate_t;
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typedef unsigned long irqstate_t;
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#endif /* __ASSEMBLY__ */
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#endif /* __ASSEMBLY__ */
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