From a2e4c0e898734ea78a9f22975aeea7eee0e38362 Mon Sep 17 00:00:00 2001
From: Lok Tep <Lok Tep>
Date: Fri, 7 Oct 2016 15:12:34 +0200
Subject: [PATCH] i2s rcc typo fix

---
 arch/arm/src/stm32f7/stm32f74xx75xx_rcc.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/src/stm32f7/stm32f74xx75xx_rcc.c b/arch/arm/src/stm32f7/stm32f74xx75xx_rcc.c
index aac857b9c3..10e4fe2bb5 100644
--- a/arch/arm/src/stm32f7/stm32f74xx75xx_rcc.c
+++ b/arch/arm/src/stm32f7/stm32f74xx75xx_rcc.c
@@ -882,10 +882,10 @@ static void stm32_stdclockconfig(void)
                   | RCC_PLLI2SCFGR_PLLI2SP_MASK
                   | RCC_PLLI2SCFGR_PLLI2SQ_MASK
                   | RCC_PLLI2SCFGR_PLLI2SR_MASK);
-      regval |= (STM32_RCC_PLLSAICFGR_PLLSAIN
-                 | STM32_RCC_PLLSAICFGR_PLLSAIP
-                 | STM32_RCC_PLLSAICFGR_PLLSAIQ
-                 | STM32_RCC_PLLSAICFGR_PLLSAIR);
+      regval |= (STM32_RCC_PLLI2SCFGR_PLLI2SN
+                 | STM32_RCC_PLLI2SCFGR_PLLI2SP
+                 | STM32_RCC_PLLI2SCFGR_PLLI2SQ
+                 | STM32_RCC_PLLI2SCFGR_PLLI2SR);
       putreg32(regval, STM32_RCC_PLLI2SCFGR);
 
       regval  = getreg32(STM32_RCC_DCKCFGR2);