From a2ee73235dc44f2182f8c8627d3ea6cb38adcec5 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 10 Aug 2014 13:11:31 -0600 Subject: [PATCH] Cosmetic changed, updated README files, improved comments --- arch/arm/src/sama5/sam_tickless.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm/src/sama5/sam_tickless.c b/arch/arm/src/sama5/sam_tickless.c index 5999e88fda..68b6a30b5a 100644 --- a/arch/arm/src/sama5/sam_tickless.c +++ b/arch/arm/src/sama5/sam_tickless.c @@ -54,6 +54,27 @@ * logic when the interval timer expires. * ****************************************************************************/ +/**************************************************************************** + * SAMA5 Timer Usage + * + * This current implementation uses two timers: A one-shot timer to provide + * the timed events and a free running timer to provide the current time. + * Since timers are a limited resource, that could be an issue on some + * systems. + * + * We could do the job with a single timer if we were to keep the single + * timer in a free-running at all times. The SAMA5 timer/counters have + * 32-bit counters with the capability to generate a compare interrupt when + * the timer matches a compare value but also to continue counting without + * stopping (giving another, different interrupt when the timer rolls over + * from 0xffffffff to zero). So we could potentially just set the compare + * at the number of ticks you want PLUS the current value of timer. Then + * you could have both with a single timer: An interval timer and a free- + * running counter with the same timer! + * + * Patches are welcome! + * + ****************************************************************************/ /**************************************************************************** * Included Files