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Fix GPIO alternate pin name space issue

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2117 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2009-10-03 16:28:53 +00:00
parent 035724d0f8
commit a314667849
2 changed files with 30 additions and 5 deletions
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18
configs/stm3210e-eval/README.txt
View File

@ -235,11 +235,25 @@ STM3210E-EVAL-specific Configuration Options
Alternate pin mappings (should not be used with the STM3210E-EVAL board):
CONFIG_STM32_TIM1_FULL_REMAP
CONFIG_STM32_TIM1_PARTIAL_REMAP
CONFIG_STM32_TIM2_FULL_REMAP
CONFIG_STM32_TIM2_PARTIAL_REMAP_1
CONFIG_STM32_TIM2_PARTIAL_REMAP_2
CONFIG_STM32_TIM3_FULL_REMAP
CONFIG_STM32_TIM3_PARTIAL_REMAP
CONFIG_STM32_TIM4_REMAP
CONFIG_STM32_USART1_REMAP
CONFIG_STM32_USART2_REMAP
CONFIG_STM32_USART3_PARTIAL_REMAP
CONFIG_STM32_USART3_FULL_REMAP
CONFIG_STM32_USART3_PARTIAL_REMAP
CONFIG_STM32_SPI1_REMAP
CONFIG_STM32_SPI3_REMAP
CONFIG_STM32_I2C1_REMAP
CONFIG_STM32_CAN1_FULL_REMAP
CONFIG_STM32_CAN1_PARTIAL_REMAP
CONFIG_STM32_CAN2_REMAP
STM32F103Z specific device driver settings
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART

17
configs/stm3210e-eval/src/up_spi.c
View File

@ -92,10 +92,20 @@
************************************************************************************/
void weak_function stm32_spiinitialize(void)
{
{
/* NOTE: Clocking for SPI1 and/or SPI2 was already provided in stm32_rcc.c */
#ifdef CONFIG_STM32_SPI1
/* Select SPI1 pin mapping */
uint32 mapr = getreg32(STM32_AFIO_MAPR);
#ifdef CONFIG_STM32_SPI1_REMAP
mapr |= AFIO_MAPR_SPI1_REMAP;
#else
mapr &= ~AFIO_MAPR_SPI1_REMAP;
#endif
putreg32(mapr, STM32_AFIO_MAPR);
/* Configure SPI1 alternate function pins */
stm32_configgpio(GPIO_SPI1_SCK);
@ -107,12 +117,13 @@ void weak_function stm32_spiinitialize(void)
stm32_configgpio(GPIO_MMCSD_CS);
stm32_configgpio(GPIO_FLASH_CS);
#endif
#ifdef CONFIG_STM32_SPI2
/* Configure SPI1 alternate function pins */
stm32_configgpio(GPIO_SPI2_SCK);
stm32_configgpio(GPIO_SPI3_MISO);
stm32_configgpio(GPIO_SPI4_MOSI);
stm32_configgpio(GPIO_SPI2_MISO);
stm32_configgpio(GPIO_SPI2_MOSI);
#endif
}