arch/arm/src/armv7-a/r: fix kconfig error of l2 cache latency
fix the error of the config name and set latency config param bool to int Signed-off-by: luoyong1 <luoyong1@xiaomi.com>
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@ -83,11 +83,11 @@ config PL310_TRCR_TSETLAT
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default 1
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config PL310_TRCR_TRDLAT
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bool "PL310 TRCR read access latency"
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int "PL310 TRCR read access latency"
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default 1
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config PL310_TRCR_WRLAT
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bool "PL310 TRCR write access latency"
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config PL310_TRCR_TWRLAT
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int "PL310 TRCR write access latency"
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default 1
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endif # PL310_TRCR
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@ -96,16 +96,16 @@ config PL310_DRCR
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default n
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if PL310_DRCR
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config PL310_DRCR_TSETLAT
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config PL310_DRCR_DSETLAT
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int "PL310 DRCR setup latency"
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default 1
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config PL310_DRCR_TRDLAT
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bool "PL310 DRCR read access latency"
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config PL310_DRCR_DRDLAT
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int "PL310 DRCR read access latency"
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default 1
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config PL310_DRCR_WRLAT
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bool "PL310 DRCR write access latency"
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config PL310_DRCR_DWRLAT
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int "PL310 DRCR write access latency"
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default 1
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endif # PL310_DRCR
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endif # ARMV7A_L2CC_PL310
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@ -90,11 +90,11 @@ config PL310_TRCR_TSETLAT
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default 1
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config PL310_TRCR_TRDLAT
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bool "PL310 TRCR read access latency"
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int "PL310 TRCR read access latency"
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default 1
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config PL310_TRCR_WRLAT
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bool "PL310 TRCR write access latency"
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config PL310_TRCR_TWRLAT
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int "PL310 TRCR write access latency"
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default 1
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endif # PL310_TRCR
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@ -103,16 +103,16 @@ config PL310_DRCR
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default n
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if PL310_DRCR
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config PL310_DRCR_TSETLAT
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config PL310_DRCR_DSETLAT
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int "PL310 DRCR setup latency"
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default 1
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config PL310_DRCR_TRDLAT
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bool "PL310 DRCR read access latency"
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config PL310_DRCR_DRDLAT
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int "PL310 DRCR read access latency"
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default 1
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config PL310_DRCR_WRLAT
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bool "PL310 DRCR write access latency"
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config PL310_DRCR_DWRLAT
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int "PL310 DRCR write access latency"
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default 1
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endif # PL310_DRCR
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endif # ARMV7R_L2CC_PL310
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