arch/arm/src/tiva, include/nuttx/sensors: Reinstate TM4C qencoder driver and expand its ioctls.

arch/arm/src/tiva/Kconfig:
* Add TIVA_HAVE_QEI0, TIVA_HAVE_QEI1 as applicable to each ARCH_CHIP_TM4C12*.
* Add config TIVA_QEI, TIVA_HAVE_QEI0, TIVA_HAVE_QEI1.
* Add config TIVA_QEI0, config TIVA_QEI1.

arch/arm/src/tiva/common/tiva_qencoder.c:
* Rewrite tiva_qe_setup().
* Replace tiva_qe_ppr() with tiva_qe_resetatppr().
* Add tiva_qe_resetatmaxpos(), tiva_qe_resetatindex().

arch/arm/src/tiva/hardware/tiva_qencoder.h:
* Add missing definitions: SIGMODE_QUADRATURE, SIGMODE_CLK_AND_DIR, SWAP_NO_SWAP, SWAP_PHA_PHB.

arch/arm/src/tiva/tiva_qencoder.h:
* Rename TIVA QEI ioctl QEIOC_PPR to QEIOC_RESETATPPR.
* Add TIVA QEI ioctl identifiers QEIOC_RESETATMAXPOS, QEIOC_RESETATINDEX.

include/nuttx/sensors/qencoder.h:
* Increase QE_TIVA_NCMDS from 3 to 5.
This commit is contained in:
Nathan Hartman 2019-08-02 15:56:05 -06:00 committed by Gregory Nutt
parent 8e321aba84
commit a36d49e975
5 changed files with 206 additions and 56 deletions

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@ -91,6 +91,8 @@ config ARCH_CHIP_TM4C123GH6ZRB
select TIVA_HAVE_GPIOQ_IRQS select TIVA_HAVE_GPIOQ_IRQS
select TIVA_HAVE_I2C4 select TIVA_HAVE_I2C4
select TIVA_HAVE_I2C5 select TIVA_HAVE_I2C5
select TIVA_HAVE_QEI0
select TIVA_HAVE_QEI1
config ARCH_CHIP_TM4C123GH6PM config ARCH_CHIP_TM4C123GH6PM
bool "TM4C123GH6PM" bool "TM4C123GH6PM"
@ -105,6 +107,8 @@ config ARCH_CHIP_TM4C123GH6PM
select TIVA_HAVE_GPIOF_IRQS select TIVA_HAVE_GPIOF_IRQS
select TIVA_HAVE_ADC0 select TIVA_HAVE_ADC0
select TIVA_HAVE_ADC1 select TIVA_HAVE_ADC1
select TIVA_HAVE_QEI0
select TIVA_HAVE_QEI1
config ARCH_CHIP_TM4C1294NCPDT config ARCH_CHIP_TM4C1294NCPDT
bool "TM4C1294NCPDT" bool "TM4C1294NCPDT"
@ -122,6 +126,7 @@ config ARCH_CHIP_TM4C1294NCPDT
select TIVA_HAVE_GPION_IRQS select TIVA_HAVE_GPION_IRQS
select TIVA_HAVE_GPIOP_IRQS select TIVA_HAVE_GPIOP_IRQS
select TIVA_HAVE_GPIOQ_IRQS select TIVA_HAVE_GPIOQ_IRQS
select TIVA_HAVE_QEI0
config ARCH_CHIP_TM4C129XNC config ARCH_CHIP_TM4C129XNC
bool "TM4C129XNC" bool "TM4C129XNC"
@ -141,6 +146,7 @@ config ARCH_CHIP_TM4C129XNC
select TIVA_HAVE_GPIOR_IRQS select TIVA_HAVE_GPIOR_IRQS
select TIVA_HAVE_GPIOS_IRQS select TIVA_HAVE_GPIOS_IRQS
select TIVA_HAVE_GPIOT_IRQS select TIVA_HAVE_GPIOT_IRQS
select TIVA_HAVE_QEI0
config ARCH_CHIP_CC1310 config ARCH_CHIP_CC1310
bool "CC1310 SimpleLink" bool "CC1310 SimpleLink"
@ -315,6 +321,18 @@ config TIVA_HAVE_ADC1
bool bool
default n default n
config TIVA_QEI
bool
default n
config TIVA_HAVE_QEI0
bool
default n
config TIVA_HAVE_QEI1
bool
default n
config TIVA_I2C config TIVA_I2C
bool bool
default n default n
@ -462,6 +480,18 @@ config TIVA_ADC1
depends on TIVA_HAVE_ADC0 depends on TIVA_HAVE_ADC0
select TIVA_ADC select TIVA_ADC
config TIVA_QEI0
bool "QEI0"
default n
depends on TIVA_HAVE_QEI0
select TIVA_QEI
config TIVA_QEI1
bool "QEI1"
default n
depends on TIVA_HAVE_QEI1
select TIVA_QEI
config TIVA_I2C0 config TIVA_I2C0
bool "I2C0" bool "I2C0"
default n default n

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@ -94,7 +94,9 @@ static int tiva_qe_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd,
static int tiva_qe_direction(struct tiva_qe_s *qe, unsigned long *dir); static int tiva_qe_direction(struct tiva_qe_s *qe, unsigned long *dir);
static int tiva_qe_velocity(struct tiva_qe_s *qe, unsigned long *vel); static int tiva_qe_velocity(struct tiva_qe_s *qe, unsigned long *vel);
static int tiva_qe_ppr(struct tiva_qe_s *qe, unsigned long ppr); static int tiva_qe_resetatppr(struct tiva_qe_s *qe, unsigned long ppr);
static int tiva_qe_resetatmaxpos(FAR struct tiva_qe_s *qe, unsigned long offs);
static int tiva_qe_resetatindex(FAR struct tiva_qe_s *qe);
/************************************************************************************ /************************************************************************************
* Private Data * Private Data
@ -216,23 +218,51 @@ static int tiva_qe_setup(FAR struct qe_lowerhalf_s *lower)
return -1; return -1;
} }
/* Set reset mode (default as INDEX_PULSE) */ /* Get initial value of register */
ctlreg = RESMODE_BY_INDEX_PULSE << TIVA_QEI_CTL_RESMODE; ctlreg = tiva_qe_getreg(qe, TIVA_QEI_CTL_OFFSET);
tiva_qe_putreg(qe, TIVA_QEI_CTL_OFFSET, ctlreg);
/* Turn off the bits we're about to control */
ctlreg &= ~(uint32_t)((1 << TIVA_QEI_CTL_RESMODE) |
(1 << TIVA_QEI_CTL_CAPMODE) |
(1 << TIVA_QEI_CTL_VELEN) |
(1 << TIVA_QEI_CTL_SIGMODE) |
(1 << TIVA_QEI_CTL_SWAP));
/* Set reset mode (default as MAXPOS) */
ctlreg |= RESMODE_BY_MAXPOS << TIVA_QEI_CTL_RESMODE;
/* Set capture mode (default as PHA_AND_PHB) */ /* Set capture mode (default as PHA_AND_PHB) */
ctlreg = tiva_qe_getreg(qe, TIVA_QEI_CTL_OFFSET);
ctlreg |= CAPMODE_PHA_AND_PHB << TIVA_QEI_CTL_CAPMODE; ctlreg |= CAPMODE_PHA_AND_PHB << TIVA_QEI_CTL_CAPMODE;
tiva_qe_putreg(qe, TIVA_QEI_CTL_OFFSET, ctlreg);
/* Enable velocity capture */ /* Enable velocity capture */
ctlreg = tiva_qe_getreg(qe, TIVA_QEI_CTL_OFFSET);
ctlreg |= VELEN_ENABLE << TIVA_QEI_CTL_VELEN; ctlreg |= VELEN_ENABLE << TIVA_QEI_CTL_VELEN;
/* Set signal mode (default as quadrature) */
ctlreg |= SIGMODE_QUADRATURE << TIVA_QEI_CTL_SIGMODE;
/* Set swap mode (default as no swap) */
ctlreg |= SWAP_NO_SWAP << TIVA_QEI_CTL_SWAP;
/* Program the register */
tiva_qe_putreg(qe, TIVA_QEI_CTL_OFFSET, ctlreg); tiva_qe_putreg(qe, TIVA_QEI_CTL_OFFSET, ctlreg);
/* Set default maxpos value to entire uint32_t range */
qe->maxpos = UINT32_MAX;
tiva_qe_putreg(qe, TIVA_QEI_MAXPOS_OFFSET, qe->maxpos);
/* Reset the position */
tiva_qe_putreg(qe, TIVA_QEI_POS_OFFSET, 0);
/* Set prediv (1) */ /* Set prediv (1) */
ctlreg = tiva_qe_getreg(qe, TIVA_QEI_CTL_OFFSET); ctlreg = tiva_qe_getreg(qe, TIVA_QEI_CTL_OFFSET);
@ -365,8 +395,16 @@ static int tiva_qe_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd,
tiva_qe_velocity(qe, (unsigned long *)arg); tiva_qe_velocity(qe, (unsigned long *)arg);
break; break;
case QEIOC_PPR: case QEIOC_RESETATPPR:
tiva_qe_ppr(qe, arg); tiva_qe_resetatppr(qe, arg);
break;
case QEIOC_RESETATMAXPOS:
tiva_qe_resetatmaxpos(qe, arg);
break;
case QEIOC_RESETATINDEX:
tiva_qe_resetatindex(qe);
break; break;
default: default:
@ -432,10 +470,13 @@ static int tiva_qe_velocity(FAR struct tiva_qe_s *qe, unsigned long *vel)
} }
/**************************************************************************** /****************************************************************************
* Name: tiva_qe_ppr * Name: tiva_qe_resetatppr
* *
* Description: * Description:
* Set reset mode as MAXPOS and also set maxpos value * Set reset mode as MAXPOS and set maxpos value to number of pulses
* per round of encoder. Note that this function multiplies the given
* ppr by 4 because capture mode is PHA_AND_PHB, meaning we count 4
* edges per "pulse."
* *
* Input Parameters: * Input Parameters:
* qe - A reference to the TIVA QEI structure * qe - A reference to the TIVA QEI structure
@ -446,7 +487,30 @@ static int tiva_qe_velocity(FAR struct tiva_qe_s *qe, unsigned long *vel)
* *
****************************************************************************/ ****************************************************************************/
static int tiva_qe_ppr(FAR struct tiva_qe_s *qe, unsigned long ppr) static int tiva_qe_resetatppr(FAR struct tiva_qe_s *qe, unsigned long ppr)
{
/* maxpos is 4 times of ppr since we set capture mode as PHA_AND_PHB */
return tiva_qe_resetatmaxpos(qe, ppr * 4);
}
/****************************************************************************
* Name: tiva_qe_resetatmaxpos
*
* Description:
* Set reset mode as MAXPOS and set maxpos value as given.
*
* Input Parameters:
* qe - A reference to the TIVA QEI structure
* maxpos - Maximum position count at which QEI resets. To get the full
* range, give UINT32_MAX.
*
* Returned Value:
* Zero on success; a negated errno value on failure
*
****************************************************************************/
static int tiva_qe_resetatmaxpos(FAR struct tiva_qe_s *qe, unsigned long maxpos)
{ {
sninfo("set maxpos reset mode and maxpos value of QEI %d\n", qe->id); sninfo("set maxpos reset mode and maxpos value of QEI %d\n", qe->id);
@ -458,9 +522,7 @@ static int tiva_qe_ppr(FAR struct tiva_qe_s *qe, unsigned long ppr)
lower = (FAR struct qe_lowerhalf_s *)qe; lower = (FAR struct qe_lowerhalf_s *)qe;
tiva_qe_shutdown(lower); tiva_qe_shutdown(lower);
/* maxpos is 4 times of ppr since we set capture mode as PHA_AND_PHB */ qe->maxpos = maxpos;
qe->maxpos = ppr * 4;
/* Set reset mode as MAXPOS */ /* Set reset mode as MAXPOS */
@ -482,6 +544,48 @@ static int tiva_qe_ppr(FAR struct tiva_qe_s *qe, unsigned long ppr)
return OK; return OK;
} }
/****************************************************************************
* Name: tiva_qe_resetatindex
*
* Description:
* Set reset mode as INDEX
*
* Input Parameters:
* qe - A reference to the TIVA QEI structure
*
* Returned Value:
* Zero on success; a negated errno value on failure
*
****************************************************************************/
static int tiva_qe_resetatindex(FAR struct tiva_qe_s *qe)
{
sninfo("set index reset mode of QEI %d\n", qe->id);
FAR struct qe_lowerhalf_s *lower;
uint32_t ctlreg = 0;
/* Disable the QEI */
lower = (FAR struct qe_lowerhalf_s *)qe;
tiva_qe_shutdown(lower);
/* Set reset mode as INDEX */
ctlreg = tiva_qe_getreg(qe, TIVA_QEI_CTL_OFFSET);
ctlreg &= ~(uint32_t)(1 << TIVA_QEI_CTL_RESMODE);
ctlreg |= RESMODE_BY_INDEX_PULSE << TIVA_QEI_CTL_RESMODE;
tiva_qe_putreg(qe, TIVA_QEI_CTL_OFFSET, ctlreg);
/* Enable the QEI */
ctlreg = tiva_qe_getreg(qe, TIVA_QEI_CTL_OFFSET);
ctlreg |= QEI_ENABLE << TIVA_QEI_CTL_ENABLE;
tiva_qe_putreg(qe, TIVA_QEI_CTL_OFFSET, ctlreg);
return OK;
}
/************************************************************************************ /************************************************************************************
* Name: tiva_qei_initialize * Name: tiva_qei_initialize
* *

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@ -56,14 +56,14 @@
#define TIVA_QEI_RIS_OFFSET (0x24) /* QEI Raw Interrupt Status */ #define TIVA_QEI_RIS_OFFSET (0x24) /* QEI Raw Interrupt Status */
#define TIVA_QEI_ISC_OFFSET (0x28) /* QEI Interrupt Status and Clear */ #define TIVA_QEI_ISC_OFFSET (0x28) /* QEI Interrupt Status and Clear */
/* QEI_CTL register */
#define TIVA_QEI_CTL_FILTCNT (16) /* (Bit) Input Filter Prescale Count */ #define TIVA_QEI_CTL_FILTCNT (16) /* (Bit) Input Filter Prescale Count */
#define TIVA_QEI_CTL_FILTEN (13) /* (Bit) Enable Input Filter */ #define TIVA_QEI_CTL_FILTEN (13) /* (Bit) Enable Input Filter */
#define TIVA_QEI_CTL_STALLEN (12) /* (Bit) Stall QEI */ #define TIVA_QEI_CTL_STALLEN (12) /* (Bit) Stall QEI */
#define TIVA_QEI_CTL_INVI (11) /* (Bit) Invert Index Pulse */ #define TIVA_QEI_CTL_INVI (11) /* (Bit) Invert Index Pulse */
#define TIVA_QEI_CTL_INVB (10) /* (Bit) Invert PhB */ #define TIVA_QEI_CTL_INVB (10) /* (Bit) Invert PhB */
#define TIVA_QEI_CTL_INVA (9) /* (Bit) Invert PhA */ #define TIVA_QEI_CTL_INVA (9) /* (Bit) Invert PhA */
#define TIVA_QEI_CTL_SIGMODE (2) /* (Bit) Signal Mode */
#define TIVA_QEI_CTL_SWAP (1) /* (Bit) Swap Signals */
#define TIVA_QEI_CTL_VELDIV (6) /* (Bit) Predivide Velocity */ #define TIVA_QEI_CTL_VELDIV (6) /* (Bit) Predivide Velocity */
#define VELDIV_1 (0x0) /* (Value) Divided by 1 */ #define VELDIV_1 (0x0) /* (Value) Divided by 1 */
@ -87,12 +87,23 @@
#define CAPMODE_ONLY_PHA (0) /* (Value) Count PhA both edges */ #define CAPMODE_ONLY_PHA (0) /* (Value) Count PhA both edges */
#define CAPMODE_PHA_AND_PHB (1) /* (Value) Count PhA and PhB both edges */ #define CAPMODE_PHA_AND_PHB (1) /* (Value) Count PhA and PhB both edges */
#define TIVA_QEI_CTL_SIGMODE (2) /* (Bit) Signal Mode */
#define SIGMODE_QUADRATURE (0) /* (Value) PhA and PhB are Quadrature signals */
#define SIGMODE_CLK_AND_DIR (1) /* (Value) PhA is CLK, PhB is DIR */
#define TIVA_QEI_CTL_SWAP (1) /* (Bit) Swap PhA/PhB Signals */
#define SWAP_NO_SWAP (0) /* (Value) No swapping */
#define SWAP_PHA_PHB (1) /* (Value) Swap PhA and PhB */
#define TIVA_QEI_CTL_ENABLE (0) /* (Bit) Enable QEI */ #define TIVA_QEI_CTL_ENABLE (0) /* (Bit) Enable QEI */
#define QEI_DISABLE (0) /* (Value) Disable QEI */ #define QEI_DISABLE (0) /* (Value) Disable QEI */
#define QEI_ENABLE (1) /* (Value) Enable QEI */ #define QEI_ENABLE (1) /* (Value) Enable QEI */
/* QEI_STAT register */
#define TIVA_QEI_STAT_DIRECTION (1) /* (Bit) Direction of Rotation */ #define TIVA_QEI_STAT_DIRECTION (1) /* (Bit) Direction of Rotation */
#define DIRECTION_FORWARD (0) /* (Value) Forward */ #define DIRECTION_FORWARD (0) /* (Value) Forward */
#define DIRECTION_BACKWARD (1) /* (Value) Backward */ #define DIRECTION_BACKWARD (1) /* (Value) Backward */
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_QENCODER_H */ #endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_QENCODER_H */

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@ -1,44 +1,44 @@
/************************************************************************************ /************************************************************************************
* arch/arm/src/tiva/tiva_qencoder.h * arch/arm/src/tiva/tiva_qencoder.h
* *
* Copyright (C) 2016 Young Mu. All rights reserved. * Copyright (C) 2016 Young Mu. All rights reserved.
* Author: Young Mu <young.mu@aliyun.com> * Author: Young Mu <young.mu@aliyun.com>
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
* are met: * are met:
* *
* 1. Redistributions of source code must retain the above copyright * 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer. * notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright * 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in * notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the * the documentation and/or other materials provided with the
* distribution. * distribution.
* 3. Neither the name NuttX nor the names of its contributors may be * 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software * used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE. * POSSIBILITY OF SUCH DAMAGE.
* *
************************************************************************************/ ************************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_TIVA_QENCODER_H #ifndef __ARCH_ARM_SRC_TIVA_TIVA_QENCODER_H
#define __ARCH_ARM_SRC_TIVA_TIVA_QENCODER_H #define __ARCH_ARM_SRC_TIVA_TIVA_QENCODER_H
/************************************************************************************ /************************************************************************************
* Included Files * Included Files
************************************************************************************/ ************************************************************************************/
#include <nuttx/sensors/qencoder.h> #include <nuttx/sensors/qencoder.h>
@ -48,11 +48,13 @@
#define QEIOC_DIRECTION _QEIOC(QE_TIVA_FIRST) #define QEIOC_DIRECTION _QEIOC(QE_TIVA_FIRST)
#define QEIOC_VELOCITY _QEIOC(QE_TIVA_FIRST+1) #define QEIOC_VELOCITY _QEIOC(QE_TIVA_FIRST+1)
#define QEIOC_PPR _QEIOC(QE_TIVA_FIRST+2) #define QEIOC_RESETATPPR _QEIOC(QE_TIVA_FIRST+2)
#define QEIOC_RESETATMAXPOS _QEIOC(QE_TIVA_FIRST+3)
#define QEIOC_RESETATINDEX _QEIOC(QE_TIVA_FIRST+4)
/**************************************************************************** /****************************************************************************
* Public Function Prototypes * Public Function Prototypes
****************************************************************************/ ****************************************************************************/
FAR struct qe_lowerhalf_s *tiva_qei_initialize(int id); FAR struct qe_lowerhalf_s *tiva_qei_initialize(int id);

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@ -48,11 +48,13 @@
/**************************************************************************** /****************************************************************************
* Pre-processor Definitions * Pre-processor Definitions
****************************************************************************/ ****************************************************************************/
/* Configuration ************************************************************ /* Configuration ************************************************************
* CONFIG_SENSORS_QENCODER - Enables support for the quadrature encoder upper half * CONFIG_SENSORS_QENCODER - Enables support for the quadrature encoder upper half
*/ */
/* IOCTL Commands ***********************************************************/ /* IOCTL Commands ***********************************************************/
/* The Quadrature Encode module uses a standard character driver framework. /* The Quadrature Encode module uses a standard character driver framework.
* However, since the driver is a device control interface rather than a * However, since the driver is a device control interface rather than a
* data transfer interface, the majority of the functionality is implemented * data transfer interface, the majority of the functionality is implemented
@ -80,7 +82,7 @@
/* See arch/arm/src/tiva/tiva_qencoder.h (Not usable at that location) */ /* See arch/arm/src/tiva/tiva_qencoder.h (Not usable at that location) */
#define QE_TIVA_FIRST (QE_FIRST + QE_NCMDS) #define QE_TIVA_FIRST (QE_FIRST + QE_NCMDS)
#define QE_TIVA_NCMDS 3 #define QE_TIVA_NCMDS 5
/* See include/nuttx/sensors/as5048b.h */ /* See include/nuttx/sensors/as5048b.h */
@ -90,6 +92,7 @@
/**************************************************************************** /****************************************************************************
* Public Types * Public Types
****************************************************************************/ ****************************************************************************/
/* This is the vtable that is used to by the upper half quadrature encoder /* This is the vtable that is used to by the upper half quadrature encoder
* to call back into the lower half quadrature encoder. * to call back into the lower half quadrature encoder.
*/ */