tiva/cc13x2_cc26x2: Fix nxstyle errors
arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_prcm.h: * Fix nxstyle errors.
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@ -1,10 +1,11 @@
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/****************************************************************************************************
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/****************************************************************************
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* arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_prcm.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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*
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* Technical content derives from a TI header file that has a compatible BSD license:
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* Technical content derives from a TI header file that has a compatible BSD
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* license:
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*
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* Copyright (c) 2015-2017, Texas Instruments Incorporated
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* All rights reserved.
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@ -36,23 +37,23 @@
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************************************/
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_PRCM_H
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#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_PRCM_H
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/****************************************************************************************************
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/****************************************************************************
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* Included Files
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****************************************************************************************************/
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****************************************************************************/
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#include <nuttx/config.h>
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#include "hardware/tiva_memorymap.h"
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/****************************************************************************************************
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************************************/
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****************************************************************************/
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/* PRCM Register Offsets ****************************************************************************/
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/* PRCM Register Offsets ****************************************************/
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#define TIVA_PRCM_INFRCLKDIVR_OFFSET 0x0000 /* Infrastructure Clock Division Factor For Run Mode */
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#define TIVA_PRCM_INFRCLKDIVS_OFFSET 0x0004 /* Infrastructure Clock Division Factor For Sleep Mode */
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@ -126,7 +127,7 @@
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#define TIVA_PRCM_OSCRIS_OFFSET 0x0294 /* Oscillator Raw Interrupt Status */
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#define TIVA_PRCM_OSCICR_OFFSET 0x0298 /* Oscillator Raw Interrupt Clear */
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/* PRCM Register Addresses *************************************************************************/
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/* PRCM Register Addresses **************************************************/
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#define TIVA_PRCM_INFRCLKDIVR (TIVA_PRCM_BASE + TIVA_PRCM_INFRCLKDIVR_OFFSET)
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#define TIVA_PRCM_INFRCLKDIVS (TIVA_PRCM_BASE + TIVA_PRCM_INFRCLKDIVS_OFFSET)
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@ -200,7 +201,7 @@
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#define TIVA_PRCM_OSCRIS (TIVA_PRCM_BASE + TIVA_PRCM_OSCRIS_OFFSET)
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#define TIVA_PRCM_OSCICR (TIVA_PRCM_BASE + TIVA_PRCM_OSCICR_OFFSET)
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/* PRCM Register Bitfield Definitions **************************************************************/
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/* PRCM Register Bitfield Definitions ***************************************/
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/* Infrastructure Clock Division Factor For Run Mode */
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@ -265,7 +266,9 @@
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#define PRCM_SECDMACLKG_DMA_CLKEN_SHIFT (8) /* Bit 8: Enable DMA clock */
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#define PRCM_SECDMACLKG_DMA_CLKEN (1 << PRCM_SECDMACLKG_DMA_CLKEN_SHIFT)
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/* SEC (PKA And TRNG And CRYPTO) And UDMA Clock Gate For Run And All Modes (only) */
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/* SEC (PKA And TRNG And CRYPTO) And UDMA Clock Gate For Run And All Modes
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* (only)
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*/
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#define PRCM_SECDMACLKGR_CRYPTO_AMCLKEN (1 << 16) /* Bit 16: Force Crypto clock on all modes */
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#define PRCM_SECDMACLKGR_TRNG_AMCLKEN (1 << 17) /* Bit 17: Force TRNG clock on all modes */
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@ -416,14 +419,14 @@
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/* I2S Clock Control */
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#define PRCM_I2SCLKCTL_EN (1 << 0) /* Enable MCLK, BCLK, and WCLK */
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#define PRCM_I2SCLKCTL_WCLKPHASE_SHIFT 1 /* Bits 1-2: Wclock division ration mode */
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#define PRCM_I2SCLKCTL_EN (1 << 0) /* Enable MCLK, BCLK, and WCLK */
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#define PRCM_I2SCLKCTL_WCLKPHASE_SHIFT 1 /* Bits 1-2: Wclock division ration mode */
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#define PRCM_I2SCLKCTL_WCLKPHASE_MASK (3 << PRCM_I2SCLKCTL_WCLKPHASE_SHIFT)
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# define PRCM_I2SCLKCTL_WCLKPHASE_SINGLE (0 << PRCM_I2SCLKCTL_WCLKPHASE_SHIFT) /* Single phase */
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# define PRCM_I2SCLKCTL_WCLKPHASE_DUAL (1 << PRCM_I2SCLKCTL_WCLKPHASE_SHIFT) /* Dual phase */
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# define PRCM_I2SCLKCTL_WCLKPHASE_USER (2 << PRCM_I2SCLKCTL_WCLKPHASE_SHIFT) /* User Defined */
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#define PRCM_I2SCLKCTL_POSEDGE (1 << 3) /* Bit 3: Sample/clock on positive edge */
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# define PRCM_I2SCLKCTL_NEGEDGE (0) /* Sample/clock on negative edge */
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#define PRCM_I2SCLKCTL_POSEDGE (1 << 3) /* Bit 3: Sample/clock on positive edge */
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# define PRCM_I2SCLKCTL_NEGEDGE (0) /* Sample/clock on negative edge */
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/* MCLK Division Ratio */
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@ -621,16 +624,16 @@
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#define PRCM_OSCINT_LFSRCDONE (1 << 6) /* Bit 6: LFSRCDONE interrupt */
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#define PRCM_OSCINT_HFSRCPEND (1 << 7) /* Bit 7: HFSRCPEND interrupt */
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/****************************************************************************************************
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/****************************************************************************
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* Public Types
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****************************************************************************************************/
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****************************************************************************/
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/****************************************************************************************************
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/****************************************************************************
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* Public Data
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****************************************************************************************************/
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****************************************************************************/
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/****************************************************************************************************
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************************************/
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****************************************************************************/
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#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_PRCM_H */
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