Check return from nxsem_wait_uninterruptible()
This commits is for all 1wire drivers under arch/
This commit is contained in:
Ouss4
patacongo
parent
13b229a9eb
commit
a447ec616d
@ -129,14 +129,14 @@ struct stm32_1wire_config_s
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struct stm32_1wire_priv_s
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{
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const struct stm32_1wire_config_s *config; /* Port configuration */
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volatile int refs; /* Referernce count */
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sem_t sem_excl; /* Mutual exclusion semaphore */
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sem_t sem_isr; /* Interrupt wait semaphore */
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int baud; /* Baud rate */
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const struct stm32_1wire_msg_s *msgs; /* Messages data */
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uint8_t *byte; /* Current byte */
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uint8_t bit; /* Current bit */
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volatile int result; /* Exchange result */
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volatile int refs; /* Referernce count */
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sem_t sem_excl; /* Mutual exclusion semaphore */
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sem_t sem_isr; /* Interrupt wait semaphore */
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int baud; /* Baud rate */
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const struct stm32_1wire_msg_s *msgs; /* Messages data */
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uint8_t *byte; /* Current byte */
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uint8_t bit; /* Current bit */
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volatile int result; /* Exchange result */
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};
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/* 1-Wire device, Instance */
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@ -151,20 +151,25 @@ struct stm32_1wire_inst_s
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* Private Function Prototypes
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****************************************************************************/
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static inline uint32_t stm32_1wire_in(struct stm32_1wire_priv_s *priv, int offset);
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static inline void stm32_1wire_out(struct stm32_1wire_priv_s *priv, int offset, uint32_t value);
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static inline uint32_t stm32_1wire_in(struct stm32_1wire_priv_s *priv,
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int offset);
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static inline void stm32_1wire_out(struct stm32_1wire_priv_s *priv,
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int offset, uint32_t value);
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static int stm32_1wire_recv(struct stm32_1wire_priv_s *priv);
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static void stm32_1wire_send(struct stm32_1wire_priv_s *priv, int ch);
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static void stm32_1wire_set_baud(struct stm32_1wire_priv_s *priv);
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static void stm32_1wire_set_apb_clock(struct stm32_1wire_priv_s *priv, bool on);
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static void stm32_1wire_set_apb_clock(struct stm32_1wire_priv_s *priv,
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bool on);
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static int stm32_1wire_init(FAR struct stm32_1wire_priv_s *priv);
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static int stm32_1wire_deinit(FAR struct stm32_1wire_priv_s *priv);
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static inline void stm32_1wire_sem_init(FAR struct stm32_1wire_priv_s *priv);
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static inline void stm32_1wire_sem_destroy(FAR struct stm32_1wire_priv_s *priv);
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static inline void stm32_1wire_sem_wait(FAR struct stm32_1wire_priv_s *priv);
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static inline void stm32_1wire_sem_destroy(
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FAR struct stm32_1wire_priv_s *priv);
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static inline int stm32_1wire_sem_wait(FAR struct stm32_1wire_priv_s *priv);
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static inline void stm32_1wire_sem_post(FAR struct stm32_1wire_priv_s *priv);
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static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
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FAR const struct stm32_1wire_msg_s *msgs, int count);
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FAR const struct stm32_1wire_msg_s *msgs,
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int count);
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static int stm32_1wire_isr(int irq, void *context, void *arg);
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static int stm32_1wire_reset(FAR struct onewire_dev_s *dev);
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static int stm32_1wire_write(FAR struct onewire_dev_s *dev,
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@ -174,7 +179,8 @@ static int stm32_1wire_read(FAR struct onewire_dev_s *dev, uint8_t *buffer,
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static int stm32_1wire_exchange(FAR struct onewire_dev_s *dev, bool reset,
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const uint8_t *txbuffer, int txbuflen,
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uint8_t *rxbuffer, int rxbuflen);
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static int stm32_1wire_writebit(FAR struct onewire_dev_s *dev, const uint8_t *bit);
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static int stm32_1wire_writebit(FAR struct onewire_dev_s *dev,
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const uint8_t *bit);
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static int stm32_1wire_readbit(FAR struct onewire_dev_s *dev, uint8_t *bit);
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/****************************************************************************
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@ -422,7 +428,8 @@ static void stm32_1wire_set_baud(struct stm32_1wire_priv_s *priv)
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* usartdiv8 = 2 * fCK / baud
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*/
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usartdiv8 = ((priv->config->apbclock << 1) + (priv->baud >> 1)) / priv->baud;
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usartdiv8 = ((priv->config->apbclock << 1) + (priv->baud >> 1)) /
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priv->baud;
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/* Baud rate for standard USART (SPI mode included):
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*
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@ -458,8 +465,8 @@ static void stm32_1wire_set_baud(struct stm32_1wire_priv_s *priv)
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cr1 |= USART_CR1_OVER8;
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}
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stm32_1wire_out(priv, STM32_USART_CR1_OFFSET, cr1);
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stm32_1wire_out(priv, STM32_USART_BRR_OFFSET, brr);
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stm32_1wire_out(priv, STM32_USART_CR1_OFFSET, cr1);
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stm32_1wire_out(priv, STM32_USART_BRR_OFFSET, brr);
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#else
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@ -479,8 +486,8 @@ static void stm32_1wire_set_baud(struct stm32_1wire_priv_s *priv)
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* baud = fCK / (16 * usartdiv)
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* usartdiv = fCK / (16 * baud)
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*
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* Where fCK is the input clock to the peripheral (PCLK1 for USART2, 3, 4, 5
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* or PCLK2 for USART1)
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* Where fCK is the input clock to the peripheral (PCLK1 for USART2, 3, 4,
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* 5 or PCLK2 for USART1)
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*
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* First calculate (NOTE: all stand baud values are even so dividing by two
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* does not lose precision):
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@ -609,9 +616,10 @@ static int stm32_1wire_init(FAR struct stm32_1wire_priv_s *priv)
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stm32_1wire_set_apb_clock(priv, true);
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/* Configure CR2 */
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/* Clear STOP, CLKEN, CPOL, CPHA, LBCL, and interrupt enable bits */
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/* Set LBDIE */
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/* Configure CR2
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* Clear STOP, CLKEN, CPOL, CPHA, LBCL, and interrupt enable bits
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* Set LBDIE
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*/
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regval = stm32_1wire_in(priv, STM32_USART_CR2_OFFSET);
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regval &= ~(USART_CR2_STOP_MASK | USART_CR2_CLKEN | USART_CR2_CPOL |
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@ -619,9 +627,10 @@ static int stm32_1wire_init(FAR struct stm32_1wire_priv_s *priv)
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regval |= USART_CR2_LBDIE;
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stm32_1wire_out(priv, STM32_USART_CR2_OFFSET, regval);
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/* Configure CR1 */
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/* Clear TE, REm, all interrupt enable bits, PCE, PS and M */
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/* Set RXNEIE */
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/* Configure CR1
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* Clear TE, REm, all interrupt enable bits, PCE, PS and M
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* Set RXNEIE
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*/
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regval = stm32_1wire_in(priv, STM32_USART_CR1_OFFSET);
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regval &= ~(USART_CR1_TE | USART_CR1_RE | USART_CR1_ALLINTS |
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@ -629,12 +638,14 @@ static int stm32_1wire_init(FAR struct stm32_1wire_priv_s *priv)
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regval |= USART_CR1_RXNEIE;
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stm32_1wire_out(priv, STM32_USART_CR1_OFFSET, regval);
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/* Configure CR3 */
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/* Clear CTSE, RTSE, and all interrupt enable bits */
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/* Set ONEBIT, HDSEL and EIE */
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/* Configure CR3
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* Clear CTSE, RTSE, and all interrupt enable bits
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* Set ONEBIT, HDSEL and EIE
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*/
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regval = stm32_1wire_in(priv, STM32_USART_CR3_OFFSET);
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regval &= ~(USART_CR3_CTSIE | USART_CR3_CTSE | USART_CR3_RTSE | USART_CR3_EIE);
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regval &= ~(USART_CR3_CTSIE | USART_CR3_CTSE | USART_CR3_RTSE |
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USART_CR3_EIE);
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regval |= (USART_CR3_ONEBIT | USART_CR3_HDSEL | USART_CR3_EIE);
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stm32_1wire_out(priv, STM32_USART_CR3_OFFSET, regval);
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@ -735,7 +746,8 @@ static inline void stm32_1wire_sem_init(FAR struct stm32_1wire_priv_s *priv)
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*
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****************************************************************************/
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static inline void stm32_1wire_sem_destroy(FAR struct stm32_1wire_priv_s *priv)
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static inline void stm32_1wire_sem_destroy(
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FAR struct stm32_1wire_priv_s *priv)
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{
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nxsem_destroy(&priv->sem_excl);
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nxsem_destroy(&priv->sem_isr);
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@ -749,9 +761,9 @@ static inline void stm32_1wire_sem_destroy(FAR struct stm32_1wire_priv_s *priv)
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*
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****************************************************************************/
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static inline void stm32_1wire_sem_wait(FAR struct stm32_1wire_priv_s *priv)
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static inline int stm32_1wire_sem_wait(FAR struct stm32_1wire_priv_s *priv)
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{
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nxsem_wait_uninterruptible(&priv->sem_excl);
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return nxsem_wait_uninterruptible(&priv->sem_excl);
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}
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/****************************************************************************
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@ -773,6 +785,7 @@ static inline void stm32_1wire_sem_post(FAR struct stm32_1wire_priv_s *priv)
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* Description:
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* Execute 1-Wire task
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****************************************************************************/
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static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
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FAR const struct stm32_1wire_msg_s *msgs,
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int count)
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@ -784,7 +797,11 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
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/* Lock out other clients */
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stm32_1wire_sem_wait(priv);
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ret = stm32_1wire_sem_wait(priv);
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if (ret < 0)
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{
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return ret;
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}
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priv->result = ERROR;
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@ -797,6 +814,7 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
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break;
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case ONEWIRETASK_RESET:
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/* Set baud rate */
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priv->baud = RESET_BAUD;
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@ -818,6 +836,7 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
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case ONEWIRETASK_WRITE:
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case ONEWIRETASK_WRITEBIT:
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/* Set baud rate */
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priv->baud = TIMESLOT_BAUD;
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@ -829,7 +848,8 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
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priv->msgs = &msgs[indx];
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priv->byte = priv->msgs->buffer;
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priv->bit = 0;
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stm32_1wire_send(priv, (*priv->byte & (1 << priv->bit)) ? WRITE_TX1 : WRITE_TX0);
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stm32_1wire_send(priv, (*priv->byte & (1 << priv->bit)) ?
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WRITE_TX1 : WRITE_TX0);
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leave_critical_section(irqs);
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/* Wait. Break on timeout if TX line closed to GND */
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@ -841,6 +861,7 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
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case ONEWIRETASK_READ:
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case ONEWIRETASK_READBIT:
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/* Set baud rate */
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priv->baud = TIMESLOT_BAUD;
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@ -936,7 +957,8 @@ static int stm32_1wire_isr(int irq, void *context, void *arg)
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/* Send next bit */
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stm32_1wire_send(priv, (*priv->byte & (1 << priv->bit)) ? WRITE_TX1 : WRITE_TX0);
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stm32_1wire_send(priv, (*priv->byte & (1 << priv->bit)) ?
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WRITE_TX1 : WRITE_TX0);
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break;
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case ONEWIRETASK_READ:
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@ -1056,8 +1078,8 @@ static int stm32_1wire_reset(FAR struct onewire_dev_s *dev)
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*
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****************************************************************************/
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static int stm32_1wire_write(FAR struct onewire_dev_s *dev, const uint8_t *buffer,
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int buflen)
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static int stm32_1wire_write(FAR struct onewire_dev_s *dev,
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const uint8_t *buffer, int buflen)
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{
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struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv;
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const struct stm32_1wire_msg_s msgs[1] =
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@ -1078,7 +1100,8 @@ static int stm32_1wire_write(FAR struct onewire_dev_s *dev, const uint8_t *buffe
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*
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****************************************************************************/
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static int stm32_1wire_read(FAR struct onewire_dev_s *dev, uint8_t *buffer, int buflen)
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static int stm32_1wire_read(FAR struct onewire_dev_s *dev, uint8_t *buffer,
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int buflen)
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{
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struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv;
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const struct stm32_1wire_msg_s msgs[1] =
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@ -1104,7 +1127,6 @@ static int stm32_1wire_read(FAR struct onewire_dev_s *dev, uint8_t *buffer, int
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static int stm32_1wire_exchange(FAR struct onewire_dev_s *dev, bool reset,
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const uint8_t *txbuffer, int txbuflen,
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uint8_t *rxbuffer, int rxbuflen)
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{
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int result = ERROR;
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struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv;
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@ -1141,6 +1163,7 @@ static int stm32_1wire_exchange(FAR struct onewire_dev_s *dev, bool reset,
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result = stm32_1wire_process(priv, msgs, 2);
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}
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return result;
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}
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@ -1152,7 +1175,8 @@ static int stm32_1wire_exchange(FAR struct onewire_dev_s *dev, bool reset,
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*
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****************************************************************************/
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static int stm32_1wire_writebit(FAR struct onewire_dev_s *dev, const uint8_t *bit)
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static int stm32_1wire_writebit(FAR struct onewire_dev_s *dev,
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const uint8_t *bit)
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{
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struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv;
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const struct stm32_1wire_msg_s msgs[1] =
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@ -1196,7 +1220,7 @@ static int stm32_1wire_readbit(FAR struct onewire_dev_s *dev, uint8_t *bit)
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* Name: stm32_1wireinitialize
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*
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* Description:
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* Initialize the selected 1-Wire port. And return a unique instance of struct
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* Initialize the selected 1-Wire port. And return a unique instance of
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* struct onewire_dev_s. This function may be called to obtain multiple
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* instances of the interface, each of which may be set up with a
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* different frequency and slave address.
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@ -122,16 +122,16 @@ struct stm32_1wire_config_s
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struct stm32_1wire_priv_s
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{
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const struct stm32_1wire_config_s *config; /* Port configuration */
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volatile int refs; /* Referernce count */
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sem_t sem_excl; /* Mutual exclusion semaphore */
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sem_t sem_isr; /* Interrupt wait semaphore */
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int baud; /* Baud rate */
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const struct stm32_1wire_msg_s *msgs; /* Messages data */
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uint8_t *byte; /* Current byte */
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uint8_t bit; /* Current bit */
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volatile int result; /* Exchange result */
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volatile int refs; /* Referernce count */
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sem_t sem_excl; /* Mutual exclusion semaphore */
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sem_t sem_isr; /* Interrupt wait semaphore */
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int baud; /* Baud rate */
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const struct stm32_1wire_msg_s *msgs; /* Messages data */
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uint8_t *byte; /* Current byte */
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uint8_t bit; /* Current bit */
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volatile int result; /* Exchange result */
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#ifdef CONFIG_PM
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struct pm_callback_s pm_cb; /* PM callbacks */
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struct pm_callback_s pm_cb; /* PM callbacks */
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#endif
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};
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@ -159,8 +159,9 @@ static void stm32_1wire_set_apb_clock(struct stm32_1wire_priv_s *priv,
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static int stm32_1wire_init(FAR struct stm32_1wire_priv_s *priv);
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static int stm32_1wire_deinit(FAR struct stm32_1wire_priv_s *priv);
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static inline void stm32_1wire_sem_init(FAR struct stm32_1wire_priv_s *priv);
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static inline void stm32_1wire_sem_destroy(FAR struct stm32_1wire_priv_s *priv);
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static inline void stm32_1wire_sem_wait(FAR struct stm32_1wire_priv_s *priv);
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static inline void stm32_1wire_sem_destroy(
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FAR struct stm32_1wire_priv_s *priv);
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static inline int stm32_1wire_sem_wait(FAR struct stm32_1wire_priv_s *priv);
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static inline void stm32_1wire_sem_post(FAR struct stm32_1wire_priv_s *priv);
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static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
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FAR const struct stm32_1wire_msg_s *msgs,
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@ -174,7 +175,8 @@ static int stm32_1wire_read(FAR struct onewire_dev_s *dev, uint8_t *buffer,
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static int stm32_1wire_exchange(FAR struct onewire_dev_s *dev, bool reset,
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const uint8_t *txbuffer, int txbuflen,
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uint8_t *rxbuffer, int rxbuflen);
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static int stm32_1wire_writebit(FAR struct onewire_dev_s *dev, const uint8_t *bit);
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static int stm32_1wire_writebit(FAR struct onewire_dev_s *dev,
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const uint8_t *bit);
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static int stm32_1wire_readbit(FAR struct onewire_dev_s *dev, uint8_t *bit);
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#ifdef CONFIG_PM
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static int stm32_1wire_pm_prepare(FAR struct pm_callback_s *cb, int domain,
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@ -397,7 +399,8 @@ static void stm32_1wire_set_baud(struct stm32_1wire_priv_s *priv)
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* usartdiv8 = 2 * fCK / baud
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*/
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usartdiv8 = ((priv->config->apbclock << 1) + (priv->baud >> 1)) / priv->baud;
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usartdiv8 = ((priv->config->apbclock << 1) + (priv->baud >> 1)) /
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priv->baud;
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/* Baud rate for standard USART (SPI mode included):
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*
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@ -432,13 +435,13 @@ static void stm32_1wire_set_baud(struct stm32_1wire_priv_s *priv)
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cr1 |= USART_CR1_OVER8;
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}
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stm32_1wire_out(priv, STM32L4_USART_CR1_OFFSET, cr1);
|
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stm32_1wire_out(priv, STM32L4_USART_BRR_OFFSET, brr);
|
||||
stm32_1wire_out(priv, STM32L4_USART_CR1_OFFSET, cr1);
|
||||
stm32_1wire_out(priv, STM32L4_USART_BRR_OFFSET, brr);
|
||||
|
||||
if (enabled)
|
||||
{
|
||||
stm32_1wire_out(priv, STM32L4_USART_CR1_OFFSET, cr1 | USART_CR1_UE);
|
||||
}
|
||||
if (enabled)
|
||||
{
|
||||
stm32_1wire_out(priv, STM32L4_USART_CR1_OFFSET, cr1 | USART_CR1_UE);
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -533,9 +536,10 @@ static int stm32_1wire_init(FAR struct stm32_1wire_priv_s *priv)
|
||||
|
||||
stm32_1wire_set_apb_clock(priv, true);
|
||||
|
||||
/* Configure CR2 */
|
||||
/* Clear STOP, CLKEN, CPOL, CPHA, LBCL, and interrupt enable bits */
|
||||
/* Set LBDIE */
|
||||
/* Configure CR2
|
||||
* Clear STOP, CLKEN, CPOL, CPHA, LBCL, and interrupt enable bits
|
||||
* Set LBDIE
|
||||
*/
|
||||
|
||||
regval = stm32_1wire_in(priv, STM32L4_USART_CR2_OFFSET);
|
||||
regval &= ~(USART_CR2_STOP_MASK | USART_CR2_CLKEN | USART_CR2_CPOL |
|
||||
@ -543,9 +547,10 @@ static int stm32_1wire_init(FAR struct stm32_1wire_priv_s *priv)
|
||||
regval |= USART_CR2_LBDIE;
|
||||
stm32_1wire_out(priv, STM32L4_USART_CR2_OFFSET, regval);
|
||||
|
||||
/* Configure CR1 */
|
||||
/* Clear TE, REm, all interrupt enable bits, PCE, PS and M */
|
||||
/* Set RXNEIE */
|
||||
/* Configure CR1
|
||||
* Clear TE, REm, all interrupt enable bits, PCE, PS and M
|
||||
* Set RXNEIE
|
||||
*/
|
||||
|
||||
regval = stm32_1wire_in(priv, STM32L4_USART_CR1_OFFSET);
|
||||
regval &= ~(USART_CR1_TE | USART_CR1_RE | USART_CR1_ALLINTS |
|
||||
@ -553,12 +558,14 @@ static int stm32_1wire_init(FAR struct stm32_1wire_priv_s *priv)
|
||||
regval |= USART_CR1_RXNEIE;
|
||||
stm32_1wire_out(priv, STM32L4_USART_CR1_OFFSET, regval);
|
||||
|
||||
/* Configure CR3 */
|
||||
/* Clear CTSE, RTSE, and all interrupt enable bits */
|
||||
/* Set ONEBIT, HDSEL and EIE */
|
||||
/* Configure CR3
|
||||
* Clear CTSE, RTSE, and all interrupt enable bits
|
||||
* Set ONEBIT, HDSEL and EIE
|
||||
*/
|
||||
|
||||
regval = stm32_1wire_in(priv, STM32L4_USART_CR3_OFFSET);
|
||||
regval &= ~(USART_CR3_CTSIE | USART_CR3_CTSE | USART_CR3_RTSE | USART_CR3_EIE);
|
||||
regval &= ~(USART_CR3_CTSIE | USART_CR3_CTSE | USART_CR3_RTSE |
|
||||
USART_CR3_EIE);
|
||||
regval |= (USART_CR3_ONEBIT | USART_CR3_HDSEL | USART_CR3_EIE);
|
||||
stm32_1wire_out(priv, STM32L4_USART_CR3_OFFSET, regval);
|
||||
|
||||
@ -659,7 +666,8 @@ static inline void stm32_1wire_sem_init(FAR struct stm32_1wire_priv_s *priv)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void stm32_1wire_sem_destroy(FAR struct stm32_1wire_priv_s *priv)
|
||||
static inline void stm32_1wire_sem_destroy(
|
||||
FAR struct stm32_1wire_priv_s *priv)
|
||||
{
|
||||
nxsem_destroy(&priv->sem_excl);
|
||||
nxsem_destroy(&priv->sem_isr);
|
||||
@ -673,9 +681,9 @@ static inline void stm32_1wire_sem_destroy(FAR struct stm32_1wire_priv_s *priv)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void stm32_1wire_sem_wait(FAR struct stm32_1wire_priv_s *priv)
|
||||
static int void stm32_1wire_sem_wait(FAR struct stm32_1wire_priv_s *priv)
|
||||
{
|
||||
nxsem_wait_uninterruptible(&priv->sem_excl);
|
||||
return nxsem_wait_uninterruptible(&priv->sem_excl);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -709,7 +717,11 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
|
||||
|
||||
/* Lock out other clients */
|
||||
|
||||
stm32_1wire_sem_wait(priv);
|
||||
ret = stm32_1wire_sem_wait(priv);
|
||||
if (ret < 0)
|
||||
{
|
||||
return ret;
|
||||
}
|
||||
|
||||
priv->result = ERROR;
|
||||
|
||||
@ -722,6 +734,7 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
|
||||
break;
|
||||
|
||||
case ONEWIRETASK_RESET:
|
||||
|
||||
/* Set baud rate */
|
||||
|
||||
priv->baud = RESET_BAUD;
|
||||
@ -743,6 +756,7 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
|
||||
|
||||
case ONEWIRETASK_WRITE:
|
||||
case ONEWIRETASK_WRITEBIT:
|
||||
|
||||
/* Set baud rate */
|
||||
|
||||
priv->baud = TIMESLOT_BAUD;
|
||||
@ -754,7 +768,8 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
|
||||
priv->msgs = &msgs[indx];
|
||||
priv->byte = priv->msgs->buffer;
|
||||
priv->bit = 0;
|
||||
stm32_1wire_send(priv, (*priv->byte & (1 << priv->bit)) ? WRITE_TX1 : WRITE_TX0);
|
||||
stm32_1wire_send(priv, (*priv->byte & (1 << priv->bit)) ?
|
||||
WRITE_TX1 : WRITE_TX0);
|
||||
leave_critical_section(irqs);
|
||||
|
||||
/* Wait. Break on timeout if TX line closed to GND */
|
||||
@ -766,6 +781,7 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
|
||||
|
||||
case ONEWIRETASK_READ:
|
||||
case ONEWIRETASK_READBIT:
|
||||
|
||||
/* Set baud rate */
|
||||
|
||||
priv->baud = TIMESLOT_BAUD;
|
||||
@ -850,7 +866,11 @@ static int stm32_1wire_isr(int irq, void *context, void *arg)
|
||||
if (++priv->bit >= 8)
|
||||
{
|
||||
priv->bit = 0;
|
||||
if (++priv->byte >= (priv->msgs->buffer + priv->msgs->buflen)) /* Done? */
|
||||
|
||||
/* Done? */
|
||||
|
||||
if (++priv->byte >=
|
||||
(priv->msgs->buffer + priv->msgs->buflen))
|
||||
{
|
||||
priv->msgs = NULL;
|
||||
priv->result = OK;
|
||||
@ -861,7 +881,8 @@ static int stm32_1wire_isr(int irq, void *context, void *arg)
|
||||
|
||||
/* Send next bit */
|
||||
|
||||
stm32_1wire_send(priv, (*priv->byte & (1 << priv->bit)) ? WRITE_TX1 : WRITE_TX0);
|
||||
stm32_1wire_send(priv, (*priv->byte & (1 << priv->bit)) ?
|
||||
WRITE_TX1 : WRITE_TX0);
|
||||
break;
|
||||
|
||||
case ONEWIRETASK_READ:
|
||||
@ -968,8 +989,9 @@ static int stm32_1wire_reset(FAR struct onewire_dev_s *dev)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int stm32_1wire_write(FAR struct onewire_dev_s *dev, const uint8_t *buffer,
|
||||
int buflen)
|
||||
static int stm32_1wire_write(FAR struct onewire_dev_s *dev,
|
||||
const uint8_t *buffer,
|
||||
int buflen)
|
||||
{
|
||||
struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv;
|
||||
const struct stm32_1wire_msg_s msgs[1] =
|
||||
@ -990,7 +1012,8 @@ static int stm32_1wire_write(FAR struct onewire_dev_s *dev, const uint8_t *buffe
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int stm32_1wire_read(FAR struct onewire_dev_s *dev, uint8_t *buffer, int buflen)
|
||||
static int stm32_1wire_read(FAR struct onewire_dev_s *dev, uint8_t *buffer,
|
||||
int buflen)
|
||||
{
|
||||
struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv;
|
||||
const struct stm32_1wire_msg_s msgs[1] =
|
||||
@ -1016,7 +1039,6 @@ static int stm32_1wire_read(FAR struct onewire_dev_s *dev, uint8_t *buffer, int
|
||||
static int stm32_1wire_exchange(FAR struct onewire_dev_s *dev, bool reset,
|
||||
FAR const uint8_t *txbuffer, int txbuflen,
|
||||
FAR uint8_t *rxbuffer, int rxbuflen)
|
||||
|
||||
{
|
||||
int result = ERROR;
|
||||
struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv;
|
||||
@ -1053,6 +1075,7 @@ static int stm32_1wire_exchange(FAR struct onewire_dev_s *dev, bool reset,
|
||||
|
||||
result = stm32_1wire_process(priv, msgs, 2);
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
@ -1064,7 +1087,8 @@ static int stm32_1wire_exchange(FAR struct onewire_dev_s *dev, bool reset,
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int stm32_1wire_writebit(FAR struct onewire_dev_s *dev, const uint8_t *bit)
|
||||
static int stm32_1wire_writebit(FAR struct onewire_dev_s *dev,
|
||||
const uint8_t *bit)
|
||||
{
|
||||
struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv;
|
||||
const struct stm32_1wire_msg_s msgs[1] =
|
||||
@ -1100,7 +1124,7 @@ static int stm32_1wire_readbit(FAR struct onewire_dev_s *dev, uint8_t *bit)
|
||||
return stm32_1wire_process(priv, msgs, 1);
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Name: stm32_1wire_pm_prepare
|
||||
*
|
||||
* Description:
|
||||
@ -1127,7 +1151,7 @@ static int stm32_1wire_readbit(FAR struct onewire_dev_s *dev, uint8_t *bit)
|
||||
* power state change). Drivers are not permitted to return non-zero
|
||||
* values when reverting back to higher power consumption modes!
|
||||
*
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int stm32_1wire_pm_prepare(FAR struct pm_callback_s *cb, int domain,
|
||||
@ -1135,7 +1159,7 @@ static int stm32_1wire_pm_prepare(FAR struct pm_callback_s *cb, int domain,
|
||||
{
|
||||
struct stm32_1wire_priv_s *priv =
|
||||
(struct stm32_1wire_priv_s *)((char *)cb -
|
||||
offsetof(struct stm32_1wire_priv_s, pm_cb));
|
||||
offsetof(struct stm32_1wire_priv_s, pm_cb));
|
||||
int sval;
|
||||
|
||||
/* Logic to prepare for a reduced power state goes here. */
|
||||
@ -1148,6 +1172,7 @@ static int stm32_1wire_pm_prepare(FAR struct pm_callback_s *cb, int domain,
|
||||
|
||||
case PM_STANDBY:
|
||||
case PM_SLEEP:
|
||||
|
||||
/* Check if exclusive lock for 1-Wire bus is held. */
|
||||
|
||||
if (nxsem_getvalue(&priv->sem_excl, &sval) < 0)
|
||||
@ -1166,6 +1191,7 @@ static int stm32_1wire_pm_prepare(FAR struct pm_callback_s *cb, int domain,
|
||||
break;
|
||||
|
||||
default:
|
||||
|
||||
/* Should not get here */
|
||||
|
||||
break;
|
||||
@ -1183,7 +1209,7 @@ static int stm32_1wire_pm_prepare(FAR struct pm_callback_s *cb, int domain,
|
||||
* Name: stm32l4_1wireinitialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize the selected 1-Wire port. And return a unique instance of struct
|
||||
* Initialize the selected 1-Wire port. And return a unique instance of
|
||||
* struct onewire_dev_s. This function may be called to obtain multiple
|
||||
* instances of the interface, each of which may be set up with a
|
||||
* different frequency and slave address.
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user