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arch/arm/src/stm32 and stm32f7: Make LTDC and DMA2D drivers as similar as possible. Basically they should only differ in the configuratin naming: CONFIG_STM32F7_ vs CONFIG_STM32_. I suspect that the STM32F7 may also require some cache operations with the WRITE_BACK data cache is enabled.

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This commit is contained in:
Gregory Nutt 2018-06-15 15:10:19 -06:00
parent 6dcce0430c
commit a4496f036c
8 changed files with 58 additions and 43 deletions
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20
arch/arm/src/stm32/stm32_dma2d.c
View File

@ -243,7 +243,7 @@ static int stm32_dma2d_blend(FAR struct stm32_dma2d_overlay_s *doverlay,
* Private Data
****************************************************************************/
/* The initalized state of the driver */
/* The initialized state of the driver */
static bool g_initialized;
@ -278,19 +278,19 @@ static struct stm32_interrupt_s g_interrupt =
static struct stm32_dma2d_s g_dma2ddev =
{
.dma2d =
{
.dma2d =
{
#ifdef CONFIG_FB_CMAP
.setclut = stm32_dma2d_setclut,
.setclut = stm32_dma2d_setclut,
#endif
.fillcolor = stm32_dma2d_fillcolor,
.blit = stm32_dma2d_blit,
.blend = stm32_dma2d_blend
},
.fillcolor = stm32_dma2d_fillcolor,
.blit = stm32_dma2d_blit,
.blend = stm32_dma2d_blend
},
#ifdef CONFIG_FB_CMAP
.clut = g_clut,
.clut = g_clut,
#endif
.lock = &g_lock
.lock = &g_lock
};
/****************************************************************************

19
arch/arm/src/stm32/stm32_dma2d.h
View File

@ -43,10 +43,7 @@
#include <nuttx/config.h>
#include <nuttx/video/fb.h>
# ifdef CONFIG_FB_OVERLAY
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifdef CONFIG_FB_OVERLAY
/****************************************************************************
* Public Types
@ -81,9 +78,9 @@ struct dma2d_layer_s
* On error - -EINVAL
*/
# ifdef CONFIG_FB_CMAP
#ifdef CONFIG_FB_CMAP
int (*setclut)(FAR const struct fb_cmap_s * cmap);
# endif
#endif
/* Name: fillcolor
*
@ -161,14 +158,6 @@ struct dma2d_layer_s
FAR const struct fb_area_s *barea);
};
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Inline Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
@ -212,5 +201,5 @@ int stm32_dma2dinitialize(void);
void stm32_dma2duninitialize(void);
# endif /* CONFIG_FB_OVERLAY */
#endif /* CONFIG_FB_OVERLAY */
#endif /* __ARCH_ARM_SRC_STM32_STM32_DMA2D_H */

28
arch/arm/src/stm32/stm32_ltdc.c
View File

@ -1330,8 +1330,12 @@ static void stm32_ltdc_periphconfig(void)
/* Configure LTDC_GCR */
regval = (STM32_LTDC_GCR_PCPOL | STM32_LTDC_GCR_DEPOL
| STM32_LTDC_GCR_VSPOL | STM32_LTDC_GCR_HSPOL);
regval = getreg32(STM32_LTDC_GCR);
regval &= ~(LTDC_GCR_PCPOL | LTDC_GCR_DEPOL | LTDC_GCR_VSPOL |
LTDC_GCR_HSPOL);
regval |= (STM32_LTDC_GCR_PCPOL | STM32_LTDC_GCR_DEPOL |
STM32_LTDC_GCR_VSPOL | STM32_LTDC_GCR_HSPOL);
reginfo("set LTDC_GCR=%08x\n", regval);
putreg32(regval, STM32_LTDC_GCR);
reginfo("configured LTDC_GCR=%08x\n", getreg32(STM32_LTDC_GCR));
@ -1400,7 +1404,7 @@ static void stm32_ltdc_bgcolor(uint32_t rgb)
static void stm32_ltdc_dither(bool enable, uint8_t red,
uint8_t green, uint8_t blue)
{
uint32_t regval;
uint32_t regval;
regval = getreg32(STM32_LTDC_GCR);
@ -1413,8 +1417,7 @@ static void stm32_ltdc_dither(bool enable, uint8_t red,
regval &= ~LTDC_GCR_DEN;
}
regval &= ~(!LTDC_GCR_DEN | LTDC_GCR_DRW(0) |
LTDC_GCR_DGW(0) | LTDC_GCR_DBW(0));
regval &= ~(LTDC_GCR_DBW_MASK | LTDC_GCR_DGW_MASK | LTDC_GCR_DRW_MASK);
regval |= (LTDC_GCR_DRW(red) | LTDC_GCR_DGW(green) | LTDC_GCR_DBW(blue));
reginfo("set LTDC_GCR=%08x\n", regval);
@ -2946,6 +2949,21 @@ static int stm32_blend(FAR struct fb_vtable_s *vtable,
# endif /* CONFIG_FB_OVERLAY_BLIT */
#endif /* CONFIG_FB_OVERLAY */
/****************************************************************************
* Name: stm32_ltdcreset
*
* Description:
* Reset LTDC via APB2RSTR
*
****************************************************************************/
void stm32_ltdcreset(void)
{
uint32_t regval = getreg32(STM32_RCC_APB2RSTR);
putreg32(regval | RCC_APB2RSTR_LTDCRST, STM32_RCC_APB2RSTR);
putreg32(regval & ~RCC_APB2RSTR_LTDCRST, STM32_RCC_APB2RSTR);
}
/****************************************************************************
* Name: stm32_ltdcinitialize
*

10
arch/arm/src/stm32/stm32_ltdc.h
View File

@ -53,6 +53,16 @@
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_ltdcreset
*
* Description:
* Reset LTDC via APB2RSTR
*
****************************************************************************/
void stm32_ltdcreset(void);
/*****************************************************************************
* Name: stm32_ltdcinitialize
*

13
arch/arm/src/stm32f7/stm32_dma2d.c
View File

@ -74,11 +74,11 @@
/* DMA2D blender control */
#define STM32F7_DMA2D_CR_MODE_BLIT DMA2D_CR_MODE(0)
#define STM32F7_DMA2D_CR_MODE_BLITPFC DMA2D_CR_MODE(1)
#define STM32F7_DMA2D_CR_MODE_BLEND DMA2D_CR_MODE(2)
#define STM32F7_DMA2D_CR_MODE_COLOR DMA2D_CR_MODE(3)
#define STM32F7_DMA2D_CR_MODE_CLEAR STM32_DMA2D_CR_MODE_BLITPFC | \
#define STM32_DMA2D_CR_MODE_BLIT DMA2D_CR_MODE(0)
#define STM32_DMA2D_CR_MODE_BLITPFC DMA2D_CR_MODE(1)
#define STM32_DMA2D_CR_MODE_BLEND DMA2D_CR_MODE(2)
#define STM32_DMA2D_CR_MODE_COLOR DMA2D_CR_MODE(3)
#define STM32_DMA2D_CR_MODE_CLEAR STM32_DMA2D_CR_MODE_BLITPFC | \
STM32_DMA2D_CR_MODE_BLEND | \
STM32_DMA2D_CR_MODE_COLOR
@ -88,7 +88,7 @@
/* CC clut size */
#define DMA2D_CLUT_SIZE STM32F7_DMA2D_NCLUT - 1
#define DMA2D_CLUT_SIZE STM32_DMA2D_NCLUT - 1
/* Layer argb cmap conversion */
@ -456,7 +456,6 @@ static int stm32_dma2d_waitforirq(void)
return ret;
}
#ifdef CONFIG_STM32F7_DMA2D_L8
/****************************************************************************
* Name: stm32_dma2d_loadclut
*

1
arch/arm/src/stm32f7/stm32_dma2d.h
View File

@ -42,7 +42,6 @@
#include <nuttx/config.h>
#include <nuttx/video/fb.h>
#include "stm32_ltdc.h"
#ifdef CONFIG_FB_OVERLAY

6
arch/arm/src/stm32f7/stm32_ltdc.c
View File

@ -1330,11 +1330,11 @@ static void stm32_ltdc_periphconfig(void)
/* Configure LTDC_GCR */
regval = getreg32(STM32_LTDC_GCR);
regval = getreg32(STM32_LTDC_GCR);
regval &= ~(LTDC_GCR_PCPOL | LTDC_GCR_DEPOL | LTDC_GCR_VSPOL |
LTDC_GCR_HSPOL);
regval |= (STM32_LTDC_GCR_PCPOL | STM32_LTDC_GCR_DEPOL |
STM32_LTDC_GCR_VSPOL | STM32_LTDC_GCR_HSPOL);
regval |= (STM32_LTDC_GCR_PCPOL | STM32_LTDC_GCR_DEPOL |
STM32_LTDC_GCR_VSPOL | STM32_LTDC_GCR_HSPOL);
reginfo("set LTDC_GCR=%08x\n", regval);
putreg32(regval, STM32_LTDC_GCR);

4
arch/arm/src/stm32f7/stm32_ltdc.h
View File

@ -53,13 +53,13 @@
* Public Functions
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Name: stm32_ltdcreset
*
* Description:
* Reset LTDC via APB2RSTR
*
************************************************************************************/
****************************************************************************/
void stm32_ltdcreset(void);