SAMA5: Initial framework for a UDPHS USB device side driver
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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*
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* References:
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* SAMA5D3 Series Data Sheet
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* modification, are permitted provided that the following conditions
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* are met:
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* are met:
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/********************************************************************************************
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/********************************************************************************************
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* Pre-processor Definitions
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* Pre-processor Definitions
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********************************************************************************************/
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********************************************************************************************/
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/* General Definitions **********************************************************************/
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#define SAM_UDPHS_NENDPOINTS 15
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#define SAM_UDPHS_NDMACHANNELS 7
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/* Register offsets *************************************************************************/
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/* Register offsets *************************************************************************/
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* Public Types
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* Public Types
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********************************************************************************************/
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********************************************************************************************/
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/* This structure defines the UDPHS DMA Transfer Descriptor. Instances of DMA transfer
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* descriptors must by aligned to 16-byte address boundaries.
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*
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* Each value contains the next value of each of three UDPHS DMA registers. The first
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* register value (UDPHS_DMANXTDSCx) is a link that can be used to chain sequences of
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* DMA transfers.
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*/
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struct udphs_dtd_s
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{
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uint32_t nxtd; /* Next Descriptor Address Register: UDPHS_DMANXTDSCx */
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uint32_t addr; /* DMA Channelx Address Register: UDPHS_DMAADDRESSx */
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uint32_t ctrl; /* DMA Channelx Control Register: UDPHS_DMACONTROLx */
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};
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/********************************************************************************************
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/********************************************************************************************
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* Public Data
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* Public Data
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********************************************************************************************/
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********************************************************************************************/
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3497
arch/arm/src/sama5/sam_udphs.c
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3497
arch/arm/src/sama5/sam_udphs.c
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