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NXP S32K1XX: fix LPI2C reset

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This commit is contained in:
Jari van Ewijk 2022-08-01 11:32:03 +02:00 committed by David Sidrane
parent f09f75f2c9
commit a554b9ce89
2 changed files with 12 additions and 11 deletions
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1
arch/arm/Kconfig
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@ -245,6 +245,7 @@ config ARCH_CHIP_S32K1XX
select ARCH_HAVE_MPU select ARCH_HAVE_MPU
select ARM_HAVE_MPU_UNIFIED select ARM_HAVE_MPU_UNIFIED
select ARCH_HAVE_RAMFUNCS select ARCH_HAVE_RAMFUNCS
select ARCH_HAVE_I2CRESET
---help--- ---help---
NPX S32K1XX architectures (ARM Cortex-M0+ and Cortex-M4F). NPX S32K1XX architectures (ARM Cortex-M0+ and Cortex-M4F).

22
arch/arm/src/s32k1xx/s32k1xx_lpi2c.c
View File

@ -47,6 +47,7 @@
#include "hardware/s32k1xx_pinmux.h" #include "hardware/s32k1xx_pinmux.h"
#include "s32k1xx_lpi2c.h" #include "s32k1xx_lpi2c.h"
#include "s32k1xx_periphclocks.h" #include "s32k1xx_periphclocks.h"
#include "s32k1xx_pin.h"
#include <arch/board/board.h> #include <arch/board/board.h>
@ -1615,8 +1616,7 @@ static int s32k1xx_lpi2c_transfer(struct i2c_master_s *dev,
#ifdef CONFIG_I2C_RESET #ifdef CONFIG_I2C_RESET
static int s32k1xx_lpi2c_reset(struct i2c_master_s *dev) static int s32k1xx_lpi2c_reset(struct i2c_master_s *dev)
{ {
struct s32k1xx_lpi2c_priv_s *priv = struct s32k1xx_lpi2c_priv_s *priv = (struct s32k1xx_lpi2c_priv_s *)dev;
(struct s32k1xx_lpi2c_priv_s *)dev;
unsigned int clock_count; unsigned int clock_count;
unsigned int stretch_count; unsigned int stretch_count;
uint32_t scl_gpio; uint32_t scl_gpio;
@ -1658,12 +1658,12 @@ static int s32k1xx_lpi2c_reset(struct i2c_master_s *dev)
/* Let SDA go high */ /* Let SDA go high */
s32k1xx_gpio_write(sda_gpio, 1); s32k1xx_gpiowrite(sda_gpio, 1);
/* Clock the bus until any slaves currently driving it let it go. */ /* Clock the bus until any slaves currently driving it let it go. */
clock_count = 0; clock_count = 0;
while (!s32k1xx_gpio_read(sda_gpio)) while (!s32k1xx_gpioread(sda_gpio))
{ {
/* Give up if we have tried too hard */ /* Give up if we have tried too hard */
@ -1678,7 +1678,7 @@ static int s32k1xx_lpi2c_reset(struct i2c_master_s *dev)
*/ */
stretch_count = 0; stretch_count = 0;
while (!s32k1xx_gpio_read(scl_gpio)) while (!s32k1xx_gpioread(scl_gpio))
{ {
/* Give up if we have tried too hard */ /* Give up if we have tried too hard */
@ -1692,12 +1692,12 @@ static int s32k1xx_lpi2c_reset(struct i2c_master_s *dev)
/* Drive SCL low */ /* Drive SCL low */
s32k1xx_gpio_write(scl_gpio, 0); s32k1xx_gpiowrite(scl_gpio, 0);
up_udelay(10); up_udelay(10);
/* Drive SCL high again */ /* Drive SCL high again */
s32k1xx_gpio_write(scl_gpio, 1); s32k1xx_gpiowrite(scl_gpio, 1);
up_udelay(10); up_udelay(10);
} }
@ -1705,13 +1705,13 @@ static int s32k1xx_lpi2c_reset(struct i2c_master_s *dev)
* state machines. * state machines.
*/ */
s32k1xx_gpio_write(sda_gpio, 0); s32k1xx_gpiowrite(sda_gpio, 0);
up_udelay(10); up_udelay(10);
s32k1xx_gpio_write(scl_gpio, 0); s32k1xx_gpiowrite(scl_gpio, 0);
up_udelay(10); up_udelay(10);
s32k1xx_gpio_write(scl_gpio, 1); s32k1xx_gpiowrite(scl_gpio, 1);
up_udelay(10); up_udelay(10);
s32k1xx_gpio_write(sda_gpio, 1); s32k1xx_gpiowrite(sda_gpio, 1);
up_udelay(10); up_udelay(10);
/* Revert the GPIO configuration. */ /* Revert the GPIO configuration. */