Add some comments from Angus Gratton to a Kconfig file for future reference.
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@ -23,8 +23,19 @@ config ESP32CORE_RUN_IRAM
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---help---
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The default configuration is set up run from IRAM. However, the
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current (2016-11-14) OpenOCD for ESP32 does not support writing to
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FLASH. This option sets up the liner scripts to support execution
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FLASH. This option sets up the linker scripts to support execution
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from IRAM. In this case, OpenOCD can be used to load directly into
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IRAM.
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At this stage the nuttx image is small enough to be entirely memory-
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resident. Once board support is more mature you can add flash cache
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mapping code to run from SPI flash after initial boot. There are at
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least two possible approaches you could take: You can add the flash
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cache mapping code into nuttx directly, so it is self-contained -
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early nuttx initialisation runs from IRAM and enables flash cache,
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and then off you go. Or you can use the esp-idf software bootloader
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and partition table scheme and have nuttx be an esp-idf "app" which
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allows interoperability with the esp-idf system but makes you
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reliant on the esp-idf design for these parts. Both are possible.
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endif # ARCH_BOARD_ESP32CORE
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