diff --git a/arch/arm/src/stm32/chip/stm32_exti.h b/arch/arm/src/stm32/chip/stm32_exti.h
index 791bed1f17..e18b60cf71 100644
--- a/arch/arm/src/stm32/chip/stm32_exti.h
+++ b/arch/arm/src/stm32/chip/stm32_exti.h
@@ -188,9 +188,9 @@
 
 /* Pending register */
 
-#define EXTI_IMR_BIT(n)          STM32_EXTI_BIT(n)  /* 1=Selected trigger request occurred */
-#define EXTI_IMR_SHIFT           (0)                /* Bits 0-X: Pending bit for all lines */
-#define EXTI_IMR_MASK            STM32_EXTI_MASK
+#define EXTI_PR_BIT(n)           STM32_EXTI_BIT(n)  /* 1=Selected trigger request occurred */
+#define EXTI_PR_SHIFT            (0)                /* Bits 0-X: Pending bit for all lines */
+#define EXTI_PR_MASK             STM32_EXTI_MASK
 
 /* Compatibility Definitions ********************************************************/
 
diff --git a/arch/arm/src/stm32f7/chip/stm32_exti.h b/arch/arm/src/stm32f7/chip/stm32_exti.h
index 288f51b228..8663d2f08e 100644
--- a/arch/arm/src/stm32f7/chip/stm32_exti.h
+++ b/arch/arm/src/stm32f7/chip/stm32_exti.h
@@ -125,9 +125,9 @@
 
 /* Pending register */
 
-#define EXTI_IMR_BIT(n)          STM32_EXTI_BIT(n)  /* 1=Selected trigger request occurred */
-#define EXTI_IMR_SHIFT           (0)                /* Bits 0-X: Pending bit for all lines */
-#define EXTI_IMR_MASK            STM32_EXTI_MASK
+#define EXTI_PR_BIT(n)           STM32_EXTI_BIT(n)  /* 1=Selected trigger request occurred */
+#define EXTI_PR_SHIFT            (0)                /* Bits 0-X: Pending bit for all lines */
+#define EXTI_PR_MASK             STM32_EXTI_MASK
 
 #endif /* CONFIG_STM32F7_STM32F74XX || CONFIG_STM32F7_STM32F75XX || CONFIG_STM32F7_STM32F76XX || CONFIG_STM32F7_STM32F77XX */
 #endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32_EXTI_H */
diff --git a/arch/arm/src/stm32l4/chip/stm32l4_exti.h b/arch/arm/src/stm32l4/chip/stm32l4_exti.h
index 1fb1628a7a..f9f087a051 100644
--- a/arch/arm/src/stm32l4/chip/stm32l4_exti.h
+++ b/arch/arm/src/stm32l4/chip/stm32l4_exti.h
@@ -167,13 +167,13 @@
 
 /* Pending register */
 
-#define EXTI_IMR1_BIT(n)          STM32L4_EXTI1_BIT(n)  /* 1=Selected trigger request occurred */
-#define EXTI_IMR1_SHIFT           (0)                /* Bits 0-X: Pending bit for all lines */
-#define EXTI_IMR1_MASK            STM32L4_EXTI1_MASK
+#define EXTI_PR1_BIT(n)           STM32L4_EXTI1_BIT(n)  /* 1=Selected trigger request occurred */
+#define EXTI_PR1_SHIFT            (0)                /* Bits 0-X: Pending bit for all lines */
+#define EXTI_PR1_MASK             STM32L4_EXTI1_MASK
 
-#define EXTI_IMR2_BIT(n)          STM32L4_EXTI2_BIT(n)  /* 1=Selected trigger request occurred */
-#define EXTI_IMR2_SHIFT           (0)                /* Bits 0-X: Pending bit for all lines */
-#define EXTI_IMR2_MASK            STM32L4_EXTI2_MASK
+#define EXTI_PR2_BIT(n)           STM32L4_EXTI2_BIT(n)  /* 1=Selected trigger request occurred */
+#define EXTI_PR2_SHIFT            (0)                /* Bits 0-X: Pending bit for all lines */
+#define EXTI_PR2_MASK             STM32L4_EXTI2_MASK
 
 #endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_EXTI_H */