SAMV7: Quick'n'dirty port of the SAMA5D4 Ethernet MAC driver to the SAMV7. Still some unresovled issues with DCache handling
This commit is contained in:
Gregory Nutt
parent
8a73d9b8ea
commit
a590bdc737
@ -89,7 +89,7 @@
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#define SAM_PID_MCAN01 (36) /* CAN0 IRQ line 1 */
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#define SAM_PID_MCAN10 (37) /* CAN1 IRQ line 0 */
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#define SAM_PID_MCAN11 (38) /* CAN1 IRQ line 1 */
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#define SAM_PID_EMAC (39) /* Ethernet MAC */
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#define SAM_PID_EMAC0 (39) /* Ethernet MAC */
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#define SAM_PID_AFEC1 (40) /* Analog Front End 1 */
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#define SAM_PID_TWIHS2 (41) /* Two-Wire Interface 2 */
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#define SAM_PID_SPI1 (42) /* Serial Peripheral Interface 1 */
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@ -159,7 +159,7 @@
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#define SAM_IRQ_MCAN01 (SAM_IRQ_EXTINT+SAM_PID_MCAN01) /* CAN0 IRQ line 1 */
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#define SAM_IRQ_MCAN10 (SAM_IRQ_EXTINT+SAM_PID_MCAN10) /* CAN1 IRQ line 0 */
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#define SAM_IRQ_MCAN11 (SAM_IRQ_EXTINT+SAM_PID_MCAN11) /* CAN1 IRQ line 1 */
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#define SAM_IRQ_EMAC (SAM_IRQ_EXTINT+SAM_PID_EMAC) /* Ethernet MAC */
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#define SAM_IRQ_EMAC0 (SAM_IRQ_EXTINT+SAM_PID_EMAC0) /* Ethernet MAC */
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#define SAM_IRQ_AFEC1 (SAM_IRQ_EXTINT+SAM_PID_AFEC1) /* Analog Front End 1 */
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#define SAM_IRQ_TWIHS2 (SAM_IRQ_EXTINT+SAM_PID_TWIHS2) /* Two-Wire Interface 2 */
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#define SAM_IRQ_SPI1 (SAM_IRQ_EXTINT+SAM_PID_SPI1) /* Serial Peripheral Interface 1 */
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@ -114,6 +114,10 @@ config SAMV7_HAVE_EBI
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bool
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default n
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config SAMV7_EMAC
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bool
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default n
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config SAMV7_HSMCI
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bool
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default n
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@ -217,9 +221,10 @@ config SAMV7_EBI
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default n
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depends on SAMV7_HAVE_EBI
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config SAMV7_EMAC
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config SAMV7_EMAC0
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bool "Ethernet MAC (GMAC)"
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default n
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select SAMV7_EMAC
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select NETDEVICES
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select ARCH_HAVE_PHY
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@ -1009,3 +1014,225 @@ config SAMV7_HSMCI_REGDEBUG
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Very invasive! Requires also DEBUG.
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endmenu # HSMCI device driver options
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menu "EMAC device driver options"
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depends on SAMV7_EMAC0
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config SAMV7_EMAC0_NRXBUFFERS
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int "Number of RX buffers"
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default 16
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---help---
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EMAC buffer memory is segmented into 128 byte units (not
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configurable). This setting provides the number of such 128 byte
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units used for reception. This is also equal to the number of RX
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descriptors that will be allocated The selected value must be an
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even power of 2.
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config SAMV7_EMAC0_NTXBUFFERS
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int "Number of TX buffers"
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default 8
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---help---
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EMAC buffer memory is segmented into full Ethernet packets (size
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NET_BUFSIZE bytes). This setting provides the number of such packets
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that can be in flight. This is also equal to the number of TX
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descriptors that will be allocated.
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config SAMV7_EMAC0_PHYADDR
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int "PHY address"
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default 1
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---help---
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The 5-bit address of the PHY on the board. Default: 1
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config SAMV7_EMAC0_PHYINIT
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bool "Board-specific PHY Initialization"
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default n
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---help---
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Some boards require specialized initialization of the PHY before it can be used.
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This may include such things as configuring GPIOs, resetting the PHY, etc. If
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SAMV7_EMAC0_PHYINIT is defined in the configuration then the board specific logic must
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provide sam_phyinitialize(); The SAMV7 EMAC driver will call this function
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one time before it first uses the PHY.
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choice
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prompt "PHY interface"
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default SAMV7_EMAC0_MII
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config SAMV7_EMAC0_MII
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bool "MII"
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---help---
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Support Ethernet MII interface (vs RMII).
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config SAMV7_EMAC0_RMII
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bool "RMII"
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depends on !ARCH_CHIP_SAM4E
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---help---
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Support Ethernet RMII interface (vs MII).
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endchoice # PHY interface
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config SAMV7_EMAC0_CLAUSE45
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bool "Clause 45 MII"
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depends on SAMV7_EMAC0_MII
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---help---
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MDIO was originally defined in Clause 22 of IEEE RFC802.3. In the
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original specification, a single MDIO interface is able to access up
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to 32 registers in 32 different PHY devices. To meet the needs the
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expanding needs of 10-Gigabit Ethernet devices, Clause 45 of the
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802.3ae specification provided the following additions to MDIO:
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- Ability to access 65,536 registers in 32 different devices on
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32 different ports
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- Additional OP-code and ST-code for Indirect Address register
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access for 10 Gigabit Ethernet
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- End-to-end fault signaling
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- Multiple loopback points
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- Low voltage electrical specification
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By default, Clause 22 PHYs will be supported unless this option is
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selected.
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config SAMV7_EMAC0_AUTONEG
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bool "Use autonegotiation"
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default y
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---help---
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Use PHY autonegotiation to determine speed and mode
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config SAMV7_EMAC0_ETHFD
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bool "Full duplex"
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default n
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depends on !SAMV7_EMAC0_AUTONEG
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---help---
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If SAMV7_EMAC0_AUTONEG is not defined, then this may be defined to select full duplex
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mode. Default: half-duplex
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config SAMV7_EMAC0_ETH100MBPS
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bool "100 Mbps"
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default n
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depends on !SAMV7_EMAC0_AUTONEG
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---help---
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If SAMV7_EMAC0_AUTONEG is not defined, then this may be defined to select 100 MBps
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speed. Default: 10 Mbps
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config SAMV7_EMAC0_PHYSR
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int "PHY Status Register Address (decimal)"
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depends on SAMV7_EMAC0_AUTONEG
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---help---
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This must be provided if SAMV7_EMAC0_AUTONEG is defined. The PHY status register
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address may diff from PHY to PHY. This configuration sets the address of
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the PHY status register.
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config SAMV7_EMAC0_PHYSR_ALTCONFIG
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bool "PHY Status Alternate Bit Layout"
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default n
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depends on SAMV7_EMAC0_AUTONEG
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---help---
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Different PHYs present speed and mode information in different ways. Some
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will present separate information for speed and mode (this is the default).
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Those PHYs, for example, may provide a 10/100 Mbps indication and a separate
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full/half duplex indication. This options selects an alternative representation
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where speed and mode information are combined. This might mean, for example,
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separate bits for 10HD, 100HD, 10FD and 100FD.
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if SAMV7_EMAC0_AUTONEG
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if SAMV7_EMAC0_PHYSR_ALTCONFIG
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config SAMV7_EMAC0_PHYSR_ALTMODE
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hex "PHY Mode Mask"
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---help---
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This must be provided if SAMV7_EMAC0_AUTONEG is defined. This provide bit mask
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for isolating the speed and full/half duplex mode bits.
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config SAMV7_EMAC0_PHYSR_10HD
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hex "10MBase-T Half Duplex Value"
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---help---
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This must be provided if SAMV7_EMAC0_AUTONEG is defined. This is the value
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under the bit mask that represents the 10Mbps, half duplex setting.
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config SAMV7_EMAC0_PHYSR_100HD
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hex "100Base-T Half Duplex Value"
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---help---
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This must be provided if SAMV7_EMAC0_AUTONEG is defined. This is the value
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under the bit mask that represents the 100Mbps, half duplex setting.
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config SAMV7_EMAC0_PHYSR_10FD
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hex "10Base-T Full Duplex Value"
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---help---
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This must be provided if SAMV7_EMAC0_AUTONEG is defined. This is the value
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under the bit mask that represents the 10Mbps, full duplex setting.
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config SAMV7_EMAC0_PHYSR_100FD
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hex "100Base-T Full Duplex Value"
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---help---
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This must be provided if SAMV7_EMAC0_AUTONEG is defined. This is the value
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under the bit mask that represents the 100Mbps, full duplex setting.
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endif # SAMV7_EMAC0_PHYSR_ALTCONFIG
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if !SAMV7_EMAC0_PHYSR_ALTCONFIG
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config SAMV7_EMAC0_PHYSR_SPEED
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hex "PHY Speed Mask"
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---help---
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This must be provided if SAMV7_EMAC0_AUTONEG is defined. This provides bit mask
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for isolating the 10 or 100MBps speed indication.
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config SAMV7_EMAC0_PHYSR_100MBPS
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hex "PHY 100Mbps Speed Value"
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---help---
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This must be provided if SAMV7_EMAC0_AUTONEG is defined. This provides the value
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of the speed bit(s) indicating 100MBps speed.
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config SAMV7_EMAC0_PHYSR_MODE
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hex "PHY Mode Mask"
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---help---
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This must be provided if SAMV7_EMAC0_AUTONEG is defined. This provides the
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bit mask for isolating the full or half duplex mode bits.
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config SAMV7_EMAC0_PHYSR_FULLDUPLEX
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hex "PHY Full Duplex Mode Value"
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---help---
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This must be provided if SAMV7_EMAC0_AUTONEG is defined. This provides the
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value of the mode bits indicating full duplex mode.
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endif # !SAMV7_EMAC0_PHYSR_ALTCONFIG
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endif # SAMV7_EMAC0_AUTONEG
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# These apply to both EMAC0 and EMAC1 (but are in the EMAC0 menu for now
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# because there is not yet any SAMV7 chip that supports two Ethernet MACS
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config SAMV7_EMAC0_ISETH0
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bool
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default y
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config SAMV7_EMAC_PREALLOCATE
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bool "Preallocate buffers"
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default n
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---help---
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Buffer an descriptor many may either be allocated from the memory
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pool or pre-allocated to lie in .bss. This options selected pre-
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allocated buffer memory.
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config SAMV7_EMAC_NBC
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bool "Disable Broadcast"
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default n
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---help---
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Select to disable receipt of broadcast packets.
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config SAMV7_EMAC_DEBUG
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bool "Force EMAC0/1 DEBUG"
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default n
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depends on DEBUG && !DEBUG_NET
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---help---
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This option will force debug output from EMAC driver even without
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network debug output enabled. This is not normally something
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that would want to do but is convenient if you are debugging the
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driver and do not want to get overloaded with other
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network-related debug output.
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config SAMV7_EMAC_REGDEBUG
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bool "Register-Level Debug"
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default n
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depends on DEBUG
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---help---
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Enable very low-level register access debug. Depends on DEBUG.
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endmenu # EMAC0 device driver options
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@ -140,3 +140,7 @@ endif
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ifeq ($(CONFIG_SAMV7_HSMCI),y)
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CHIP_CSRCS += sam_hsmci.c sam_hsmci_clkdiv.c
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endif
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ifeq ($(CONFIG_SAMV7_EMAC),y)
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CHIP_CSRCS += sam_emac.c sam_ethernet.c
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endif
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@ -167,28 +167,28 @@
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/* Ethernet MAC Controller (EMAC) */
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#define GPIO_EMAC_COL (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN13)
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#define GPIO_EMAC_CRS (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN10)
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#define GPIO_EMAC_MDC (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN8)
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#define GPIO_EMAC_MDIO (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN9)
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#define GPIO_EMAC_RX0 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN5)
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#define GPIO_EMAC_RX1 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN6)
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#define GPIO_EMAC_RX2 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN11)
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#define GPIO_EMAC_RX3 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN12)
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#define GPIO_EMAC_RXCK (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN14)
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#define GPIO_EMAC_RXDV (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN4)
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#define GPIO_EMAC_RXER (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN7)
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#define GPIO_EMAC_TSUCOMP_1 (GPIO_PERIPHB | GPIO_CFG_DEFAULT | GPIO_PORT_PIOB | GPIO_PIN1)
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#define GPIO_EMAC_TSUCOMP_2 (GPIO_PERIPHB | GPIO_CFG_DEFAULT | GPIO_PORT_PIOB | GPIO_PIN12)
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#define GPIO_EMAC_TSUCOMP_3 (GPIO_PERIPHC | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN11)
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#define GPIO_EMAC_TSUCOMP_4 (GPIO_PERIPHC | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN20)
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#define GPIO_EMAC_TX0 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN2)
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#define GPIO_EMAC_TX1 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN3)
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#define GPIO_EMAC_TX2 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN15)
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#define GPIO_EMAC_TX3 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN16)
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#define GPIO_EMAC_TXCK (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN0)
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#define GPIO_EMAC_TXEN (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN1)
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#define GPIO_EMAC_TXER (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN17)
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#define GPIO_EMAC0_COL (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN13)
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#define GPIO_EMAC0_CRS (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN10)
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#define GPIO_EMAC0_MDC (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN8)
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#define GPIO_EMAC0_MDIO (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN9)
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#define GPIO_EMAC0_RX0 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN5)
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#define GPIO_EMAC0_RX1 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN6)
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#define GPIO_EMAC0_RX2 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN11)
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#define GPIO_EMAC0_RX3 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN12)
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#define GPIO_EMAC0_RXCK (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN14)
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#define GPIO_EMAC0_RXDV (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN4)
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#define GPIO_EMAC0_RXER (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN7)
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#define GPIO_EMAC0_TSUCOMP_1 (GPIO_PERIPHB | GPIO_CFG_DEFAULT | GPIO_PORT_PIOB | GPIO_PIN1)
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#define GPIO_EMAC0_TSUCOMP_2 (GPIO_PERIPHB | GPIO_CFG_DEFAULT | GPIO_PORT_PIOB | GPIO_PIN12)
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#define GPIO_EMAC0_TSUCOMP_3 (GPIO_PERIPHC | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN11)
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#define GPIO_EMAC0_TSUCOMP_4 (GPIO_PERIPHC | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN20)
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#define GPIO_EMAC0_TX0 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN2)
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#define GPIO_EMAC0_TX1 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN3)
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#define GPIO_EMAC0_TX2 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN15)
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#define GPIO_EMAC0_TX3 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN16)
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#define GPIO_EMAC0_TXCK (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN0)
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#define GPIO_EMAC0_TXEN (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN1)
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#define GPIO_EMAC0_TXER (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN17)
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/* Image Sensor Interface (ISI) */
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4656
arch/arm/src/samv7/sam_emac.c
Normal file
4656
arch/arm/src/samv7/sam_emac.c
Normal file
File diff suppressed because it is too large
Load Diff
118
arch/arm/src/samv7/sam_ethernet.c
Normal file
118
arch/arm/src/samv7/sam_ethernet.c
Normal file
@ -0,0 +1,118 @@
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/****************************************************************************
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* arch/arm/src/samv7/sam_ethernet.c
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*
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <debug.h>
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#include "sam_ethernet.h"
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#ifdef CONFIG_NET
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Function: up_netinitialize
|
||||
*
|
||||
* Description:
|
||||
* This is the "standard" network initialization logic called from the
|
||||
* low-level initialization logic in up_initialize.c. This is just
|
||||
* a shim to support the slightly different prototype of
|
||||
* sam_emac_intiialize() and to provide support for future chips that
|
||||
* may have multiple EMAC peripherals.
|
||||
*
|
||||
* Parameters:
|
||||
* None.
|
||||
*
|
||||
* Returned Value:
|
||||
* None.
|
||||
*
|
||||
* Assumptions:
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void up_netinitialize(void)
|
||||
{
|
||||
#ifdef CONFIG_SAMV7_EMAC0
|
||||
int ret;
|
||||
|
||||
#ifdef CONFIG_SAMV7_EMAC0
|
||||
/* Initialize the EMAC0 driver */
|
||||
|
||||
ret = sam_emac_initialize(EMAC0_INTF);
|
||||
if (ret < 0)
|
||||
{
|
||||
nlldbg("ERROR: up_emac_initialize(EMAC0) failed: %d\n", ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SAMV7_EMAC1
|
||||
/* Initialize the EMAC1 driver */
|
||||
|
||||
ret = sam_emac_initialize(EMAC1_INTF);
|
||||
if (ret < 0)
|
||||
{
|
||||
nlldbg("ERROR: up_emac_initialize(EMAC1) failed: %d\n", ret);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif /* CONFIG_NET */
|
||||
234
arch/arm/src/samv7/sam_ethernet.h
Normal file
234
arch/arm/src/samv7/sam_ethernet.h
Normal file
@ -0,0 +1,234 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/samv7/sam_ethernet.h
|
||||
*
|
||||
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_SAMV7_SAM_ETHERNET_H
|
||||
#define __ARCH_ARM_SRC_SAMV7_SAM_ETHERNET_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <arch/samv7/chip.h>
|
||||
|
||||
#include "chip/sam_emac.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
/* Understood PHY types */
|
||||
|
||||
#define SAMV7_PHY_DM9161 0
|
||||
#define SAMV7_PHY_LAN8700 1
|
||||
#define SAMV7_PHY_KSZ8051 2
|
||||
#define SAMV7_PHY_KSZ8061 3
|
||||
#define SAMV7_PHY_KSZ8081 4
|
||||
#define SAMV7_PHY_KSZ90x1 5
|
||||
|
||||
/* Definitions for use with sam_phy_boardinitialize */
|
||||
|
||||
#define EMAC0_INTF 0
|
||||
#define EMAC1_INTF 1
|
||||
|
||||
/* Which is ETH0 and which is ETH1? */
|
||||
|
||||
#ifndef CONFIG_SAMV7_EMAC
|
||||
# undef CONFIG_SAMV7_EMAC0_ISETH0
|
||||
# undef CONFIG_SAMV7_EMAC1_ISETH0
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SAMV7_EMAC0_ISETH0) && defined(CONFIG_SAMV7_EMAC1_ISETH0)
|
||||
# error EMAC0 and EMAC2 cannot both be ETH0
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SAMV7_EMAC0_ISETH0)
|
||||
# if defined(CONFIG_ETH0_PHY_DM9161)
|
||||
# define SAMV7_EMAC0_PHY_DM9161 1
|
||||
# define SAMV7_EMAC0_PHY_TYPE SAMV7_PHY_DM9161
|
||||
# elif defined(CONFIG_ETH0_PHY_LAN8700)
|
||||
# define SAMV7_EMAC0_PHY_LAN8700 1
|
||||
# define SAMV7_EMAC0_PHY_TYPE SAMV7_PHY_LAN8700
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ8051)
|
||||
# define SAMV7_EMAC0_PHY_KSZ8051 1
|
||||
# define SAMV7_EMAC0_PHY_TYPE SAMV7_PHY_KSZ8051
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ8061)
|
||||
# define SAMV7_EMAC0_PHY_KSZ8061 1
|
||||
# define SAMV7_EMAC0_PHY_TYPE SAMV7_PHY_KSZ8061
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ8081)
|
||||
# define SAMV7_EMAC0_PHY_KSZ8081 1
|
||||
# define SAMV7_EMAC0_PHY_TYPE SAMV7_PHY_KSZ8081
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ90x1)
|
||||
# define SAMV7_EMAC0_PHY_KSZ90x1 1
|
||||
# define SAMV7_EMAC0_PHY_TYPE SAMV7_PHY_KSZ90x1
|
||||
# else
|
||||
# error ETH0 PHY unrecognized
|
||||
# endif
|
||||
#elif defined(CONFIG_SAMV7_EMAC0)
|
||||
# if defined(CONFIG_ETH1_PHY_DM9161)
|
||||
# define SAMV7_EMAC0_PHY_DM9161 1
|
||||
# define SAMV7_EMAC0_PHY_TYPE SAMV7_PHY_DM9161
|
||||
# elif defined(CONFIG_ETH1_PHY_LAN8700)
|
||||
# define SAMV7_EMAC0_PHY_LAN8700 1
|
||||
# define SAMV7_EMAC0_PHY_TYPE SAMV7_PHY_LAN8700
|
||||
# elif defined(CONFIG_ETH1_PHY_KSZ8051)
|
||||
# define SAMV7_EMAC0_PHY_KSZ8051 1
|
||||
# define SAMV7_EMAC0_PHY_TYPE SAMV7_PHY_KSZ8051
|
||||
# elif defined(CONFIG_ETH1_PHY_KSZ8061)
|
||||
# define SAMV7_EMAC0_PHY_KSZ8061 1
|
||||
# define SAMV7_EMAC0_PHY_TYPE SAMV7_PHY_KSZ8061
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ8081)
|
||||
# define SAMV7_EMAC0_PHY_KSZ8081 1
|
||||
# define SAMV7_EMAC0_PHY_TYPE SAMV7_PHY_KSZ8081
|
||||
# elif defined(CONFIG_ETH1_PHY_KSZ90x1)
|
||||
# define SAMV7_EMAC0_PHY_KSZ90x1 1
|
||||
# define SAMV7_EMAC0_PHY_TYPE SAMV7_PHY_KSZ90x1
|
||||
# else
|
||||
# error ETH1 PHY unrecognized
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SAMV7_EMAC1_ISETH0)
|
||||
# if defined(CONFIG_ETH0_PHY_DM9161)
|
||||
# define SAMV7_EMAC1_PHY_DM9161 1
|
||||
# define SAMV7_EMAC1_PHY_TYPE SAMV7_PHY_DM9161
|
||||
# elif defined(CONFIG_ETH0_PHY_LAN8700)
|
||||
# define SAMV7_EMAC1_PHY_LAN8700 1
|
||||
# define SAMV7_EMAC1_PHY_TYPE SAMV7_PHY_LAN8700
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ8051)
|
||||
# define SAMV7_EMAC1_PHY_KSZ8051 1
|
||||
# define SAMV7_EMAC1_PHY_TYPE SAMV7_PHY_KSZ8051
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ8061)
|
||||
# define SAMV7_EMAC1_PHY_KSZ8061 1
|
||||
# define SAMV7_EMAC1_PHY_TYPE SAMV7_PHY_KSZ8061
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ8081)
|
||||
# define SAMV7_EMAC1_PHY_KSZ8081 1
|
||||
# define SAMV7_EMAC1_PHY_TYPE SAMV7_PHY_KSZ8081
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ90x1)
|
||||
# define SAMV7_EMAC1_PHY_KSZ90x1 1
|
||||
# define SAMV7_EMAC1_PHY_TYPE SAMV7_PHY_KSZ90x1
|
||||
# else
|
||||
# error ETH0 PHY unrecognized
|
||||
# endif
|
||||
#elif defined(CONFIG_SAMV7_EMAC1)
|
||||
# if defined(CONFIG_ETH1_PHY_DM9161)
|
||||
# define SAMV7_EMAC1_PHY_DM9161 1
|
||||
# define SAMV7_EMAC1_PHY_TYPE SAMV7_PHY_DM9161
|
||||
# elif defined(CONFIG_ETH1_PHY_LAN8700)
|
||||
# define SAMV7_EMAC1_PHY_LAN8700 1
|
||||
# define SAMV7_EMAC1_PHY_TYPE SAMV7_PHY_LAN8700
|
||||
# elif defined(CONFIG_ETH1_PHY_KSZ8051)
|
||||
# define SAMV7_EMAC1_PHY_KSZ8051 1
|
||||
# define SAMV7_EMAC1_PHY_TYPE SAMV7_PHY_KSZ8051
|
||||
# elif defined(CONFIG_ETH1_PHY_KSZ8061)
|
||||
# define SAMV7_EMAC1_PHY_KSZ8061 1
|
||||
# define SAMV7_EMAC1_PHY_TYPE SAMV7_PHY_KSZ8061
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ8081)
|
||||
# define SAMV7_EMAC1_PHY_KSZ8081 1
|
||||
# define SAMV7_EMAC1_PHY_TYPE SAMV7_PHY_KSZ8081
|
||||
# elif defined(CONFIG_ETH1_PHY_KSZ90x1)
|
||||
# define SAMV7_EMAC1_PHY_KSZ90x1 1
|
||||
# define SAMV7_EMAC1_PHY_TYPE SAMV7_PHY_KSZ90x1
|
||||
# else
|
||||
# error ETH1 PHY unrecognized
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Function: sam_emac_initialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize the EMAC driver.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success; Negated errno on failure.
|
||||
*
|
||||
* Assumptions:
|
||||
* Called very early in the initialization sequence.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SAMV7_EMAC
|
||||
int sam_emac_initialize(int intf);
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Function: sam_phy_boardinitialize
|
||||
*
|
||||
* Description:
|
||||
* Some boards require specialized initialization of the PHY before it can be used.
|
||||
* This may include such things as configuring GPIOs, resetting the PHY, etc. If
|
||||
* CONFIG_SAMV7_PHYINIT is defined in the configuration then the board specific
|
||||
* logic must provide sam_phyinitialize(); The SAMV7 Ethernet driver will call
|
||||
* this function one time before it first uses the PHY.
|
||||
*
|
||||
* Parameters:
|
||||
* intf - Always zero for now.
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success; Negated errno on failure.
|
||||
*
|
||||
* Assumptions:
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SAMV7_PHYINIT
|
||||
int sam_phy_boardinitialize(int intf);
|
||||
#endif
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_ARM_SRC_SAMV7_SAM_ETHERNET_H */
|
||||
@ -96,7 +96,7 @@
|
||||
#define sam_mcan01_enableclk()
|
||||
#define sam_mcan10_enableclk() sam_enableperiph1(SAM_PID_MCAN10)
|
||||
#define sam_mcan11_enableclk()
|
||||
#define sam_emac_enableclk() sam_enableperiph1(SAM_PID_EMAC)
|
||||
#define sam_emac0_enableclk() sam_enableperiph1(SAM_PID_EMAC0)
|
||||
#define sam_afec1_enableclk() sam_enableperiph1(SAM_PID_AFEC1)
|
||||
#define sam_twihs2_enableclk() sam_enableperiph1(SAM_PID_TWIHS2)
|
||||
#define sam_spi1_enableclk() sam_enableperiph1(SAM_PID_SPI1)
|
||||
@ -164,7 +164,7 @@
|
||||
#define sam_mcan01_disableclk()
|
||||
#define sam_mcan10_disableclk() sam_disableperiph1(SAM_PID_MCAN10)
|
||||
#define sam_mcan11_disableclk()
|
||||
#define sam_emac_disableclk() sam_disableperiph1(SAM_PID_EMAC)
|
||||
#define sam_emac0_disableclk() sam_disableperiph1(SAM_PID_EMAC0)
|
||||
#define sam_afec1_disableclk() sam_disableperiph1(SAM_PID_AFEC1)
|
||||
#define sam_twihs2_disableclk() sam_disableperiph1(SAM_PID_TWIHS2)
|
||||
#define sam_spi1_disableclk() sam_disableperiph1(SAM_PID_SPI1)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user