Add start-up logic and irq.h header
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2088 42af7a65-404d-4744-a932-0658087f49c3
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arch/arm/include/stm32/irq.h
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233
arch/arm/include/stm32/irq.h
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@ -0,0 +1,233 @@
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/************************************************************************************
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* arch/arm/include/stm32s/irq.h
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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||||
* are met:
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||||
*
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||||
* 1. Redistributions of source code must retain the above copyright
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||||
* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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||||
*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/* This file should never be included directed but, rather,
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* only indirectly through nuttx/irq.h
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*/
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#ifndef __ARCH_ARM_INCLUDE_STM32_IRQ_H
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#define __ARCH_ARM_INCLUDE_STM32_IRQ_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <nuttx/irq.h>
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to
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* bits in the NVIC. This does, however, waste several words of memory in the IRQ
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* to handle mapping tables.
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*/
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/* Processor Exceptions (vectors 0-15) */
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#define STM32_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
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/* Vector 0: Reset stack pointer value */
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/* Vector 1: Reset (not handler as an IRQ) */
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#define STM32_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
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#define STM32_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */
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#define STM32_IRQ_MPU (4) /* Vector 4: Memory management (MPU) */
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#define STM32_IRQ_BUSFAULT (5) /* Vector 5: Bus fault */
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#define STM32_IRQ_USAGEFAULT (6) /* Vector 6: Usage fault */
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#define STM32_IRQ_SVCALL (11) /* Vector 11: SVC call */
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#define STM32_IRQ_DBGMONITOR (12) /* Vector 12: Debug Monitor */
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/* Vector 13: Reserved */
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#define STM32_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */
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#define STM32_IRQ_SYSTICK (15) /* Vector 15: System tick */
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/* External interrupts (vectors >= 16) */
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#define STM32_IRQ_INTERRUPTS (16) /* Vector number of the first external interrupt */
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#ifdef CONFIG_STM32_CONNECTIVITY_LINE
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# define STM32_IRQ_WWDG (16) /* 0: Window Watchdog interrupt */
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# define STM32_IRQ_PVD (17) /* 1: PVD through EXTI Line detection interrupt */
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# define STM32_IRQ_TAMPER (18) /* 2: Tamper interrupt */
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# define STM32_IRQ_RTC (19) /* 3: RTC global interrupt */
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# define STM32_IRQ_FLASH (20) /* 4: Flash global interrupt */
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# define STM32_IRQ_RCC (21) /* 5: RCC global interrupt */
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# define STM32_IRQ_EXTI0 (22) /* 6: EXTI Line 0 interrupt */
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# define STM32_IRQ_EXTI1 (23) /* 7: EXTI Line 1 interrupt */
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# define STM32_IRQ_EXTI2 (24) /* 8: EXTI Line 2 interrupt */
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# define STM32_IRQ_EXTI3 (25) /* 9: EXTI Line 3 interrupt */
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# define STM32_IRQ_EXTI4 (26) /* 10: EXTI Line 4 interrupt */
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# define STM32_IRQ_DMA1CH1 (27) /* 11: DMA1 Channel 1 global interrupt */
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# define STM32_IRQ_DMA1CH2 (28) /* 12: DMA1 Channel 2 global interrupt */
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# define STM32_IRQ_DMA1CH3 (29) /* 13: DMA1 Channel 3 global interrupt */
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# define STM32_IRQ_DMA1CH4 (30) /* 14: DMA1 Channel 4 global interrupt */
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# define STM32_IRQ_DMA1CH5 (31) /* 15: DMA1 Channel 5 global interrupt */
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# define STM32_IRQ_DMA1CH6 (32) /* 16: DMA1 Channel 7 global interrupt */
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# define STM32_IRQ_ADC12 (34) /* 18: ADC1 and ADC2 global interrupt */
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# define STM32_IRQ_CAN1TX (35) /* 19: CAN1 TX interrupts */
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# define STM32_IRQ_CAN1RX0 (36) /* 20: CAN1 RX0 interrupts */
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# define STM32_IRQ_CAN1RX1 (37) /* 21: CAN1 RX1 interrupt */
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# define STM32_IRQ_CAN1SCE (38) /* 22: CAN1 SCE interrupt */
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# define STM32_IRQ_EXTI95 (39) /* 23: EXTI Line[9:5] interrupts */
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# define STM32_IRQ_TIM1BRK (40) /* 24: TIM1 Break interrupt */
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# define STM32_IRQ_TIM1UP (41) /* 25: TIM1 Update interrupt */
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# define STM32_IRQ_TIM1TRGCOM (42) /* 26: TIM1 Trigger and Commutation interrupts */
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# define STM32_IRQ_TIM1CC (43) /* 27: TIM1 Capture Compare interrupt */
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# define STM32_IRQ_TIM2 (44) /* 28: TIM2 global interrupt */
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# define STM32_IRQ_TIM3 (45) /* 29: TIM3 global interrupt */
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# define STM32_IRQ_TIM4 (46) /* 30: TIM4 global interrupt */
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# define STM32_IRQ_I2C1EV (47) /* 31: I2C1 event interrupt */
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# define STM32_IRQ_I2C1ER (48) /* 32: I2C1 error interrupt */
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# define STM32_IRQ_I2C2EV (49) /* 33: I2C2 event interrupt */
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# define STM32_IRQ_I2C2ER (50) /* 34: I2C2 error interrupt */
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# define STM32_IRQ_SPI1 (51) /* 35: SPI1 global interrupt */
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# define STM32_IRQ_SPI2 (52) /* 36: SPI2 global interrupt */
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# define STM32_IRQ_USART1 (53) /* 37: USART1 global interrupt */
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# define STM32_IRQ_USART2 (54) /* 38: USART2 global interrupt */
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# define STM32_IRQ_USART3 (55) /* 39: USART3 global interrupt */
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# define STM32_IRQ_EXTI1510 (56) /* 40: EXTI Line[15:10] interrupts */
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# define STM32_IRQ_RTCAlR (57) /* 41: RTC alarm through EXTI line interrupt */
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# define STM32_IRQ_OTGFSWKUP (58) /* 42: USB On-The-Go FS Wakeup through EXTI line interrupt */
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/* 43-49: Reserved */
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# define STM32_IRQ_TIM5 (59) /* 50: TIM5 global interrupt */
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# define STM32_IRQ_SPI3 (60) /* 51: SPI3 global interrupt */
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# define STM32_IRQ_UART4 (71) /* 52: UART4 global interrupt */
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# define STM32_IRQ_UART5 (72) /* 53: UART5 global interrupt */
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# define STM32_IRQ_TIM6 (73) /* 54: TIM6 global interrupt */
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# define STM32_IRQ_TIM7 (74) /* 55: TIM7 global interrupt */
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# define STM32_IRQ_DMA2CH1 (75) /* 56: DMA2 Channel 1 global interrupt */
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# define STM32_IRQ_DMA2CH2 (76) /* 57: DMA2 Channel 2 global interrupt */
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# define STM32_IRQ_DMA2CH3 (77) /* 58: DMA2 Channel 3 global interrupt */
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# define STM32_IRQ_DMA2CH4 (78) /* 59: DMA2 Channel 4 global interrupt */
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# define STM32_IRQ_DMA2CH5 (79) /* 60: DMA2 Channel 5 global interrupt */
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# define STM32_IRQ_ETH E (80) /* 61: thernet global interrupt */
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# define STM32_IRQ_ETHWKUP (81) /* 62: Ethernet Wakeup through EXTI line interrupt */
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# define STM32_IRQ_CAN2TX (82) /* 63: CAN2 TX interrupts */
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# define STM32_IRQ_CAN2RX0 (83) /* 64: CAN2 RX0 interrupts */
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# define STM32_IRQ_CAN2RX1 (84) /* 65: CAN2 RX1 interrupt */
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# define STM32_IRQ_CAN2SCE (85) /* 66: CAN2 SCE interrupt */
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# define STM32_IRQ_OTGFS (86) /* 67: USB On The Go FS global interrupt */
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# define NR_IRQS (87)
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#else
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# define STM32_IRQ_WWDG (16) /* 0: Window Watchdog interrupt */
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# define STM32_IRQ_PVD (17) /* 1: PVD through EXTI Line detection interrupt */
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# define STM32_IRQ_TAMPER (18) /* 2: Tamper interrupt */
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# define STM32_IRQ_RTC (19) /* 3: RTC global interrupt */
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# define STM32_IRQ_FLASH (20) /* 4: Flash global interrupt */
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# define STM32_IRQ_RCC (21) /* 5: RCC global interrupt */
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# define STM32_IRQ_EXTI0 (22) /* 6: EXTI Line 0 interrupt */
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# define STM32_IRQ_EXTI1 (23) /* 7: EXTI Line 1 interrupt */
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# define STM32_IRQ_EXTI2 (24) /* 8: EXTI Line 2 interrupt */
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# define STM32_IRQ_EXTI3 (25) /* 9: EXTI Line 3 interrupt */
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# define STM32_IRQ_EXTI4 (26) /* 10: EXTI Line 4 interrupt */
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# define STM32_IRQ_DMA1CH1 (27) /* 11: DMA1 Channel 1 global interrupt */
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# define STM32_IRQ_DMA1CH2 (28) /* 12: DMA1 Channel 2 global interrupt */
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# define STM32_IRQ_DMA1CH3 (29) /* 13: DMA1 Channel 3 global interrupt */
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# define STM32_IRQ_DMA1CH4 (30) /* 14: DMA1 Channel 4 global interrupt */
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# define STM32_IRQ_DMA1CH5 (31) /* 15: DMA1 Channel 5 global interrupt */
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# define STM32_IRQ_DMA1CH6 (32) /* 16: DMA1 Channel 6 global interrupt */
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# define STM32_IRQ_DMA1CH7 (33) /* 17: DMA1 Channel 7 global interrupt */
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# define STM32_IRQ_ADC12 (34) /* 18: ADC1 and ADC2 global interrupt */
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# define STM32_IRQ_USBHPCANTX (35) /* 19: USB High Priority or CAN TX interrupts*/
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# define STM32_IRQ_USBLPCANRX0 (36) /* 20: USB Low Priority or CAN RX0 interrupts*/
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# define STM32_IRQ_CAN1RX1 (37) /* 21: CAN1 RX1 interrupt */
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# define STM32_IRQ_CAN1SCE (38) /* 22: CAN1 SCE interrupt */
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# define STM32_IRQ_EXTI95 (39) /* 23: EXTI Line[9:5] interrupts */
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# define STM32_IRQ_TIM1BRK (40) /* 24: TIM1 Break interrupt */
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# define STM32_IRQ_TIM1UP (41) /* 25: TIM1 Update interrupt */
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# define STM32_IRQ_TIM1TRGCOM (42) /* 26: TIM1 Trigger and Commutation interrupts */
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# define STM32_IRQ_TIM1CC (43) /* 27: TIM1 Capture Compare interrupt */
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# define STM32_IRQ_TIM2 (44) /* 28: TIM2 global interrupt */
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# define STM32_IRQ_TIM3 (45) /* 29: TIM3 global interrupt */
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# define STM32_IRQ_TIM4 (46) /* 30: TIM4 global interrupt */
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# define STM32_IRQ_I2C1EV (47) /* 31: I2C1 event interrupt */
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# define STM32_IRQ_I2C1ER (48) /* 32: I2C1 error interrupt */
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# define STM32_IRQ_I2C2EV (49) /* 33: I2C2 event interrupt */
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# define STM32_IRQ_I2C2ER (50) /* 34: I2C2 error interrupt */
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# define STM32_IRQ_SPI1 (51) /* 35: SPI1 global interrupt */
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# define STM32_IRQ_SPI2 (52) /* 36: SPI2 global interrupt */
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# define STM32_IRQ_USART1 (53) /* 37: USART1 global interrupt */
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# define STM32_IRQ_USART2 (54) /* 38: USART2 global interrupt */
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# define STM32_IRQ_USART3 (55) /* 39: USART3 global interrupt */
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# define STM32_IRQ_EXTI1510 (56) /* 40: EXTI Line[15:10] interrupts */
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# define STM32_IRQ_RTCAlR (57) /* 41: RTC alarm through EXTI line interrupt */
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# define STM32_IRQ_USBWKUP (58) /* 42: USB wakeup from suspend through EXTI line interrupt*/
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# define STM32_IRQ_TIM8BRK (59) /* 43: TIM8 Break interrupt */
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# define STM32_IRQ_TIM8UP (60) /* 44: TIM8 Update interrupt */
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# define STM32_IRQ_TIM8TRGCOM (61) /* 45: TIM8 Trigger and Commutation interrupts */
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# define STM32_IRQ_TIM8CC (62) /* 46: TIM8 Capture Compare interrupt */
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# define STM32_IRQ_ADC3 (63) /* 47: ADC3 global interrupt */
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# define STM32_IRQ_FSMC (64) /* 48: FSMC global interrupt */
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# define STM32_IRQ_SDIO (65) /* 49: SDIO global interrupt */
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# define STM32_IRQ_TIM5 (66) /* 50: TIM5 global interrupt */
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# define STM32_IRQ_SPI3 (67) /* 51: SPI3 global interrupt */
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# define STM32_IRQ_UART4 (68) /* 52: UART4 global interrupt */
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# define STM32_IRQ_UART5 (69) /* 53: UART5 global interrupt */
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# define STM32_IRQ_TIM6 (70) /* 54: TIM6 global interrupt */
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# define STM32_IRQ_TIM7 (71) /* 55: TIM7 global interrupt */
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# define STM32_IRQ_DMA2CH1 (72) /* 56: DMA2 Channel 1 global interrupt */
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# define STM32_IRQ_DMA2CH2 (73) /* 57: DMA2 Channel 2 global interrupt */
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# define STM32_IRQ_DMA2CH3 (74) /* 58: DMA2 Channel 3 global interrupt */
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# define STM32_IRQ_DMA2CH45 (75) /* 59: DMA2 Channel 4&5 global interrupt */
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# define NR_IRQS (76)
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#endif
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public Data
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************************************************************************************/
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C" {
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#else
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#define EXTERN extern
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#endif
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif /* __ARCH_ARM_INCLUDE_STM32_IRQ_H */
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@ -45,9 +45,10 @@ CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c \
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up_usestack.c up_doirq.c up_hardfault.c up_svcall.c
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CHIP_ASRCS =
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CHIP_CSRCS = stm32_start.c stm32_syscontrol.c stm32_irq.c \
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stm32_gpio.c stm32_gpioirq.c stm32_timerisr.c stm32_lowputc.c \
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stm32_serial.c stm32_ssi.c stm32_dumpgpio.c
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CHIP_CSRCS = stm32_start.c
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# stm32_syscontrol.c stm32_irq.c \
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# stm32_gpio.c stm32_gpioirq.c stm32_timerisr.c stm32_lowputc.c \
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# stm32_serial.c stm32_ssi.c stm32_dumpgpio.c
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ifdef CONFIG_NET
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CHIP_CSRCS += stm32_ethernet.c
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270
arch/arm/src/stm32/stm32_internal.h
Executable file
270
arch/arm/src/stm32/stm32_internal.h
Executable file
@ -0,0 +1,270 @@
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/************************************************************************************
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* arch/arm/src/stm32/stm32_internal.h
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
|
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*
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||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32_STM32_INTERNAL_H
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#define __ARCH_ARM_SRC_STM32_STM32_INTERNAL_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include "up_internal.h"
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#include "chip.h"
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* Bit-encoded input to stm32_configgpio() *******************************************/
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/* Encoding:
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* FFFn nPPP IIIn nnnn nnnn nnnn VPPP BBBB
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*
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* These bits set the primary function of the pin:
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* FFFn nnnn nnnn nnnn nnnn nnnn nnnn nnnn
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*/
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#define GPIO_FUNC_SHIFT 29 /* Bit 31-29: GPIO function */
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#define GPIO_FUNC_MASK (7 << GPIO_FUNC_SHIFT)
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#define GPIO_FUNC_INFLOAT (0 << GPIO_FUNC_SHIFT) /* Input floating */
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#define GPIO_FUNC_INPULLUP (1 << GPIO_FUNC_SHIFT) /* Input pull-up */
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#define GPIO_FUNC_INPULLDWN (2 << GPIO_FUNC_SHIFT) /* Input pull-down */
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#define GPIO_FUNC_ANALOGIN (3 << GPIO_FUNC_SHIFT) /* Analog input */
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#define GPIO_FUNC_OUTOD (4 << GPIO_FUNC_SHIFT) /* Output open-drain */
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#define GPIO_FUNC_OUTPP (5 << GPIO_FUNC_SHIFT) /* Output push-pull */
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#define GPIO_FUNC_AFPP (6 << GPIO_FUNC_SHIFT) /* Altnernate function push-pull */
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#define GPIO_FUNC_AFOD (7 << GPIO_FUNC_SHIFT) /* Altnernate function open-drain */
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/* If the pin is an GPIO digital output, then this identifies the initial output value:
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* nnnn nnnn nnnn nnnn nnnn nnnn Vnnn nnnn
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*/
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#define GPIO_VALUE_SHIFT 7 /* Bit 7: If output, inital value of output */
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#define GPIO_VALUE_MASK (1 << GPIO_VALUE_SHIFT)
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#define GPIO_VALUE_ZERO (0 << GPIO_VALUE_SHIFT) /* Initial value is zero */
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#define GPIO_VALUE_ONE (1 << GPIO_VALUE_SHIFT) /* Initial value is one */
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/* This identifies the GPIO port:
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* nnnn nnnn nnnn nnnn nnnn nnnn nPPP nnnn
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*/
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#define GPIO_PORT_SHIFT 4 /* Bit 4-6: Port number */
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#define GPIO_PORT_MASK (7 << GPIO_PORT_SHIFT)
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#define GPIO_PORTA (0 << GPIO_PORT_SHIFT) /* GPIOA */
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#define GPIO_PORTB (1 << GPIO_PORT_SHIFT) /* GPIOB */
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#define GPIO_PORTC (2 << GPIO_PORT_SHIFT) /* GPIOC */
|
||||
#define GPIO_PORTD (3 << GPIO_PORT_SHIFT) /* GPIOD */
|
||||
#define GPIO_PORTE (4 << GPIO_PORT_SHIFT) /* GPIOE */
|
||||
#define GPIO_PORTF (5 << GPIO_PORT_SHIFT) /* GPIOF */
|
||||
#define GPIO_PORTG (6 << GPIO_PORT_SHIFT) /* GPIOG */
|
||||
|
||||
/* This identifies the bit in the port:
|
||||
* nnnn nnnn nnnn nnnn nnnn nnnn nnnn BBBB
|
||||
*/
|
||||
|
||||
#define GPIO_NUMBER_SHIFT 0 /* Bits 0-3: GPIO number: 0-15 */
|
||||
#define GPIO_NUMBER_MASK (15 << GPIO_NUMBER_SHIFT)
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Inline Functions
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C" {
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_lowsetup
|
||||
*
|
||||
* Description:
|
||||
* Called at the very beginning of _start. Performs low level initialization.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
EXTERN void up_lowsetup(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_clockconfig
|
||||
*
|
||||
* Description:
|
||||
* Called to change to new clock based on desired rcc and rcc2 settings.
|
||||
* This is use to set up the initial clocking but can be used later to
|
||||
* support slow clocked, low power consumption modes.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
EXTERN void stm32_clockconfig(uint32 newrcc, uint32 newrcc2);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_clockconfig
|
||||
*
|
||||
* Description:
|
||||
* Called early in the bootsequence (before .data and .bss are available)
|
||||
* in order to configure initial clocking.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
EXTERN void up_clockconfig(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_configgpio
|
||||
*
|
||||
* Description:
|
||||
* Configure a GPIO pin based on bit-encoded description of the pin.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
EXTERN int stm32_configgpio(uint32 cfgset);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_gpiowrite
|
||||
*
|
||||
* Description:
|
||||
* Write one or zero to the selected GPIO pin
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
EXTERN void stm32_gpiowrite(uint32 pinset, boolean value);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_gpioread
|
||||
*
|
||||
* Description:
|
||||
* Read one or zero from the selected GPIO pin
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
EXTERN boolean stm32_gpioread(uint32 pinset, boolean value);
|
||||
|
||||
/****************************************************************************
|
||||
* Function: stm32_dumpgpio
|
||||
*
|
||||
* Description:
|
||||
* Dump all GPIO registers associated with the provided base address
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
EXTERN int stm32_dumpgpio(uint32 pinset, const char *msg);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: gpio_irqinitialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize all vectors to the unexpected interrupt handler
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
EXTERN int weak_function gpio_irqinitialize(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Function: stm32_ethinitialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize the Ethernet driver for one interface. If the STM32 chip
|
||||
* supports multiple Ethernet controllers, then bould specific logic
|
||||
* must implement up_netinitialize() and call this function to initialize
|
||||
* the desiresed interfaces.
|
||||
*
|
||||
* Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success; Negated errno on failure.
|
||||
*
|
||||
* Assumptions:
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#if STM32_NTHERNET > 1
|
||||
EXTERN int stm32_ethinitialize(int intf);
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* The external functions, stm32_spi1/2select and stm32_spi1/2status must be
|
||||
* provided by board-specific logic. They are implementations of the select
|
||||
* and status methods of the SPI interface defined by struct spi_ops_s (see
|
||||
* include/nuttx/spi.h). All other methods (including up_spiinitialize())
|
||||
* are provided by common STM32 logic. To use this common SPI logic on your
|
||||
* board:
|
||||
*
|
||||
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
|
||||
* pins.
|
||||
* 2. Provide stm32_spi1/2select() and stm32_spi1/2status() functions in your
|
||||
* board-specific logic. These functions will perform chip selection and
|
||||
* status operations using GPIOs in the way your board is configured.
|
||||
* 3. Add a calls to up_spiinitialize() in your low level application
|
||||
* initialization logic
|
||||
* 4. The handle returned by up_spiinitialize() may then be used to bind the
|
||||
* SPI driver to higher level logic (e.g., calling
|
||||
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
|
||||
* the SPI MMC/SD driver).
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
struct spi_dev_s;
|
||||
enum spi_dev_e;
|
||||
EXTERN void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, boolean selected);
|
||||
EXTERN ubyte stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
|
||||
EXTERN void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, boolean selected);
|
||||
EXTERN ubyte stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_ARM_SRC_STM32_STM32_INTERNAL_H */
|
||||
153
arch/arm/src/stm32/stm32_start.c
Normal file
153
arch/arm/src/stm32/stm32_start.c
Normal file
@ -0,0 +1,153 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/stm32/stm32_start.c
|
||||
* arch/arm/src/chip/stm32_start.c
|
||||
*
|
||||
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <sys/types.h>
|
||||
|
||||
#include <assert.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/init.h>
|
||||
|
||||
#include "up_arch.h"
|
||||
#include "up_internal.h"
|
||||
#include "stm32_internal.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Private Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************/
|
||||
|
||||
extern void stm32_vectors(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: showprogress
|
||||
*
|
||||
* Description:
|
||||
* Print a character on the UART to show boot status.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_DEBUG
|
||||
# define showprogress(c) up_lowputc(c)
|
||||
#else
|
||||
# define showprogress(c)
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: _start
|
||||
*
|
||||
* Description:
|
||||
* This is the reset entry point.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void __start(void)
|
||||
{
|
||||
const uint32 *src;
|
||||
uint32 *dest;
|
||||
|
||||
/* Configure the uart so that we can get debug output as soon as possible */
|
||||
|
||||
up_clockconfig();
|
||||
up_lowsetup();
|
||||
showprogress('A');
|
||||
|
||||
/* Clear .bss. We'll do this inline (vs. calling memset) just to be
|
||||
* certain that there are no issues with the state of global variables.
|
||||
*/
|
||||
|
||||
for (dest = &_sbss; dest < &_ebss; )
|
||||
{
|
||||
*dest++ = 0;
|
||||
}
|
||||
showprogress('B');
|
||||
|
||||
/* Move the intialized data section from his temporary holding spot in
|
||||
* FLASH into the correct place in SRAM. The correct place in SRAM is
|
||||
* give by _sdata and _edata. The temporary location is in FLASH at the
|
||||
* end of all of the other read-only data (.text, .rodata) at _eronly.
|
||||
*/
|
||||
|
||||
for (src = &_eronly, dest = &_sdata; dest < &_edata; )
|
||||
{
|
||||
*dest++ = *src++;
|
||||
}
|
||||
showprogress('C');
|
||||
|
||||
/* Perform early serial initialization */
|
||||
|
||||
#ifdef CONFIG_USE_EARLYSERIALINIT
|
||||
up_earlyserialinit();
|
||||
#endif
|
||||
showprogress('D');
|
||||
|
||||
/* Initialize onboard resources */
|
||||
|
||||
#ifdef CONFIG_ARCH_LEDS
|
||||
stm32_boardinitialize();
|
||||
#endif
|
||||
showprogress('E');
|
||||
|
||||
/* Then start NuttX */
|
||||
|
||||
showprogress('\r');
|
||||
showprogress('\n');
|
||||
os_start();
|
||||
|
||||
/* Shoulnd't get here */
|
||||
|
||||
for(;;);
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user