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arm/armv8-r: invalidate d-cache on boot

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Pass CP15_CACHE_INVALIDATE argument with r1 register to cp15_dcache_op_level.
cache level is 0(L1 D-Cache) with r0 register.
prototype:
void cp15_dcache_op_level(uint32_t level, int op)

Signed-off-by: Jinliang Li <lijinliang1@lixiang.com>
This commit is contained in:
Jinliang Li 2024-08-06 15:25:35 +08:00 committed by Xiang Xiao
parent 0e825b230d
commit a5bfbca869
1 changed files with 1 additions and 1 deletions
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2
arch/arm/src/armv8-r/arm_head.S
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@ -199,7 +199,7 @@ __cpu0_start:
mov r0, #0
mcr CP15_BPIALL(r0) /* Invalidate entire branch prediction array */
mcr CP15_ICIALLU(r0) /* Invalidate I-cache */
mov r0, CP15_CACHE_INVALIDATE
mov r1, CP15_CACHE_INVALIDATE
bl cp15_dcache_op_level
isb