From a5bfbca869366754de22895eb3459777f9afcc58 Mon Sep 17 00:00:00 2001 From: Jinliang Li Date: Tue, 6 Aug 2024 15:25:35 +0800 Subject: [PATCH] arm/armv8-r: invalidate d-cache on boot Pass CP15_CACHE_INVALIDATE argument with r1 register to cp15_dcache_op_level. cache level is 0(L1 D-Cache) with r0 register. prototype: void cp15_dcache_op_level(uint32_t level, int op) Signed-off-by: Jinliang Li --- arch/arm/src/armv8-r/arm_head.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/src/armv8-r/arm_head.S b/arch/arm/src/armv8-r/arm_head.S index 1ff6b05aee..16819dc32c 100644 --- a/arch/arm/src/armv8-r/arm_head.S +++ b/arch/arm/src/armv8-r/arm_head.S @@ -199,7 +199,7 @@ __cpu0_start: mov r0, #0 mcr CP15_BPIALL(r0) /* Invalidate entire branch prediction array */ mcr CP15_ICIALLU(r0) /* Invalidate I-cache */ - mov r0, CP15_CACHE_INVALIDATE + mov r1, CP15_CACHE_INVALIDATE bl cp15_dcache_op_level isb