Add structure for LM3S6918
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1755 42af7a65-404d-4744-a932-0658087f49c3
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*/
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#ifdef CONFIG_CHIP_LM3S6918
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/* Vector 0-15: Processor exceptions */
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# define LM3S_IRQ_GPIOA (0) /* Vector 16: GPIO Port A */
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# define LM3S_IRQ_GPIOB (1) /* Vector 17: GPIO Port B */
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64
arch/arm/src/lm3s/chip.h
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64
arch/arm/src/lm3s/chip.h
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/************************************************************************************
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* arch/arm/src/lm3s/chip.h
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_LM3S_CHIP_H
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#define __ARCH_ARM_SRC_LM3S_CHIP_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include "lm3s_memorymap.h" /* Memory map */
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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#endif /* __ARCH_ARM_SRC_LM3S_CHIP_H */
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135
arch/arm/src/lm3s/lm3s_memorymap.h
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135
arch/arm/src/lm3s/lm3s_memorymap.h
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/************************************************************************************
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* arch/arm/src/lm3s/lm3s_memorymap.h
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_LM3S_LM3S_MEMORYMAP_H
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#define __ARCH_ARM_SRC_LM3S_LM3S_MEMORYMAP_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* Memory map ***********************************************************************/
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#ifdef CONFIG_CHIP_LM3S6918
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# define LM3S_FLASH_BASE 0x00000000 /* -0x0003ffff: On-chip FLASH */
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/* -0x1fffffff: Reserved */
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# define LM3S_SRAM_BASE 0x20000000 /* -0x2000ffff: Bit-banded on-chip SRAM */
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/* -0x21ffffff: Reserved */
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# define LM3S_ASRAM_BASE 0x22000000 /* -0x221fffff: Bit-band alias of 20000000- */
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/* -0x3fffffff: Reserved */
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# define LM3S_FPERIPH_BASE 0x40000000 /* -0x4001ffff: FiRM Peripherals */
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# define LM3S_PERIPH_BASE 0x40020000 /* -0x41ffffff: Peripherals */
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# define LM3S_APERIPH_BASE 0x42000000 /* -0x43ffffff: Bit-band alise of 40000000- */
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/* -0xdfffffff: Reserved */
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# define LM3S_ITM_BASE 0xe0000000 /* -0xe0000fff: Instrumentation Trace Macrocell */
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# define LM3S_DWT_BASE 0xe0001000 /* -0xe0001fff: Data Watchpoint and Trace */
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# define LM3S_FPB_BASE 0xe0002000 /* -0xe0002fff: Flash Patch and Breakpoint */
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/* -0xe000dfff: Reserved */
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# define LM3S_NVIC_BASE 0xe000e000 /* -0xe000efff: Nested Vectored Interrupt Controller */
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/* -0xe003ffff: Reserved */
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# define LM3S_TPIU_BASE 0xe0040000 /* -0xe0040fff: Trace Port Interface Unit */
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/* -0xffffffff: Reserved */
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#else
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# error "Memory map not specified for this LM3S chip"
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#endif
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/* Peripheral base addresses ********************************************************/
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#ifdef CONFIG_CHIP_LM3S6918
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/* FiRM Peripheral Base Addresses */
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# define LM3S_WDOG_BASE (LM3S_FPERIPH_BASE + 0x00000) /* -0x00fff: Watchdog Timer */
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/* -0x03fff: Reserved */
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# define LM3S_GPIOA_BASE (LM3S_FPERIPH_BASE + 0x04000) /* -0x04fff: GPIO Port A */
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# define LM3S_GPIOB_BASE (LM3S_FPERIPH_BASE + 0x05000) /* -0x05fff: GPIO Port B */
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# define LM3S_GPIOC_BASE (LM3S_FPERIPH_BASE + 0x06000) /* -0x06fff: GPIO Port C */
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# define LM3S_GPIOD_BASE (LM3S_FPERIPH_BASE + 0x07000) /* -0x07fff: GPIO Port D */
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# define LM3S_SSI0_BASE (LM3S_FPERIPH_BASE + 0x08000) /* -0x08fff: SSI0 */
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# define LM3S_SSI1_BASE (LM3S_FPERIPH_BASE + 0x09000) /* -0x09fff: SSI1 */
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/* -0x0bfff: Reserved */
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# define LM3S_UART0_BASE (LM3S_FPERIPH_BASE + 0x0c000) /* -0x0cfff: UART0 */
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# define LM3S_UART1_BASE (LM3S_FPERIPH_BASE + 0x0d000) /* -0x0dfff: UART1 */
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/* -0x1ffff: Reserved */
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/* Peripheral Base Addresses */
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# define LM3S_I2CM0_BASE (LM3S_PERIPH_BASE + 0x00000) /* -0x007ff: I2C Master 0 */
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# define LM3S_I2CS0_BASE (LM3S_PERIPH_BASE + 0x00800) /* -0x00fff: I2C Slave 0 */
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# define LM3S_I2CM1_BASE (LM3S_PERIPH_BASE + 0x01000) /* -0x017ff: I2C Master 1 */
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# define LM3S_I2CS1_BASE (LM3S_PERIPH_BASE + 0x01800) /* -0x01fff: I2C Slave 1 */
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/* -0x03fff: Reserved */
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# define LM3S_GPIOE_BASE (LM3S_PERIPH_BASE + 0x04000) /* -0x04fff: GPIO Port E */
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# define LM3S_GPIOF_BASE (LM3S_PERIPH_BASE + 0x05000) /* -0x05fff: GPIO Port F */
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# define LM3S_GPIOG_BASE (LM3S_PERIPH_BASE + 0x06000) /* -0x06fff: GPIO Port G */
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# define LM3S_GPIOH_BASE (LM3S_PERIPH_BASE + 0x07000) /* -0x07fff: GPIO Port H */
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/* -0x0ffff: Reserved */
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# define LM3S_TIMER0_BASE (LM3S_PERIPH_BASE + 0x10000) /* -0x10fff: Timer 0 */
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# define LM3S_TIMER1_BASE (LM3S_PERIPH_BASE + 0x11000) /* -0x11fff: Timer 1 */
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# define LM3S_TIMER2_BASE (LM3S_PERIPH_BASE + 0x12000) /* -0x12fff: Timer 2 */
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# define LM3S_TIMER3_BASE (LM3S_PERIPH_BASE + 0x13000) /* -0x13fff: Timer 3 */
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/* -0x17fff: Reserved */
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# define LM3S_ADC_BASE (LM3S_PERIPH_BASE + 0x18000) /* -0x18fff: ADC */
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/* -0x1bfff: Reserved */
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# define LM3S_COMPARE_BASE (LM3S_PERIPH_BASE + 0x1c000) /* -0x1cfff: Analog Comparators */
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/* -0x27fff: Reserved */
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# define LM3S_ETHCON_BASE (LM3S_PERIPH_BASE + 0x28000) /* -0x28fff: Ethernet Controller */
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/* -0xdcfff: Reserved */
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# define LM3S_HIBERNATE_BASE (LM3S_PERIPH_BASE + 0xdc000) /* -0xdcfff: Ethernet Controller */
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# define LM3S_FLASHCON_BASE (LM3S_PERIPH_BASE + 0xdd000) /* -0xddfff: FLASH Control */
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# define LM3S_SYSCON_BASE (LM3S_PERIPH_BASE + 0xde000) /* -0xdefff: System Control */
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/* -0x1fdffff: Reserved */
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#else
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# error "Peripheral base addresses not specified for this LM3S chip"
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#endif
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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#endif /* __ARCH_ARM_SRC_LM3S_LM3S_MEMORYMAP_H */
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