LPC17xx CAN PCLK divisor is not a configuration parameter

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4268 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2012-01-06 14:07:47 +00:00
parent bf9e237d41
commit a5e985ff9b
6 changed files with 112 additions and 2 deletions

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@ -2348,3 +2348,5 @@
LEDs
* arch/arm/src/lpc17xx/lpc17_can.c: Add logic to change the CAN bit rate based
on the NuttX configuration.
* arch/arm/src/lpc17xx/lpc17_can.c: PCLK divisor is now a configuration
option.

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@ -72,6 +72,66 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#ifdef CONFIG_LPC17_CAN1
/* A CAN bit rate must be provided */
# ifndef CONFIG_CAN1_BAUD
# error "CONFIG_CAN1_BAUD is not defined"
# endif
/* If no divsor is provided, use a divisor of 4 */
# ifndef CONFIG_CAN1_DIVISOR
# define CONFIG_CAN1_DIVISOR 4
# endif
/* Get the SYSCON_PCLKSEL value for CAN1 the implements this divisor */
# if CONFIG_CAN1_DIVISOR == 1
# define CAN1_CCLK_DIVISOR SYSCON_PCLKSEL_CCLK
# elif CONFIG_CAN1_DIVISOR == 2
# define CAN1_CCLK_DIVISOR SYSCON_PCLKSEL_CCLK2
# elif CONFIG_CAN1_DIVISOR == 4
# define CAN1_CCLK_DIVISOR SYSCON_PCLKSEL_CCLK4
# elif CONFIG_CAN1_DIVISOR == 6
# define CAN1_CCLK_DIVISOR SYSCON_PCLKSEL_CCLK6
# else
# error "Unsupported value of CONFIG_CAN1_DIVISOR"
# endif
#endif
#ifdef CONFIG_LPC17_CAN2
/* A CAN bit rate must be provided */
# ifndef CONFIG_CAN2_BAUD
# error "CONFIG_CAN2_BAUD is not defined"
# endif
/* If no divsor is provided, use a divisor of 4 */
# ifndef CONFIG_CAN2_DIVISOR
# define CONFIG_CAN2_DIVISOR 4
# endif
/* Get the SYSCON_PCLKSEL value for CAN2 the implements this divisor */
# if CONFIG_CAN2_DIVISOR == 1
# define CAN2_CCLK_DIVISOR SYSCON_PCLKSEL_CCLK
# elif CONFIG_CAN2_DIVISOR == 2
# define CAN2_CCLK_DIVISOR SYSCON_PCLKSEL_CCLK2
# elif CONFIG_CAN2_DIVISOR == 4
# define CAN2_CCLK_DIVISOR SYSCON_PCLKSEL_CCLK4
# elif CONFIG_CAN2_DIVISOR == 6
# define CAN2_CCLK_DIVISOR SYSCON_PCLKSEL_CCLK6
# else
# error "Unsupported value of CONFIG_CAN2_DIVISOR"
# endif
#endif
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing CAN */
@ -1078,7 +1138,7 @@ FAR struct can_dev_s *lpc17_caninitialize(int port)
regval = can_getcommon(LPC17_SYSCON_PCLKSEL0);
regval &= ~SYSCON_PCLKSEL0_CAN1_MASK;
regval |= (SYSCON_PCLKSEL_CCLK4 << SYSCON_PCLKSEL0_CAN1_SHIFT);
regval |= (CAN1_CCLK_DIVISOR << SYSCON_PCLKSEL0_CAN1_SHIFT);
can_putcommon(LPC17_SYSCON_PCLKSEL0, regval);
/* Configure CAN GPIO pins */
@ -1105,7 +1165,7 @@ FAR struct can_dev_s *lpc17_caninitialize(int port)
regval = can_getcommon(LPC17_SYSCON_PCLKSEL0);
regval &= ~SYSCON_PCLKSEL0_CAN2_MASK;
regval |= (SYSCON_PCLKSEL_CCLK4 << SYSCON_PCLKSEL0_CAN2_SHIFT);
regval |= (CAN2_CCLK_DIVISOR << SYSCON_PCLKSEL0_CAN2_SHIFT);
can_putcommon(LPC17_SYSCON_PCLKSEL0, regval);
/* Configure CAN GPIO pins */

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@ -644,6 +644,18 @@ LPCXpresso Configuration Options
CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_UARTn_2STOP - Two stop bits
LPC17xx specific CAN device driver settings. These settings all
require CONFIG_CAN:
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined.
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined.
CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
LPC17xx specific PHY/Ethernet device driver settings. These setting
also require CONFIG_NET and CONFIG_LPC17_ETHERNET.

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@ -284,6 +284,18 @@ mbed Configuration Options
CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_UARTn_2STOP - Two stop bits
LPC17xx specific CAN device driver settings. These settings all
require CONFIG_CAN:
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined.
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined.
CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
LPC17xx specific PHY/Ethernet device driver settings. These setting
also require CONFIG_NET and CONFIG_LPC17_ETHERNET.

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@ -396,6 +396,18 @@ Nucleus 2G Configuration Options
CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_UARTn_2STOP - Two stop bits
LPC17xx specific CAN device driver settings. These settings all
require CONFIG_CAN:
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined.
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined.
CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
LPC17xx specific PHY/Ethernet device driver settings. These setting
also require CONFIG_NET and CONFIG_LPC17_ETHERNET.

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@ -693,6 +693,18 @@ Olimex LPC1766-STK Configuration Options
CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_UARTn_2STOP - Two stop bits
LPC17xx specific CAN device driver settings. These settings all
require CONFIG_CAN:
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined.
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined.
CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Default: 4
CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Default: 4
LPC17xx specific PHY/Ethernet device driver settings. These setting
also require CONFIG_NET and CONFIG_LPC17_ETHERNET.