Add beginning of an Kinetics Ethernet driver
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3886 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
parent
7c0bd1ad17
commit
a60daf4fe7
@ -49,7 +49,7 @@ CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c \
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up_doirq.c up_hardfault.c up_svcall.c up_checkstack.c
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ifeq ($(CONFIG_NET),y)
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ifneq ($(CONFIG_KINETIS_ETHERNET),y)
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ifneq ($(CONFIG_KINETIS_ENET),y)
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CMN_CSRCS += up_etherstub.c
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endif
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endif
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@ -88,7 +88,7 @@ CHIP_CSRCS += kinetis_dma.c
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endif
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ifeq ($(CONFIG_NET),y)
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ifeq ($(CONFIG_KINETIS_ETHERNET),y)
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ifeq ($(CONFIG_KINETIS_ENET),y)
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CHIP_CSRCS += kinetis_enet.c
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endif
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endif
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@ -836,6 +836,7 @@
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#define NVIC_SYSH_PRIORITY_MIN 0xf0 /* All bits[7:4] set is minimum priority */
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#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
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#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
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#define NVIC_SYSH_PRIORITY_STEP 0x10 /* Steps between supported priority values */
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/************************************************************************************
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* Public Types
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@ -1,203 +1,224 @@
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/************************************************************************************
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* arch/arm/src/kinetis/kinetis_config.h
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_KINETISXX_KINETIS_CONFIG_H
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#define __ARCH_ARM_SRC_KINETISXX_KINETIS_CONFIG_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <arch/board/board.h>
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#include "chip.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Configuration *********************************************************************/
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/* Make that no unsupport UARTs are enabled */
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#ifndef KINETIS_NISO7816
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# define KINETIS_NISO7816 0
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#endif
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#if (KINETIS_NISO7816 + KINETIS_NUART) < 6
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# undef CONFIG_KINETIS_UART5
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# if (KINETIS_NISO7816 + KINETIS_NUART) < 5
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# undef CONFIG_KINETIS_UART4
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# if (KINETIS_NISO7816 + KINETIS_NUART) < 4
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# undef CONFIG_KINETIS_UART3
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# if (KINETIS_NISO7816 + KINETIS_NUART) < 3
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# undef CONFIG_KINETIS_UART2
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# if (KINETIS_NISO7816 + KINETIS_NUART) < 2
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# undef CONFIG_KINETIS_UART1
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# if (KINETIS_NISO7816 + KINETIS_NUART) < 1
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# undef CONFIG_KINETIS_UART0
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# endif
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# endif
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# endif
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# endif
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# endif
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#endif
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/* Are any UARTs enabled? */
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#undef HAVE_UART_DEVICE
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#if defined(CONFIG_KINETIS_UART0) || defined(CONFIG_KINETIS_UART1) || \
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defined(CONFIG_KINETIS_UART2) || defined(CONFIG_KINETIS_UART3) || \
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defined(CONFIG_KINETIS_UART5)
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# define HAVE_UART_DEVICE 1
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#endif
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/* Is there a serial console? There should be at most one defined. It could be on
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* any UARTn, n=0,1,2,3,4,5
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*/
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#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART0)
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_UART5_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART1)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_UART5_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART2)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_UART5_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_UART3_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART3)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_UART5_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_UART4_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART4)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_UART5_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_UART5_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART5)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#else
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_UART5_SERIAL_CONSOLE
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# undef HAVE_SERIAL_CONSOLE
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#endif
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/* Check UART flow control (Not yet supported) */
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# undef CONFIG_UART0_FLOWCONTROL
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# undef CONFIG_UART1_FLOWCONTROL
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# undef CONFIG_UART2_FLOWCONTROL
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# undef CONFIG_UART3_FLOWCONTROL
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# undef CONFIG_UART4_FLOWCONTROL
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# undef CONFIG_UART5_FLOWCONTROL
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/* UART FIFO support is not fully implemented.
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*
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* NOTE: UART0 has an 8-byte deep FIFO; the other UARTs have no FIFOs
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* (1-deep). There appears to be no way to know when the FIFO is not
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* full (other than reading the FIFO length and comparing the FIFO count).
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* Hence, the FIFOs are not used in this implementation and, as a result
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* TDRE indeed mean that the single output buffer is available.
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*
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* Performance on UART0 could be improved by enabling the FIFO and by
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* redesigning all of the FIFO status logic.
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*/
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#undef CONFIG_KINETIS_UARTFIFOS
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/* Default Priorities */
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#ifndef CONFIG_KINETIS_UART0PRIO
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# define CONFIG_KINETIS_UART0PRIO NVIC_SYSH_PRIORITY_DEFAULT
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#endif
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#ifndef CONFIG_KINETIS_UART1PRIO
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# define CONFIG_KINETIS_UART1PRIO NVIC_SYSH_PRIORITY_DEFAULT
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#endif
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#ifndef CONFIG_KINETIS_UART2PRIO
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# define CONFIG_KINETIS_UART2PRIO NVIC_SYSH_PRIORITY_DEFAULT
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#endif
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#ifndef CONFIG_KINETIS_UART3PRIO
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# define CONFIG_KINETIS_UART3PRIO NVIC_SYSH_PRIORITY_DEFAULT
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#endif
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#ifndef CONFIG_KINETIS_UART4PRIO
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# define CONFIG_KINETIS_UART4PRIO NVIC_SYSH_PRIORITY_DEFAULT
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#endif
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#ifndef CONFIG_KINETIS_UART5PRIO
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# define CONFIG_KINETIS_UART5PRIO NVIC_SYSH_PRIORITY_DEFAULT
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#endif
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/************************************************************************************
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* Inline Functions
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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#endif /* __ARCH_ARM_SRC_KINETISXX_KINETIS_CONFIG_H */
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/************************************************************************************
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* arch/arm/src/kinetis/kinetis_config.h
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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||||
* notice, this list of conditions and the following disclaimer.
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||||
* 2. Redistributions in binary form must reproduce the above copyright
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||||
* notice, this list of conditions and the following disclaimer in
|
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
|
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_KINETISXX_KINETIS_CONFIG_H
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#define __ARCH_ARM_SRC_KINETISXX_KINETIS_CONFIG_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <arch/board/board.h>
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#include "chip.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Configuration *********************************************************************/
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/* Make that no unsupport UARTs are enabled */
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#ifndef KINETIS_NISO7816
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# define KINETIS_NISO7816 0
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#endif
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#if (KINETIS_NISO7816 + KINETIS_NUART) < 6
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# undef CONFIG_KINETIS_UART5
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# if (KINETIS_NISO7816 + KINETIS_NUART) < 5
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# undef CONFIG_KINETIS_UART4
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# if (KINETIS_NISO7816 + KINETIS_NUART) < 4
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# undef CONFIG_KINETIS_UART3
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# if (KINETIS_NISO7816 + KINETIS_NUART) < 3
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# undef CONFIG_KINETIS_UART2
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# if (KINETIS_NISO7816 + KINETIS_NUART) < 2
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# undef CONFIG_KINETIS_UART1
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# if (KINETIS_NISO7816 + KINETIS_NUART) < 1
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# undef CONFIG_KINETIS_UART0
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# endif
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# endif
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# endif
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# endif
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# endif
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#endif
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/* Are any UARTs enabled? */
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#undef HAVE_UART_DEVICE
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#if defined(CONFIG_KINETIS_UART0) || defined(CONFIG_KINETIS_UART1) || \
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defined(CONFIG_KINETIS_UART2) || defined(CONFIG_KINETIS_UART3) || \
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defined(CONFIG_KINETIS_UART5)
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# define HAVE_UART_DEVICE 1
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#endif
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/* Is there a serial console? There should be at most one defined. It could be on
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* any UARTn, n=0,1,2,3,4,5
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*/
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#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART0)
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_UART5_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART1)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_UART5_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART2)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_UART5_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_UART3_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART3)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_UART5_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_UART4_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART4)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_UART5_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_UART5_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART5)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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||||
# undef CONFIG_UART3_SERIAL_CONSOLE
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||||
# undef CONFIG_UART4_SERIAL_CONSOLE
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||||
# define HAVE_SERIAL_CONSOLE 1
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||||
#else
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||||
# undef CONFIG_UART0_SERIAL_CONSOLE
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||||
# undef CONFIG_UART1_SERIAL_CONSOLE
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||||
# undef CONFIG_UART2_SERIAL_CONSOLE
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||||
# undef CONFIG_UART3_SERIAL_CONSOLE
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||||
# undef CONFIG_UART4_SERIAL_CONSOLE
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||||
# undef CONFIG_UART5_SERIAL_CONSOLE
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||||
# undef HAVE_SERIAL_CONSOLE
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||||
#endif
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||||
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||||
/* Check UART flow control (Not yet supported) */
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||||
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||||
# undef CONFIG_UART0_FLOWCONTROL
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||||
# undef CONFIG_UART1_FLOWCONTROL
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||||
# undef CONFIG_UART2_FLOWCONTROL
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||||
# undef CONFIG_UART3_FLOWCONTROL
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||||
# undef CONFIG_UART4_FLOWCONTROL
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||||
# undef CONFIG_UART5_FLOWCONTROL
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||||
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||||
/* UART FIFO support is not fully implemented.
|
||||
*
|
||||
* NOTE: UART0 has an 8-byte deep FIFO; the other UARTs have no FIFOs
|
||||
* (1-deep). There appears to be no way to know when the FIFO is not
|
||||
* full (other than reading the FIFO length and comparing the FIFO count).
|
||||
* Hence, the FIFOs are not used in this implementation and, as a result
|
||||
* TDRE indeed mean that the single output buffer is available.
|
||||
*
|
||||
* Performance on UART0 could be improved by enabling the FIFO and by
|
||||
* redesigning all of the FIFO status logic.
|
||||
*/
|
||||
|
||||
#undef CONFIG_KINETIS_UARTFIFOS
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/* UART Default Interrupt Priorities */
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||||
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#ifndef CONFIG_KINETIS_UART0PRIO
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# define CONFIG_KINETIS_UART0PRIO NVIC_SYSH_PRIORITY_DEFAULT
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#endif
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#ifndef CONFIG_KINETIS_UART1PRIO
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# define CONFIG_KINETIS_UART1PRIO NVIC_SYSH_PRIORITY_DEFAULT
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#endif
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#ifndef CONFIG_KINETIS_UART2PRIO
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# define CONFIG_KINETIS_UART2PRIO NVIC_SYSH_PRIORITY_DEFAULT
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#endif
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#ifndef CONFIG_KINETIS_UART3PRIO
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# define CONFIG_KINETIS_UART3PRIO NVIC_SYSH_PRIORITY_DEFAULT
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#endif
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#ifndef CONFIG_KINETIS_UART4PRIO
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# define CONFIG_KINETIS_UART4PRIO NVIC_SYSH_PRIORITY_DEFAULT
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#endif
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#ifndef CONFIG_KINETIS_UART5PRIO
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# define CONFIG_KINETIS_UART5PRIO NVIC_SYSH_PRIORITY_DEFAULT
|
||||
#endif
|
||||
|
||||
/* Ethernet controller configuration */
|
||||
|
||||
#ifndef CONFIG_ENET_NBUFFERS
|
||||
# define CONFIG_ENET_NBUFFERS 8
|
||||
#endif
|
||||
|
||||
/* EMAC Default Interrupt Priorities */
|
||||
|
||||
#ifndef CONFIG_KINETIS_EMACTMR_PRIO
|
||||
# define CONFIG_KINETIS_EMACTMR_PRIO NVIC_SYSH_PRIORITY_DEFAULT
|
||||
#endif
|
||||
#ifndef CONFIG_KINETIS_EMACTX_PRIO
|
||||
# define CONFIG_KINETIS_EMACTX_PRIO NVIC_SYSH_PRIORITY_DEFAULT
|
||||
#endif
|
||||
#ifndef CONFIG_KINETIS_EMACRX_PRIO
|
||||
# define CONFIG_KINETIS_EMACRX_PRIO NVIC_SYSH_PRIORITY_DEFAULT
|
||||
#endif
|
||||
#ifndef CONFIG_KINETIS_EMACMISC_PRIO
|
||||
# define CONFIG_KINETIS_EMACMISC_PRIO NVIC_SYSH_PRIORITY_DEFAULT
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Inline Functions
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETISXX_KINETIS_CONFIG_H */
|
||||
|
1302
arch/arm/src/kinetis/kinetis_enet.c
Normal file
1302
arch/arm/src/kinetis/kinetis_enet.c
Normal file
File diff suppressed because it is too large
Load Diff
@ -433,9 +433,171 @@
|
||||
/* Bits 8-31: Reserved */
|
||||
/* Timer Compare Capture Register (32-bit compare value) */
|
||||
|
||||
/* Buffer Descriptors ***********************************************************************/
|
||||
/* Endian-independent descriptor offsets */
|
||||
|
||||
#define DESC_STATUS1_OFFSET (0)
|
||||
#define DESC_LENGTH_OFFSET (2)
|
||||
#define DESC_DATAPTR_OFFSET (4)
|
||||
#define DESC_LEGACY_LEN (8)
|
||||
|
||||
#define DESC_STATUS2_OFFSET (8)
|
||||
#define DESC_LENPROTO_OFFSET (12)
|
||||
#define DESC_CHECKSUM_OFFSET (14)
|
||||
#define DESC_BDU_OFFSET (16)
|
||||
#define DESC_TIMESTAMP_OFFSET (20)
|
||||
#define DESC_ENHANCED_LEN (32)
|
||||
|
||||
/* Legacy/Common TX Buffer Descriptor Bit Definitions.
|
||||
*
|
||||
* The descriptors are represented by structures Unfortunately, when the
|
||||
* structures are overlayed on the data, the bytes are reversed because
|
||||
* the underlying hardware writes the data in big-endian byte order.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_ENDIAN_BIG
|
||||
# define TXDESC_ABC (1 << 9) /* Legacy */
|
||||
# define TXDESC_TC (1 << 10) /* Common */
|
||||
# define TXDESC_L (1 << 11) /* Common */
|
||||
# define TXDESC_TO2 (1 << 12) /* Common */
|
||||
# define TXDESC_W (1 << 13) /* Common */
|
||||
# define TXDESC_TO1 (1 << 14) /* Common */
|
||||
# define TXDESC_R (1 << 15) /* Common */
|
||||
#endif
|
||||
# define TXDESC_ABC (1 << 1) /* Legacy */
|
||||
# define TXDESC_TC (1 << 2) /* Common */
|
||||
# define TXDESC_L (1 << 3) /* Common */
|
||||
# define TXDESC_TO2 (1 << 4) /* Common */
|
||||
# define TXDESC_W (1 << 5) /* Common */
|
||||
# define TXDESC_TO1 (1 << 6) /* Common */
|
||||
# define TXDESC_R (1 << 7) /* Common */
|
||||
#endif
|
||||
|
||||
/* Enhanced (only) TX Buffer Descriptor Bit Definitions */
|
||||
|
||||
#ifdef CONFIG_ENDIAN_BIG
|
||||
# define TXDESC_TSE (1 << 8)
|
||||
# define TXDESC_OE (1 << 9)
|
||||
# define TXDESC_LCE (1 << 10)
|
||||
# define TXDESC_FE (1 << 11)
|
||||
# define TXDESC_EE (1 << 12)
|
||||
# define TXDESC_UE (1 << 13)
|
||||
# define TXDESC_TXE (1 << 15)
|
||||
|
||||
# define TXDESC_IINS (1 << 27)
|
||||
# define TXDESC_PINS (1 << 28)
|
||||
# define TXDESC_TS (1 << 29)
|
||||
# define TXDESC_INT (1 << 30)
|
||||
|
||||
# define TXDESC_BDU (1 << 31)
|
||||
|
||||
#else
|
||||
# define TXDESC_IINS (1 << 3)
|
||||
# define TXDESC_PINS (1 << 4)
|
||||
# define TXDESC_TS (1 << 5)
|
||||
# define TXDESC_INT (1 << 6)
|
||||
|
||||
# define TXDESC_TSE (1 << 16)
|
||||
# define TXDESC_OE (1 << 17)
|
||||
# define TXDESC_LCE (1 << 18)
|
||||
# define TXDESC_FE (1 << 19)
|
||||
# define TXDESC_EE (1 << 20)
|
||||
# define TXDESC_UE (1 << 21)
|
||||
# define TXDESC_TXE (1 << 23)
|
||||
|
||||
# define TXDESC_BDU (1 << 7)
|
||||
#endif
|
||||
|
||||
/* Legacy (and Common) RX Buffer Descriptor Bit Definitions */
|
||||
|
||||
#ifdef CONFIG_ENDIAN_BIG
|
||||
# define RXDESC_TR (1 << 0)
|
||||
# define RXDESC_OV (1 << 1)
|
||||
# define RXDESC_CR (1 << 2)
|
||||
# define RXDESC_NO (1 << 4)
|
||||
# define RXDESC_LG (1 << 5)
|
||||
# define RXDESC_MC (1 << 6)
|
||||
# define RXDESC_BC (1 << 7)
|
||||
# define RXDESC_M (1 << 8)
|
||||
# define RXDESC_L (1 << 11)
|
||||
# define RXDESC_R02 (1 << 12)
|
||||
# define RXDESC_W (1 << 13)
|
||||
# define RXDESC_R01 (1 << 14)
|
||||
# define RXDESC_E (1 << 15)
|
||||
#else
|
||||
# define RXDESC_M (1 << 0)
|
||||
# define RXDESC_L (1 << 3)
|
||||
# define RXDESC_R02 (1 << 4)
|
||||
# define RXDESC_W (1 << 5)
|
||||
# define RXDESC_R01 (1 << 6)
|
||||
# define RXDESC_E (1 << 7)
|
||||
# define RXDESC_TR (1 << 8)
|
||||
# define RXDESC_OV (1 << 9)
|
||||
# define RXDESC_CR (1 << 10)
|
||||
# define RXDESC_NO (1 << 12)
|
||||
# define RXDESC_LG (1 << 13)
|
||||
# define RXDESC_MC (1 << 14)
|
||||
# define RXDESC_BC (1 << 15)
|
||||
#endif
|
||||
|
||||
/* Enhanced (only) TX Buffer Descriptor Bit Definitions */
|
||||
|
||||
#ifdef CONFIG_ENDIAN_BIG
|
||||
# define RXDESC_FRAG (1 << 0)
|
||||
# define RXDESC_IPV6 (1 << 1)
|
||||
# define RXDESC_VLAN (1 << 2)
|
||||
# define RXDESC_PCR (1 << 4)
|
||||
# define RXDESC_ICE (1 << 5)
|
||||
# define RXDESC_INT (1 << 23)
|
||||
# define RXDESC_UC (1 << 24)
|
||||
# define RXDESC_CE (1 << 25)
|
||||
# define RXDESC_PE (1 << 26)
|
||||
# define RXDESC_ME (1 << 31)
|
||||
|
||||
# define RXDESC_BDU (1 << 31)
|
||||
#else
|
||||
# define RXDESC_UC (1 << 0)
|
||||
# define RXDESC_CE (1 << 1)
|
||||
# define RXDESC_PE (1 << 2)
|
||||
# define RXDESC_ME (1 << 7)
|
||||
# define RXDESC_INT (1 << 15)
|
||||
# define RXDESC_FRAG (1 << 24)
|
||||
# define RXDESC_IPV6 (1 << 25)
|
||||
# define RXDESC_VLAN (1 << 26)
|
||||
# define RXDESC_PCR (1 << 28)
|
||||
# define RXDESC_ICE (1 << 29)
|
||||
|
||||
# define RXDESC_BDU (1 << 7)
|
||||
#endif
|
||||
|
||||
/********************************************************************************************
|
||||
* Public Types
|
||||
********************************************************************************************/
|
||||
/* Buffer Descriptors ***********************************************************************/
|
||||
/* Legacy Buffer Descriptor */
|
||||
|
||||
#ifdef CONFIG_ENET_ENHANCEDBD
|
||||
struct enet_desc_s
|
||||
{
|
||||
uint16_t status1; /* Control and status */
|
||||
uint16_t length; /* Data length */
|
||||
uint8_t *data; /* Buffer address */
|
||||
uint32_t status2; /* Extended status */
|
||||
uint16_t lenproto; /* Header length + Protocol type */
|
||||
uint16_t checksum; /* Payload checksum */
|
||||
uint32_t bdu; /* BDU */
|
||||
uint32_t timestamp; /* Time stamp */
|
||||
uint32_t reserved1; /* unused */
|
||||
uint32_t reserved2; /* unused */
|
||||
}
|
||||
#else
|
||||
struct enet_desc_s
|
||||
{
|
||||
uint16_t status1; /* Control and status */
|
||||
uint16_t length; /* Data length */
|
||||
uint8_t *data; /* Buffer address */
|
||||
};
|
||||
#endif
|
||||
|
||||
/********************************************************************************************
|
||||
* Public Data
|
||||
|
@ -82,8 +82,13 @@
|
||||
#define PIN_FTM0_CH1_1 (PIN_ALT3 | PIN_PORTA | PIN4)
|
||||
#define PIN_NMI (PIN_ALT7 | PIN_PORTA | PIN4)
|
||||
#define PIN_FTM0_CH2_1 (PIN_ALT3 | PIN_PORTA | PIN5)
|
||||
#define PIN_RMII0_RXER (PIN_ALT4 | PIN_PORTA | PIN5)
|
||||
#define PIN_MII0_RXER (PIN_ALT4 | PIN_PORTA | PIN5)
|
||||
#if 0
|
||||
# define PIN_RMII0_RXER (PIN_ALT4 | PIN_PORTA | PIN5)
|
||||
# define PIN_MII0_RXER (PIN_ALT4 | PIN_PORTA | PIN5)
|
||||
#else
|
||||
# define PIN_RMII0_RXER (GPIO_PULLDOWN | PIN_PORTA | PIN5)
|
||||
# define PIN_MII0_RXER (GPIO_PULLDOWN | PIN_PORTA | PIN5)
|
||||
#endif
|
||||
#define PIN_CMP2_OUT_1 (PIN_ALT5 | PIN_PORTA | PIN5)
|
||||
#define PIN_I2S0_RX_BCLK_1 (PIN_ALT6 | PIN_PORTA | PIN5)
|
||||
#define PIN_JTAG_TRST (PIN_ALT7 | PIN_PORTA | PIN5)
|
||||
|
@ -292,7 +292,7 @@
|
||||
/* Bits 12-31: Reserved */
|
||||
/* System Clock Gating Control Register 2 */
|
||||
|
||||
#ifdef KINETIS_K60
|
||||
#if defined(KINETIS_NENET) && KINETIS_NENET > 0
|
||||
# define SIM_SCGC2_ENET (1 << 0) /* Bit 0: ENET Clock Gate Control (K60) */
|
||||
#endif
|
||||
/* Bits 1-11: Reserved */
|
||||
@ -301,6 +301,7 @@
|
||||
/* Bits 14-31: Reserved */
|
||||
/* System Clock Gating Control Register 3 */
|
||||
|
||||
#if defined(KINETIS_NRNG) && KINETIS_NRNG > 0
|
||||
#ifdef KINETIS_K60
|
||||
# define SIM_SCGC3_RNGB (1 << 0) /* Bit 0: RNGB Clock Gate Control (K60) */
|
||||
#endif
|
||||
|
@ -349,7 +349,7 @@ KwikStik-K40-specific Configuration Options
|
||||
CONFIG_KINETIS_UART3 -- Support UART3
|
||||
CONFIG_KINETIS_UART4 -- Support UART4
|
||||
CONFIG_KINETIS_UART5 -- Support UART5
|
||||
CONFIG_KINETIS_ETHERNET -- Support Ethernet (K60 only)
|
||||
CONFIG_KINETIS_ENET -- Support Ethernet (K60 only)
|
||||
CONFIG_KINETIS_RNGB -- Support the random number generator(K60 only)
|
||||
CONFIG_KINETIS_FLEXCAN0 -- Support FlexCAN0
|
||||
CONFIG_KINETIS_FLEXCAN1 -- Support FlexCAN1
|
||||
|
@ -118,7 +118,7 @@ CONFIG_KINETIS_DFU=y
|
||||
# CONFIG_KINETIS_UART3 - Support UART3
|
||||
# CONFIG_KINETIS_UART4 - Support UART4
|
||||
# CONFIG_KINETIS_UART5 - Support UART5
|
||||
# CONFIG_KINETIS_ETHERNET - Support Ethernet (K60 only)
|
||||
# CONFIG_KINETIS_ENET - Support Ethernet (K60 only)
|
||||
# CONFIG_KINETIS_RNGB - Support the random number generator(K60 only)
|
||||
# CONFIG_KINETIS_FLEXCAN0 - Support FlexCAN0
|
||||
# CONFIG_KINETIS_FLEXCAN1 - Support FlexCAN1
|
||||
@ -162,7 +162,7 @@ CONFIG_KINETIS_UART2=n
|
||||
CONFIG_KINETIS_UART3=n
|
||||
CONFIG_KINETIS_UART4=n
|
||||
CONFIG_KINETIS_UART5=y
|
||||
CONFIG_KINETIS_ETHERNET=n
|
||||
CONFIG_KINETIS_ENET=n
|
||||
CONFIG_KINETIS_RNGB=n
|
||||
CONFIG_KINETIS_FLEXCAN0=n
|
||||
CONFIG_KINETIS_FLEXCAN1=n
|
||||
|
@ -483,7 +483,7 @@ TWR-K60N512-specific Configuration Options
|
||||
CONFIG_KINETIS_UART3 -- Support UART3
|
||||
CONFIG_KINETIS_UART4 -- Support UART4
|
||||
CONFIG_KINETIS_UART5 -- Support UART5
|
||||
CONFIG_KINETIS_ETHERNET -- Support Ethernet (K60 only)
|
||||
CONFIG_KINETIS_ENET -- Support Ethernet (K60 only)
|
||||
CONFIG_KINETIS_RNGB -- Support the random number generator(K60 only)
|
||||
CONFIG_KINETIS_FLEXCAN0 -- Support FlexCAN0
|
||||
CONFIG_KINETIS_FLEXCAN1 -- Support FlexCAN1
|
||||
@ -528,6 +528,11 @@ TWR-K60N512-specific Configuration Options
|
||||
CONFIG_KINETIS_UART4PRIO
|
||||
CONFIG_KINETIS_UART5PRIO
|
||||
|
||||
CONFIG_KINETIS_EMACTMR_PRIO
|
||||
CONFIG_KINETIS_EMACTX_PRIO
|
||||
CONFIG_KINETIS_EMACRX_PRIO
|
||||
CONFIG_KINETIS_EMACMISC_PRIO
|
||||
|
||||
PIN Interrupt Support
|
||||
|
||||
CONFIG_GPIO_IRQ -- Enable pin interrtup support. Also needs
|
||||
@ -550,23 +555,12 @@ TWR-K60N512-specific Configuration Options
|
||||
CONFIG_UARTn_BITS - The number of bits. Must be either 8 or 8.
|
||||
CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
|
||||
|
||||
TWR-K60N512 LCD Hardware Configuration
|
||||
|
||||
CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape"
|
||||
support. Default is this 320x240 "landscape" orientation
|
||||
(this setting is informative only... not used).
|
||||
CONFIG_LCD_PORTRAIT - Define for 240x320 display "portrait"
|
||||
orientation support. In this orientation, the TWR-K60N512's
|
||||
LCD ribbon cable is at the bottom of the display. Default is
|
||||
320x240 "landscape" orientation.
|
||||
CONFIG_LCD_RPORTRAIT - Define for 240x320 display "reverse
|
||||
portrait" orientation support. In this orientation, the
|
||||
TWR-K60N512's LCD ribbon cable is at the top of the display.
|
||||
Default is 320x240 "landscape" orientation.
|
||||
CONFIG_LCD_BACKLIGHT - Define to support an adjustable backlight
|
||||
using timer 1. The granularity of the settings is determined
|
||||
by CONFIG_LCD_MAXPOWER. Requires CONFIG_KINETIS_TIM1.
|
||||
Kenetis ethernet controller settings
|
||||
|
||||
CONFIG_ENET_NBUFFERS - Number of TX/RX buffers. The size of one
|
||||
buffer is determined by CONFIG_NET_BUFSIZE. Default: 8
|
||||
CONFIG_ENET_USEMII - Usee MII mode. Default: RMII mode.
|
||||
|
||||
Configurations
|
||||
==============
|
||||
|
||||
|
@ -111,7 +111,7 @@ CONFIG_KINETIS_DFU=y
|
||||
# CONFIG_KINETIS_UART3 - Support UART3
|
||||
# CONFIG_KINETIS_UART4 - Support UART4
|
||||
# CONFIG_KINETIS_UART5 - Support UART5
|
||||
# CONFIG_KINETIS_ETHERNET - Support Ethernet (K60 only)
|
||||
# CONFIG_KINETIS_ENET - Support Ethernet (K60 only)
|
||||
# CONFIG_KINETIS_RNGB - Support the random number generator(K60 only)
|
||||
# CONFIG_KINETIS_FLEXCAN0 - Support FlexCAN0
|
||||
# CONFIG_KINETIS_FLEXCAN1 - Support FlexCAN1
|
||||
@ -155,7 +155,7 @@ CONFIG_KINETIS_UART2=n
|
||||
CONFIG_KINETIS_UART3=n
|
||||
CONFIG_KINETIS_UART4=n
|
||||
CONFIG_KINETIS_UART5=y
|
||||
CONFIG_KINETIS_ETHERNET=n
|
||||
CONFIG_KINETIS_ENET=n
|
||||
CONFIG_KINETIS_RNGB=n
|
||||
CONFIG_KINETIS_FLEXCAN0=n
|
||||
CONFIG_KINETIS_FLEXCAN1=n
|
||||
|
@ -67,7 +67,7 @@
|
||||
# define CONFIG_skeleton_NINTERFACES 1
|
||||
#endif
|
||||
|
||||
/* TX poll deley = 1 seconds. CLK_TCK is the number of clock ticks per second */
|
||||
/* TX poll delay = 1 seconds. CLK_TCK is the number of clock ticks per second */
|
||||
|
||||
#define skeleton_WDDELAY (1*CLK_TCK)
|
||||
#define skeleton_POLLHSEC (1*2)
|
||||
@ -355,7 +355,7 @@ static int skel_interrupt(int irq, FAR void *context)
|
||||
|
||||
skel_receive(skel);
|
||||
|
||||
/* Check is a packet transmission just completed. If so, call skel_txdone.
|
||||
/* Check if a packet transmission just completed. If so, call skel_txdone.
|
||||
* This may disable further Tx interrupts if there are no pending
|
||||
* tansmissions.
|
||||
*/
|
||||
@ -504,7 +504,7 @@ static int skel_ifdown(struct uip_driver_s *dev)
|
||||
wd_cancel(skel->sk_txpoll);
|
||||
wd_cancel(skel->sk_txtimeout);
|
||||
|
||||
/* Put the the EMAC is its reset, non-operational state. This should be
|
||||
/* Put the EMAC in its reset, non-operational state. This should be
|
||||
* a known configuration that will guarantee the skel_ifup() always
|
||||
* successfully brings the interface back up.
|
||||
*/
|
||||
@ -649,13 +649,13 @@ int skel_initialize(int intf)
|
||||
DEBUGASSERT(inf < CONFIG_skeleton_NINTERFACES);
|
||||
priv = &g_skel[intf];
|
||||
|
||||
/* Check if a Ethernet chip is recognized at its I/O base */
|
||||
/* Check if a Ethernet chip is recognized at its I/O base */
|
||||
|
||||
/* Attach the IRQ to the driver */
|
||||
|
||||
if (irq_attach(CONFIG_skeleton_IRQ, skel_interrupt))
|
||||
{
|
||||
/* We could not attach the ISR to the the interrupt */
|
||||
/* We could not attach the ISR to the interrupt */
|
||||
|
||||
return -EAGAIN;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user