Tinkering with PHY init
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3101 42af7a65-404d-4744-a932-0658087f49c3
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@ -147,12 +147,14 @@ struct lpc17_driver_s
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int lp_irq; /* Ethernet controller IRQ */
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#endif
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bool lp_bifup; /* true:ifup false:ifdown */
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bool lp_ifup; /* true:ifup false:ifdown */
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bool lp_speed100; /* true:100Mbps false:10Mbps */
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bool lp_fullduplex; /* true:full duplex false:half duplex */
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#ifdef LPC17_HAVE_PHY
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uint8_t lp_phyaddr; /* PHY device address */
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uint8_t lp_phyaddr; /* PHY device address */
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#endif
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WDOG_ID lp_txpoll; /* TX poll timer */
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WDOG_ID lp_txtimeout; /* TX timeout timer */
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WDOG_ID lp_txpoll; /* TX poll timer */
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WDOG_ID lp_txtimeout; /* TX timeout timer */
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/* This holds the information visible to uIP/NuttX */
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@ -247,7 +249,7 @@ static inline int lpc17_phyreset(uint8_t phyaddr);
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static inline int lpc17_phyautoneg(uint8_t phyaddr);
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# endif
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static int lpc17_phyfixed(uint8_t phyaddr, bool speed100, bool fullduplex);
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static void lpc17_phyfullduplex(uint8_t phyaddr);
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static void lpc17_phyduplex(uint8_t phyaddr, bool fullduplex);
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static inline int lpc17_phyinit(struct lpc17_driver_s *priv);
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#else
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# define lpc17_phyinit()
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@ -720,7 +722,7 @@ static int lpc17_ifup(struct uip_driver_s *dev)
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/* Enable the Ethernet interrupt */
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priv->lp_bifup = true;
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priv->lp_ifup = true;
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up_enable_irq(LPC17_IRQ_ETH);
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return OK;
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}
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@ -758,7 +760,7 @@ static int lpc17_ifdown(struct uip_driver_s *dev)
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/* Reset the device */
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priv->lp_bifup = false;
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priv->lp_ifup = false;
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irqrestore(flags);
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return OK;
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}
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@ -791,7 +793,7 @@ static int lpc17_txavail(struct uip_driver_s *dev)
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/* Ignore the notification if the interface is not yet up */
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if (priv->lp_bifup)
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if (priv->lp_ifup)
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{
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/* Check if there is room in the hardware to hold another outgoing packet. */
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@ -1161,10 +1163,11 @@ static int lpc17_phyfixed(uint8_t phyaddr, bool speed100, bool fullduplex)
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* Function: lpc17_phyfulldplex
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*
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* Description:
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* Tweak a few things for full duplex.
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* Tweak a few things for full/half duplex.
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*
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* Parameters:
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* phyaddr - The device address where the PHY was discovered
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* fullduplex - TRUE: full duplex
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*
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* Returned Value:
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* None
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@ -1174,25 +1177,46 @@ static int lpc17_phyfixed(uint8_t phyaddr, bool speed100, bool fullduplex)
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****************************************************************************/
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#ifdef LPC17_HAVE_PHY
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static void lpc17_phyfullduplex(uint8_t phyaddr)
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static void lpc17_phyduplex(uint8_t phyaddr, bool fullduplex)
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{
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uint32_t regval;
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/* Set the inter-packet gap */
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if (fullduplex)
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{
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/* Set the inter-packet gap */
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lpc17_putreg(21,LPC17_ETH_IPGT);
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lpc17_putreg(21, LPC17_ETH_IPGT);
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/* Set MAC to operate in full duplex mode */
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/* Set MAC to operate in full duplex mode */
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regval = lpc17_getreg(LPC17_ETH_MAC2);
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regval |= ETH_MAC2_FD;
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lpc17_putreg(regval, LPC17_ETH_MAC2);
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regval = lpc17_getreg(LPC17_ETH_MAC2);
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regval |= ETH_MAC2_FD;
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lpc17_putreg(regval, LPC17_ETH_MAC2);
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/* Select full duplex operation for ethernet controller */
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/* Select full duplex operation for ethernet controller */
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regval = lpc17_getreg(LPC17_ETH_CMD);
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regval |= ETH_CMD_FD;
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lpc17_putreg(regval, LPC17_ETH_CMD);
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regval = lpc17_getreg(LPC17_ETH_CMD);
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regval |= ETH_CMD_FD;
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lpc17_putreg(regval, LPC17_ETH_CMD);
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}
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else
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{
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/* Set the inter-packet gap */
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lpc17_putreg(18, LPC17_ETH_IPGT);
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/* Set MAC to operate in half duplex mode */
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regval = lpc17_getreg(LPC17_ETH_MAC2);
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regval &= ~ETH_MAC2_FD;
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lpc17_putreg(regval, LPC17_ETH_MAC2);
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/* Select half duplex operation for ethernet controller */
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regval = lpc17_getreg(LPC17_ETH_CMD);
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regval &= ~ETH_CMD_FD;
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lpc17_putreg(regval, LPC17_ETH_CMD);
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}
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}
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#endif
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@ -1298,6 +1322,9 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
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(MII_ADVERTISE_100BASETXFULL | MII_ADVERTISE_100BASETXHALF |
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MII_ADVERTISE_10BASETXFULL | MII_ADVERTISE_10BASETXHALF |
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MII_ADVERTISE_CSMA));
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/* Then perform the auto-negotiation */
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ret = lpc17_phyautoneg(phyaddr);
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if (ret < 0)
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{
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@ -1306,7 +1333,19 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
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#else
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/* Set up the fixed PHY configuration */
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ret = lpc17_phyfixed(phyaddr, );
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#ifdef CONFIG_PHY_SPEED100
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priv->lp_speed100 = true;
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#else
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priv->lp_speed100 = false;
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#endif
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#ifdef CONFIG_PHY_FDUPLEX
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priv->lp_fullduplex = true;
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#else
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priv->lp_fullduplex = false;
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#endif
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ret = lpc17_phyfixed(phyaddr, priv->lp_speed100, priv->lp_fullduplex);
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if (ret < 0)
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{
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return ret;
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@ -1325,24 +1364,22 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
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switch (phyreg & KS8721_10BTCR_MODE_MASK)
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{
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case KS8721_10BTCR_MODE_10BTHD: /* 10BASE-T half duplex */
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nlldbg("10BASE-T half duplex\n");
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priv->lp_fullduplex = false;
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priv->lp_speed100 = false;
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lpc17_putreg(0, LPC17_ETH_SUPP);
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lpc17_phyfixed(phyaddr, false, false);
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break;
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case KS8721_10BTCR_MODE_100BTHD: /* 100BASE-T half duplex */
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nlldbg("100BASE-T half duplex\n");
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lpc17_phyfixed(phyaddr, true, false);
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priv->lp_fullduplex = false;
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priv->lp_speed100 = true;
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break;
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case KS8721_10BTCR_MODE_10BTFD: /* 10BASE-T full duplex */
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nlldbg("10BASE-T full duplex\n");
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priv->lp_fullduplex = true;
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priv->lp_speed100 = false;
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lpc17_putreg(0, LPC17_ETH_SUPP);
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lpc17_phyfullduplex(phyaddr);
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lpc17_phyfixed(phyaddr, false, true);
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break;
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case KS8721_10BTCR_MODE_100BTFD: /* 100BASE-T full duplex */
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nlldbg("100BASE-T full duplex\n");
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lpc17_phyfullduplex(phyaddr);
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lpc17_phyfixed(phyaddr, true, true);
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priv->lp_fullduplex = true;
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priv->lp_speed100 = true;
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break;
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default:
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lldbg("Unrecognized mode: %04x\n", phyreg);
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@ -1350,6 +1387,16 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
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}
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#endif
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nlldbg("%dBase-T %s duplex\n",
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priv->lp_speed100 ? 10 : 100,
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priv->lp_fullduplex ? "full" : "half");
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/* Configure the MAC for this speed */
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lpc17_phyduplex(phyaddr, priv->lp_fullduplex);
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lpc17_phyfixed(phyaddr, priv->lp_speed100, priv->lp_fullduplex);
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lpc17_showmii(phyaddr, "At completion");
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return OK;
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}
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#endif
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