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esp32: cache_sram_mmu_set: update the correct register bits

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YAMAMOTO Takashi 2024-08-30 00:22:24 +09:00 committed by Xiang Xiao
parent a916de0e14
commit a722b74de7
1 changed files with 4 additions and 4 deletions
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8
arch/xtensa/src/esp32/esp32_spiram.c
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@ -199,15 +199,15 @@ unsigned int IRAM_ATTR cache_sram_mmu_set(int cpu_no, int pid,
if (cpu_no == 0) if (cpu_no == 0)
{ {
regval = getreg32(DPORT_PRO_CACHE_CTRL1_REG); regval = getreg32(DPORT_PRO_CACHE_CTRL1_REG);
regval &= ~DPORT_PRO_CMMU_SRAM_PAGE_MODE; regval &= ~DPORT_PRO_CMMU_SRAM_PAGE_MODE_M;
regval |= mask_s; regval |= mask_s << DPORT_PRO_CMMU_SRAM_PAGE_MODE_S;
putreg32(regval, DPORT_PRO_CACHE_CTRL1_REG); putreg32(regval, DPORT_PRO_CACHE_CTRL1_REG);
} }
else else
{ {
regval = getreg32(DPORT_APP_CACHE_CTRL1_REG); regval = getreg32(DPORT_APP_CACHE_CTRL1_REG);
regval &= ~DPORT_APP_CMMU_SRAM_PAGE_MODE; regval &= ~DPORT_APP_CMMU_SRAM_PAGE_MODE_M;
regval |= mask_s; regval |= mask_s << DPORT_APP_CMMU_SRAM_PAGE_MODE_S;
putreg32(regval, DPORT_APP_CACHE_CTRL1_REG); putreg32(regval, DPORT_APP_CACHE_CTRL1_REG);
} }