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AVR: Fix some spacing issues

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This commit is contained in:
Gregory Nutt 2015-10-07 16:24:54 -06:00
parent 20d87b38de
commit a73d266469
36 changed files with 203 additions and 203 deletions
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2
arch/avr/src/at32uc3/at32uc3_clkinit.c
View File

@ -110,7 +110,7 @@ static inline void up_enableosc32(void)
regval = getreg32(AVR32_PM_OSCCTRL32);
regval &= ~PM_OSCCTRL32_STARTUP_MASK;
regval |= PM_OSCCTRL32_EN|(AVR32_OSC32STARTUP << PM_OSCCTRL32_STARTUP_SHIFT);
regval |= PM_OSCCTRL32_EN | (AVR32_OSC32STARTUP << PM_OSCCTRL32_STARTUP_SHIFT);
putreg32(regval, AVR32_PM_OSCCTRL32);
}
#endif

44
arch/avr/src/at32uc3/at32uc3_gpioirq.c
View File

@ -157,25 +157,25 @@ static inline int gpio_pin(unsigned int irq)
/* Is this pin at bit 0 configured for interrupt support? */
if ((pinset & 1) != 0)
{
/* Is it the on IRQ we are looking for? */
{
/* Is it the on IRQ we are looking for? */
if (pinirq == irq)
{
/* Yes, return the associated pin number */
if (pinirq == irq)
{
/* Yes, return the associated pin number */
return pin;
}
return pin;
}
/* No.. Increment the IRQ number for the next configured pin */
/* No.. Increment the IRQ number for the next configured pin */
pinirq++;
}
pinirq++;
}
/* Shift the next pin to position bit 0 */
/* Shift the next pin to position bit 0 */
pinset >>= 1;
}
pinset >>= 1;
}
return -EINVAL;
}
@ -209,10 +209,10 @@ static void gpio_porthandler(uint32_t regbase, int irqbase, uint32_t irqset, voi
uint32_t bit = (1 << pin);
if ((irqset & bit) != 0)
{
/* Is an interrupt pending on this pin? */
{
/* Is an interrupt pending on this pin? */
if ((ifr & bit) != 0)
if ((ifr & bit) != 0)
{
/* Yes.. Clear the pending interrupt */
@ -231,16 +231,16 @@ static void gpio_porthandler(uint32_t regbase, int irqbase, uint32_t irqset, voi
lldbg("No handler: pin=%d ifr=%08x irqset=%08x",
pin, ifr, irqset);
}
}
}
/* Increment the IRQ number on all configured pins */
/* Increment the IRQ number on all configured pins */
irq++;
}
irq++;
}
/* Not configured. An interrupt on this pin would be an error. */
/* Not configured. An interrupt on this pin would be an error. */
else if ((ifr & bit) != 0)
else if ((ifr & bit) != 0)
{
/* Clear the pending interrupt */

6
arch/avr/src/at32uc3/at32uc3_irq.c
View File

@ -211,9 +211,9 @@ void up_irqinitialize(void)
*/
for (group = 0; group < AVR32_IRQ_MAXGROUPS; group++)
{
putreg32(g_ipr[0], AVR32_INTC_IPR(group));
}
{
putreg32(g_ipr[0], AVR32_INTC_IPR(group));
}
/* currents_regs is non-NULL only while processing an interrupt */

13
arch/avr/src/at32uc3/at32uc3_lowconsole.c
View File

@ -152,7 +152,7 @@ static void usart_setbaudrate(uintptr_t usart_base, uint32_t baudrate)
{
/* Select 16x oversampling mode and clear the SYNC mode bit */
mr &= ~(USART_MR_OVER|USART_MR_SYNC);
mr &= ~(USART_MR_OVER | USART_MR_SYNC);
/* Calculate the clock divider assuming 16x oversampling */
@ -218,8 +218,9 @@ void usart_reset(uintptr_t usart_base)
/* Disable RX and TX, put USART in reset, disable handshaking signals */
usart_putreg(usart_base, AVR32_USART_CR_OFFSET,
USART_CR_RSTRX|USART_CR_RSTTX|USART_CR_RSTSTA|USART_CR_RSTIT|
USART_CR_RSTNACK|USART_CR_DTRDIS|USART_CR_RTSDIS);
USART_CR_RSTRX | USART_CR_RSTTX | USART_CR_RSTSTA |
USART_CR_RSTIT | USART_CR_RSTNACK | USART_CR_DTRDIS |
USART_CR_RTSDIS);
}
#endif
@ -243,7 +244,7 @@ void usart_configure(uintptr_t usart_base, uint32_t baud, unsigned int parity,
/* Configure STOP bits */
regval = USART_MR_MODE_NORMAL|USART_MR_CHMODE_NORMAL; /* Normal RS-232 mode */
regval = USART_MR_MODE_NORMAL | USART_MR_CHMODE_NORMAL; /* Normal RS-232 mode */
regval |= stop2 ? USART_MR_NBSTOP_2 : USART_MR_NBSTOP_1;
/* Configure parity */
@ -285,7 +286,7 @@ void usart_configure(uintptr_t usart_base, uint32_t baud, unsigned int parity,
/* Enable RX and TX */
regval = usart_getreg(usart_base, AVR32_USART_CR_OFFSET);
regval |= (USART_CR_RXEN|USART_CR_TXEN);
regval |= (USART_CR_RXEN | USART_CR_TXEN);
usart_putreg(usart_base, AVR32_USART_CR_OFFSET, regval);
}
#endif
@ -354,7 +355,7 @@ void up_consoleinit(void)
/* Enable selected clocks (and disabled unselected clocks) */
regval = getreg32(AVR32_PM_PBAMASK);
regval &= ~(PM_PBAMASK_USART0|PM_PBAMASK_USART1|PM_PBAMASK_USART2);
regval &= ~(PM_PBAMASK_USART0 | PM_PBAMASK_USART1 | PM_PBAMASK_USART2);
regval |= pbamask;
putreg32(regval, AVR32_PM_PBAMASK);

55
arch/avr/src/at32uc3/at32uc3_serial.c
View File

@ -358,7 +358,7 @@ static inline void up_disableusartint(struct up_dev_s *priv, uint32_t *imr)
static int up_setup(struct uart_dev_s *dev)
{
#ifndef CONFIG_SUPPRESS_UART_CONFIG
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
/* Configure the USART as an RS-232 UART */
@ -380,7 +380,7 @@ static int up_setup(struct uart_dev_s *dev)
static void up_shutdown(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
/* Reset, disable interrupts, and disable Rx and Tx */
@ -404,7 +404,7 @@ static void up_shutdown(struct uart_dev_s *dev)
static int up_attach(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
/* Attach the IRQ */
@ -423,7 +423,7 @@ static int up_attach(struct uart_dev_s *dev)
static void up_detach(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
up_serialout(priv, AVR32_USART_IDR_OFFSET, 0xffffffff);
irq_detach(priv->irq);
}
@ -472,7 +472,7 @@ static int up_interrupt(int irq, void *context)
{
PANIC();
}
priv = (struct up_dev_s*)dev->priv;
priv = (struct up_dev_s *)dev->priv;
DEBUGASSERT(priv);
/* Loop until there are no characters to be transferred or,
@ -491,25 +491,26 @@ static int up_interrupt(int irq, void *context)
/* Handle incoming, receive bytes (with or without timeout) */
if ((csr & (USART_CSR_RXRDY|USART_CSR_TIMEOUT)) != 0)
if ((csr & (USART_CSR_RXRDY | USART_CSR_TIMEOUT)) != 0)
{
/* Received data ready... process incoming bytes */
/* Received data ready... process incoming bytes */
uart_recvchars(dev);
handled = true;
uart_recvchars(dev);
handled = true;
}
/* Handle outgoing, transmit bytes */
if ((csr & USART_CSR_TXRDY) != 0)
{
/* Transmit data regiser empty ... process outgoing bytes */
/* Transmit data regiser empty ... process outgoing bytes */
uart_xmitchars(dev);
handled = true;
uart_xmitchars(dev);
handled = true;
}
}
return OK;
return OK;
}
/****************************************************************************
@ -533,7 +534,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
dev = inode->i_private;
DEBUGASSERT(dev, dev->priv);
priv = (struct up_dev_s*)dev->priv;
priv = (struct up_dev_s *)dev->priv;
switch (cmd)
{
@ -563,7 +564,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
static int up_receive(struct uart_dev_s *dev, uint32_t *status)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
uint32_t rhr;
/* Get the Rx byte. The USART Rx interrupt flag is cleared by side effect
@ -595,7 +596,7 @@ static int up_receive(struct uart_dev_s *dev, uint32_t *status)
static void up_rxint(struct uart_dev_s *dev, bool enable)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
if (enable)
{
@ -606,19 +607,19 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
# ifdef CONFIG_USART_ERRINTS
up_serialout(priv, AVR32_USART_IER_OFFSET,
USART_INT_RXRDY|USART_INT_TIMEOUT|
USART_INT_OVRE|USART_INT_FRAME|USART_INT_PARE);
USART_INT_RXRDY | USART_INT_TIMEOUT | USART_INT_OVRE |
USART_INT_FRAME | USART_INT_PARE);
# else
up_serialout(priv, AVR32_USART_IER_OFFSET,
USART_INT_RXRDY|USART_INT_TIMEOUT);
USART_INT_RXRDY | USART_INT_TIMEOUT);
# endif
#endif
}
else
{
up_serialout(priv, AVR32_USART_IDR_OFFSET,
USART_INT_RXRDY|USART_INT_TIMEOUT|
USART_INT_OVRE|USART_INT_FRAME|USART_INT_PARE);
up_serialout(priv, AVR32_USART_IDR_OFFSET,
USART_INT_RXRDY | USART_INT_TIMEOUT | USART_INT_OVRE |
USART_INT_FRAME | USART_INT_PARE);
}
}
@ -632,7 +633,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
static bool up_rxavailable(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
uint32_t regval;
/* Read the channel status register and check if character is available to
@ -653,7 +654,7 @@ static bool up_rxavailable(struct uart_dev_s *dev)
static void up_send(struct uart_dev_s *dev, int ch)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
up_serialout(priv, AVR32_USART_THR_OFFSET, (uint32_t)ch);
}
@ -667,7 +668,7 @@ static void up_send(struct uart_dev_s *dev, int ch)
static void up_txint(struct uart_dev_s *dev, bool enable)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
@ -704,7 +705,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
static bool up_txready(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
uint32_t regval;
/* Read the channel status register and check if THR is ready to accept
@ -790,7 +791,7 @@ void up_serialinit(void)
int up_putc(int ch)
{
#ifdef HAVE_SERIAL_CONSOLE
struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv;
struct up_dev_s *priv = (struct up_dev_s *)CONSOLE_DEV.priv;
uint32_t imr;
up_disableusartint(priv, &imr);

10
arch/avr/src/at32uc3/at32uc3_timerisr.c
View File

@ -167,14 +167,14 @@ static void rtc_waitnotbusy(void)
int up_timerisr(int irq, uint32_t *regs)
{
/* Clear the pending timer interrupt */
/* Clear the pending timer interrupt */
putreg32(RTC_INT_TOPI, AVR32_RTC_ICR);
putreg32(RTC_INT_TOPI, AVR32_RTC_ICR);
/* Process timer interrupt */
/* Process timer interrupt */
sched_process_timer();
return 0;
sched_process_timer();
return 0;
}
/****************************************************************************

12
arch/avr/src/at90usb/at90usb_serial.c
View File

@ -247,7 +247,7 @@ static int usart1_attach(struct uart_dev_s *dev)
(void)irq_attach(AT90USB_IRQ_U1RX, usart1_rxinterrupt);
(void)irq_attach(AT90USB_IRQ_U1DRE, usart1_txinterrupt);
// (void)irq_attach(AT90USB_IRQ_U1TX, usart1_txinterrupt);
//(void)irq_attach(AT90USB_IRQ_U1TX, usart1_txinterrupt);
return OK;
}
@ -271,7 +271,7 @@ static void usart1_detach(struct uart_dev_s *dev)
(void)irq_detach(AT90USB_IRQ_U1RX);
(void)irq_detach(AT90USB_IRQ_U1DRE);
// (void)irq_detach(AT90USB_IRQ_U1TX);
//(void)irq_detach(AT90USB_IRQ_U1TX);
}
/****************************************************************************
@ -292,9 +292,9 @@ static int usart1_rxinterrupt(int irq, void *context)
if ((ucsr1a & (1 << RXC1)) != 0)
{
/* Received data ready... process incoming bytes */
/* Received data ready... process incoming bytes */
uart_recvchars(&g_usart1port);
uart_recvchars(&g_usart1port);
}
return OK;
@ -320,9 +320,9 @@ static int usart1_txinterrupt(int irq, void *context)
if ((ucsr1a & (1 << UDRE1)) != 0)
{
/* Transmit data regiser empty ... process outgoing bytes */
/* Transmit data regiser empty ... process outgoing bytes */
uart_xmitchars(&g_usart1port);
uart_xmitchars(&g_usart1port);
}
return OK;

9
arch/avr/src/at90usb/at90usb_timerisr.c
View File

@ -92,8 +92,7 @@
# error "Cannot represent this timer frequency"
#endif
/*
* Eg. CPU_CLOCK = 8MHz, CLOCKS_PER_SEC = 100
/* Eg. CPU_CLOCK = 8MHz, CLOCKS_PER_SEC = 100
*
* MATCH1 ((8000000 + 50) / 100) = 80,000 FREQ=100.0Hz
* MATCH8 ((1000000 + 50) / 100) = 10,000 FREQ=100.0Hz <-- this one
@ -125,10 +124,10 @@
int up_timerisr(int irq, uint32_t *regs)
{
/* Process timer interrupt */
/* Process timer interrupt */
sched_process_timer();
return 0;
sched_process_timer();
return 0;
}
/****************************************************************************

60
arch/avr/src/at90usb/at90usb_usbdev.c
View File

@ -450,7 +450,7 @@ static int avr_fifoready(int timeout)
{
UDINT &= ~(1 << SOFI);
for (;;)
for (; ; )
{
/* Check if the FIFO is ready by testing RWAL (read/write allowed). The
* meaning of this bigtdepends on the direction of the endpoint: For an
@ -518,9 +518,9 @@ static void avr_ep0send(FAR const uint8_t *buffer, uint16_t buflen)
while (buflen)
{
/* Verify that RXOUTI is clear. RXOUTI is set when a new OUT data is
* received. In this case, we have not option but to abort the transfer.
*/
/* Verify that RXOUTI is clear. RXOUTI is set when a new OUT data is
* received. In this case, we have not option but to abort the transfer.
*/
regval = UEINTX;
if ((regval & (1 << RXOUTI)) != 0)
@ -854,10 +854,10 @@ static int avr_epINqueue(FAR struct avr_ep_s *privep)
}
else
{
/* No.. remove the next request from the queue of IN requests */
/* No.. remove the next request from the queue of IN requests */
privreq = avr_rqdequeue(privep);
privep->pending = privreq;
privreq = avr_rqdequeue(privep);
privep->pending = privreq;
}
/* Is there an IN request */
@ -873,7 +873,7 @@ static int avr_epINqueue(FAR struct avr_ep_s *privep)
* pending transfer in place.
*/
if (ret == OK || ret != -ETIME)
if (ret == OK || ret != -ETIME)
{
/* The transfer has completed, perhaps with an error. Return the request
* to the class driver.
@ -1386,7 +1386,7 @@ static inline void avr_ep0setup(void)
/* Read EP0 setup data -- Read the setup data from the hardware. */
ptr = (uint8_t*)&ctrl;
ptr = (uint8_t *)&ctrl;
for (i = 0; i < USB_SIZEOF_CTRLREQ; i++)
{
*ptr++ = UEDATX;
@ -2611,33 +2611,33 @@ static FAR struct usbdev_ep_s *avr_allocep(FAR struct usbdev_s *dev,
epmask = 1 << epndx;
if ((epset & epmask) != 0)
{
/* Initialize the endpoint structure */
/* Initialize the endpoint structure */
privep = &g_usbdev.eplist[epndx];
memset(privep, 0, sizeof(struct avr_ep_s));
privep = &g_usbdev.eplist[epndx];
memset(privep, 0, sizeof(struct avr_ep_s));
privep->ep.ops = &g_epops;
privep->ep.eplog = epndx;
privep->ep.maxpacket = (epndx == 1) ? 256 : 64;
privep->ep.ops = &g_epops;
privep->ep.eplog = epndx;
privep->ep.maxpacket = (epndx == 1) ? 256 : 64;
/* Mark the IN/OUT endpoint no longer available */
/* Mark the IN/OUT endpoint no longer available */
g_usbdev.epavail &= ~epmask;
if (in)
{
g_usbdev.epinset |= epmask;
privep->epin = 1;
}
else
{
g_usbdev.epoutset |= epmask;
privep->epin = 0;
}
g_usbdev.epavail &= ~epmask;
if (in)
{
g_usbdev.epinset |= epmask;
privep->epin = 1;
}
else
{
g_usbdev.epoutset |= epmask;
privep->epin = 0;
}
/* And return the pointer to the standard endpoint structure */
/* And return the pointer to the standard endpoint structure */
irqrestore(flags);
return &privep->ep;
irqrestore(flags);
return &privep->ep;
}
}

22
arch/avr/src/atmega/atmega_serial.c
View File

@ -387,7 +387,7 @@ static int usart0_attach(struct uart_dev_s *dev)
(void)irq_attach(ATMEGA_IRQ_U0RX, usart0_rxinterrupt);
(void)irq_attach(ATMEGA_IRQ_U0DRE, usart0_txinterrupt);
// (void)irq_attach(ATMEGA_IRQ_U0TX, usart0_txinterrupt);
//(void)irq_attach(ATMEGA_IRQ_U0TX, usart0_txinterrupt);
return OK;
}
#endif
@ -409,7 +409,7 @@ static int usart1_attach(struct uart_dev_s *dev)
(void)irq_attach(ATMEGA_IRQ_U1RX, usart1_rxinterrupt);
(void)irq_attach(ATMEGA_IRQ_U1DRE, usart1_txinterrupt);
// (void)irq_attach(ATMEGA_IRQ_U1TX, usart1_txinterrupt);
//(void)irq_attach(ATMEGA_IRQ_U1TX, usart1_txinterrupt);
return OK;
}
#endif
@ -450,7 +450,7 @@ static void usart1_detach(struct uart_dev_s *dev)
(void)irq_detach(ATMEGA_IRQ_U1RX);
(void)irq_detach(ATMEGA_IRQ_U1DRE);
// (void)irq_detach(ATMEGA_IRQ_U1TX);
//(void)irq_detach(ATMEGA_IRQ_U1TX);
}
#endif
@ -473,9 +473,9 @@ static int usart0_rxinterrupt(int irq, void *context)
if ((ucsr0a & (1 << RXC0)) != 0)
{
/* Received data ready... process incoming bytes */
/* Received data ready... process incoming bytes */
uart_recvchars(&g_usart0port);
uart_recvchars(&g_usart0port);
}
return OK;
@ -491,9 +491,9 @@ static int usart1_rxinterrupt(int irq, void *context)
if ((ucsr1a & (1 << RXC1)) != 0)
{
/* Received data ready... process incoming bytes */
/* Received data ready... process incoming bytes */
uart_recvchars(&g_usart1port);
uart_recvchars(&g_usart1port);
}
return OK;
@ -521,9 +521,9 @@ static int usart0_txinterrupt(int irq, void *context)
if ((ucsr0a & (1 << UDRE0)) != 0)
{
/* Transmit data regiser empty ... process outgoing bytes */
/* Transmit data regiser empty ... process outgoing bytes */
uart_xmitchars(&g_usart0port);
uart_xmitchars(&g_usart0port);
}
return OK;
@ -541,9 +541,9 @@ static int usart1_txinterrupt(int irq, void *context)
if ((ucsr1a & (1 << UDRE1)) != 0)
{
/* Transmit data regiser empty ... process outgoing bytes */
/* Transmit data regiser empty ... process outgoing bytes */
uart_xmitchars(&g_usart1port);
uart_xmitchars(&g_usart1port);
}
return OK;

9
arch/avr/src/atmega/atmega_timerisr.c
View File

@ -92,8 +92,7 @@
# error "Cannot represent this timer frequency"
#endif
/*
* Eg. CPU_CLOCK = 8MHz, CLOCKS_PER_SEC = 100
/* Eg. CPU_CLOCK = 8MHz, CLOCKS_PER_SEC = 100
*
* MATCH1 ((8000000 + 50) / 100) = 80,000 FREQ=100.0Hz
* MATCH8 ((1000000 + 50) / 100) = 10,000 FREQ=100.0Hz <-- this one
@ -125,10 +124,10 @@
int up_timerisr(int irq, uint32_t *regs)
{
/* Process timer interrupt */
/* Process timer interrupt */
sched_process_timer();
return 0;
sched_process_timer();
return 0;
}
/****************************************************************************

6
arch/avr/src/avr/up_blocktask.c
View File

@ -75,7 +75,7 @@
void up_block_task(struct tcb_s *tcb, tstate_t task_state)
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
bool switch_needed;
/* Verify that the context switch can be performed */
@ -127,7 +127,7 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
* of the g_readytorun task list.
*/
rtcb = (struct tcb_s*)g_readytorun.head;
rtcb = (struct tcb_s *)g_readytorun.head;
/* Reset scheduler parameters */
@ -142,7 +142,7 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
else
{
struct tcb_s *nexttcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *nexttcb = (struct tcb_s *)g_readytorun.head;
/* Reset scheduler parameters */

8
arch/avr/src/avr/up_checkstack.c
View File

@ -131,11 +131,11 @@ static size_t do_stackcheck(uintptr_t alloc, size_t size)
}
up_putc(ch);
}
}
up_putc('\n');
}
}
}
#endif
/* Return our guess about how much stack space was used */
@ -175,12 +175,12 @@ ssize_t up_check_tcbstack_remain(FAR struct tcb_s *tcb)
size_t up_check_stack(void)
{
return up_check_tcbstack((FAR struct tcb_s*)g_readytorun.head);
return up_check_tcbstack((FAR struct tcb_s *)g_readytorun.head);
}
ssize_t up_check_stack_remain(void)
{
return up_check_tcbstack_remain((FAR struct tcb_s*)g_readytorun.head);
return up_check_tcbstack_remain((FAR struct tcb_s *)g_readytorun.head);
}
#if CONFIG_ARCH_INTERRUPTSTACK > 3

2
arch/avr/src/avr/up_createstack.c
View File

@ -164,5 +164,5 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
return OK;
}
return ERROR;
return ERROR;
}

6
arch/avr/src/avr/up_doirq.c
View File

@ -90,12 +90,12 @@ uint8_t *up_doirq(uint8_t irq, uint8_t *regs)
* current_regs is also used to manage interrupt level context switches.
*/
savestate = (uint8_t*)current_regs; /* Cast removes volatile attribute */
savestate = (uint8_t *)current_regs; /* Cast removes volatile attribute */
current_regs = regs;
/* Deliver the IRQ */
irq_dispatch((int)irq, (uint32_t*)regs);
irq_dispatch((int)irq, (uint32_t *)regs);
/* If a context switch occurred while processing the interrupt then
* current_regs may have change value. If we return any value different
@ -103,7 +103,7 @@ uint8_t *up_doirq(uint8_t irq, uint8_t *regs)
* switch occurred during interrupt processing.
*/
regs = (uint8_t*)current_regs; /* Cast removes volatile attribute */
regs = (uint8_t *)current_regs; /* Cast removes volatile attribute */
/* Restore the previous value of current_regs. NULL would indicate that
* we are no longer in an interrupt handler. It will be non-NULL if we

4
arch/avr/src/avr/up_dumpstate.c
View File

@ -104,7 +104,7 @@ static void up_stackdump(uint16_t sp, uint16_t stack_base)
for (stack = sp & ~3; stack < stack_base; stack += 12)
{
uint8_t *ptr = (uint8_t*)stack;
uint8_t *ptr = (uint8_t *)stack;
lldbg("%04x: %02x %02x %02x %02x %02x %02x %02x %02x"
" %02x %02x %02x %02x\n",
stack,
@ -168,7 +168,7 @@ static inline void up_registerdump(void)
void up_dumpstate(void)
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
uint16_t sp = up_getsp();
uint16_t ustackbase;
uint16_t ustacksize;

6
arch/avr/src/avr/up_releasepending.c
View File

@ -64,7 +64,7 @@
void up_release_pending(void)
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
slldbg("From TCB=%p\n", rtcb);
@ -93,7 +93,7 @@ void up_release_pending(void)
* of the g_readytorun task list.
*/
rtcb = (struct tcb_s*)g_readytorun.head;
rtcb = (struct tcb_s *)g_readytorun.head;
/* Update scheduler parameters */
@ -108,7 +108,7 @@ void up_release_pending(void)
else
{
struct tcb_s *nexttcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *nexttcb = (struct tcb_s *)g_readytorun.head;
/* Update scheduler parameters */

8
arch/avr/src/avr/up_reprioritizertr.c
View File

@ -91,7 +91,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
}
else
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
bool switch_needed;
slldbg("TCB=%p PRI=%d\n", tcb, priority);
@ -135,7 +135,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
sched_suspend_scheduler(rtcb);
/* Are we in an interrupt handler? */
/* Are we in an interrupt handler? */
if (current_regs)
{
@ -149,7 +149,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
* of the g_readytorun task list.
*/
rtcb = (struct tcb_s*)g_readytorun.head;
rtcb = (struct tcb_s *)g_readytorun.head;
/* Update scheduler parameters */
@ -164,7 +164,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
else
{
struct tcb_s *nexttcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *nexttcb = (struct tcb_s *)g_readytorun.head;
/* Update scheduler parameters */

2
arch/avr/src/avr/up_schedulesigaction.c
View File

@ -121,7 +121,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
sdbg("rtcb=0x%p current_regs=0x%p\n", g_readytorun.head, current_regs);
if (tcb == (struct tcb_s*)g_readytorun.head)
if (tcb == (struct tcb_s *)g_readytorun.head)
{
/* CASE 1: We are not in an interrupt handler and
* a task is signalling itself for some reason.

2
arch/avr/src/avr/up_sigdeliver.c
View File

@ -82,7 +82,7 @@
void up_sigdeliver(void)
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
uint8_t regs[XCPTCONTEXT_REGS];
sig_deliver_t sigdeliver;

20
arch/avr/src/avr/up_spi.c
View File

@ -263,7 +263,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
}
else /* if (frequency >= BOARD_CPU_CLOCK / 128) */
{
spcr |= (1 << SPR0)|(1 << SPR1);
spcr |= (1 << SPR0) | (1 << SPR1);
actual = BOARD_CPU_CLOCK / 128;
}
@ -393,7 +393,7 @@ static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
/* Wait for transmission to complete */
while (!(SPSR & (1<<SPIF)));
while (!(SPSR & (1 << SPIF)));
/* Then return the received value */
@ -422,13 +422,13 @@ static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size_t nwords)
{
FAR uint8_t *ptr = (FAR uint8_t*)buffer;
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
spidbg("nwords: %d\n", nwords);
while (nwords-- > 0)
{
(void)spi_send(dev, (uint16_t)*ptr++);
}
{
(void)spi_send(dev, (uint16_t)*ptr++);
}
}
/****************************************************************************
@ -453,13 +453,13 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nwords)
{
FAR uint8_t *ptr = (FAR uint8_t*)buffer;
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
spidbg("nwords: %d\n", nwords);
while (nwords-- > 0)
{
*ptr++ = spi_send(dev, (uint16_t)0xff);
}
{
*ptr++ = spi_send(dev, (uint16_t)0xff);
}
}
/****************************************************************************

6
arch/avr/src/avr/up_unblocktask.c
View File

@ -70,7 +70,7 @@
void up_unblock_task(struct tcb_s *tcb)
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
/* Verify that the context switch can be performed */
@ -109,7 +109,7 @@ void up_unblock_task(struct tcb_s *tcb)
* of the g_readytorun task list.
*/
rtcb = (struct tcb_s*)g_readytorun.head;
rtcb = (struct tcb_s *)g_readytorun.head;
/* Update scheduler parameters */
@ -124,7 +124,7 @@ void up_unblock_task(struct tcb_s *tcb)
else
{
struct tcb_s *nexttcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *nexttcb = (struct tcb_s *)g_readytorun.head;
/* Update scheduler parameters */

18
arch/avr/src/avr32/up_blocktask.c
View File

@ -76,7 +76,7 @@
void up_block_task(struct tcb_s *tcb, tstate_t task_state)
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
bool switch_needed;
/* Verify that the context switch can be performed */
@ -128,7 +128,7 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
* of the g_readytorun task list.
*/
rtcb = (struct tcb_s*)g_readytorun.head;
rtcb = (struct tcb_s *)g_readytorun.head;
/* Reset scheduler parameters */
@ -150,16 +150,16 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
* run list.
*/
struct tcb_s *nexttcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *nexttcb = (struct tcb_s *)g_readytorun.head;
#ifdef CONFIG_ARCH_ADDRENV
/* Make sure that the address environment for the previously
* running task is closed down gracefully (data caches dump,
* MMU flushed) and set up the address environment for the new
* thread at the head of the ready-to-run list.
*/
/* Make sure that the address environment for the previously
* running task is closed down gracefully (data caches dump,
* MMU flushed) and set up the address environment for the new
* thread at the head of the ready-to-run list.
*/
(void)group_addrenv(nexttcb);
(void)group_addrenv(nexttcb);
#endif
/* Reset scheduler parameters */

2
arch/avr/src/avr32/up_createstack.c
View File

@ -190,5 +190,5 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
return OK;
}
return ERROR;
return ERROR;
}

2
arch/avr/src/avr32/up_doirq.c
View File

@ -104,7 +104,7 @@ uint32_t *up_doirq(int irq, uint32_t *regs)
#ifdef CONFIG_ARCH_FPU
/* Restore floating point registers */
up_restorefpu((uint32_t*)current_regs);
up_restorefpu((uint32_t *)current_regs);
#endif
#ifdef CONFIG_ARCH_ADDRENV

4
arch/avr/src/avr32/up_dumpstate.c
View File

@ -100,7 +100,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
{
uint32_t *ptr = (uint32_t*)stack;
uint32_t *ptr = (uint32_t *)stack;
lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
@ -145,7 +145,7 @@ static inline void up_registerdump(void)
void up_dumpstate(void)
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
uint32_t sp = up_getsp();
uint32_t ustackbase;
uint32_t ustacksize;

6
arch/avr/src/avr32/up_releasepending.c
View File

@ -65,7 +65,7 @@
void up_release_pending(void)
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
slldbg("From TCB=%p\n", rtcb);
@ -96,7 +96,7 @@ void up_release_pending(void)
* of the g_readytorun task list.
*/
rtcb = (struct tcb_s*)g_readytorun.head;
rtcb = (struct tcb_s *)g_readytorun.head;
/* Update scheduler parameters */
@ -117,7 +117,7 @@ void up_release_pending(void)
* ready to run list.
*/
struct tcb_s *nexttcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *nexttcb = (struct tcb_s *)g_readytorun.head;
#ifdef CONFIG_ARCH_ADDRENV
/* Make sure that the address environment for the previously

6
arch/avr/src/avr32/up_reprioritizertr.c
View File

@ -92,7 +92,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
}
else
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
bool switch_needed;
slldbg("TCB=%p PRI=%d\n", tcb, priority);
@ -150,7 +150,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
* of the g_readytorun task list.
*/
rtcb = (struct tcb_s*)g_readytorun.head;
rtcb = (struct tcb_s *)g_readytorun.head;
/* Update scheduler parameters */
@ -171,7 +171,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
* ready to run list.
*/
struct tcb_s *nexttcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *nexttcb = (struct tcb_s *)g_readytorun.head;
#ifdef CONFIG_ARCH_ADDRENV
/* Make sure that the address environment for the previously

2
arch/avr/src/avr32/up_schedulesigaction.c
View File

@ -121,7 +121,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
sdbg("rtcb=0x%p current_regs=0x%p\n", g_readytorun.head, current_regs);
if (tcb == (struct tcb_s*)g_readytorun.head)
if (tcb == (struct tcb_s *)g_readytorun.head)
{
/* CASE 1: We are not in an interrupt handler and
* a task is signalling itself for some reason.

2
arch/avr/src/avr32/up_sigdeliver.c
View File

@ -82,7 +82,7 @@
void up_sigdeliver(void)
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
#if 0
uint32_t regs[XCPTCONTEXT_REGS+3]; /* Why +3? See below */
#else

18
arch/avr/src/avr32/up_unblocktask.c
View File

@ -71,7 +71,7 @@
void up_unblock_task(struct tcb_s *tcb)
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
/* Verify that the context switch can be performed */
@ -110,7 +110,7 @@ void up_unblock_task(struct tcb_s *tcb)
* of the g_readytorun task list.
*/
rtcb = (struct tcb_s*)g_readytorun.head;
rtcb = (struct tcb_s *)g_readytorun.head;
/* Update scheduler parameters */
@ -133,16 +133,16 @@ void up_unblock_task(struct tcb_s *tcb)
* g_readytorun task list.
*/
struct tcb_s *nexttcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *nexttcb = (struct tcb_s *)g_readytorun.head;
#ifdef CONFIG_ARCH_ADDRENV
/* Make sure that the address environment for the previously
* running task is closed down gracefully (data caches dump,
* MMU flushed) and set up the address environment for the new
* thread at the head of the ready-to-run list.
*/
/* Make sure that the address environment for the previously
* running task is closed down gracefully (data caches dump,
* MMU flushed) and set up the address environment for the new
* thread at the head of the ready-to-run list.
*/
(void)group_addrenv(nexttcb);
(void)group_addrenv(nexttcb);
#endif
/* Update scheduler parameters */

2
arch/avr/src/common/up_allocateheap.c
View File

@ -83,6 +83,6 @@
void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
{
board_led_on(LED_HEAPALLOCATE);
*heap_start = (FAR void*)g_idle_topstack;
*heap_start = (FAR void *)g_idle_topstack;
*heap_size = CONFIG_RAM_END - g_idle_topstack;
}

20
arch/avr/src/common/up_assert.c
View File

@ -105,18 +105,18 @@ static void _up_assert(int errorcode)
{
/* Are we in an interrupt handler or the idle task? */
if (current_regs || ((struct tcb_s*)g_readytorun.head)->pid == 0)
if (current_regs || ((struct tcb_s *)g_readytorun.head)->pid == 0)
{
(void)irqsave();
for (;;)
{
(void)irqsave();
for (; ; )
{
#ifdef CONFIG_ARCH_LEDS
board_led_on(LED_PANIC);
up_mdelay(250);
board_led_off(LED_PANIC);
up_mdelay(250);
board_led_on(LED_PANIC);
up_mdelay(250);
board_led_off(LED_PANIC);
up_mdelay(250);
#endif
}
}
}
else
{
@ -160,7 +160,7 @@ static int assert_tracecallback(FAR struct usbtrace_s *trace, FAR void *arg)
void up_assert(const uint8_t *filename, int lineno)
{
#ifdef CONFIG_PRINT_TASKNAME
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
#endif
board_led_on(LED_ASSERTION);

4
arch/avr/src/common/up_exit.c
View File

@ -138,7 +138,7 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
void _exit(int status)
{
struct tcb_s* tcb;
struct tcb_s *tcb;
/* Disable interrupts. They will be restored when the next
* task is started.
@ -161,7 +161,7 @@ void _exit(int status)
* head of the list.
*/
tcb = (struct tcb_s*)g_readytorun.head;
tcb = (struct tcb_s *)g_readytorun.head;
#ifdef CONFIG_ARCH_ADDRENV
/* Make sure that the address environment for the previously running

2
arch/avr/src/common/up_interruptcontext.c
View File

@ -66,5 +66,5 @@
bool up_interrupt_context(void)
{
return current_regs != NULL;
return current_regs != NULL;
}

6
arch/avr/src/common/up_mdelay.c
View File

@ -83,9 +83,9 @@ void up_mdelay(unsigned int milliseconds)
for (i = 0; i < milliseconds; i++)
{
for (j = 0; j < CONFIG_BOARD_LOOPSPERMSEC; j++)
{
}
for (j = 0; j < CONFIG_BOARD_LOOPSPERMSEC; j++)
{
}
}
}