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Merge remote-tracking branch 'origin/master' into photon

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This commit is contained in:
Gregory Nutt 2017-04-29 12:35:01 -06:00
commit a7901f5c4c
214 changed files with 2110 additions and 1652 deletions
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4
Documentation/NuttxPortingGuide.html
View File

@ -5014,11 +5014,11 @@ int kbd_decode(FAR struct lib_instream_s *stream, FAR struct kbd_getstate_s *sta
That structure defines a call table with the following methods:
<ul>
<p><code>void lock(FAR struct spi_dev_s *dev);</code></p>
<p><code>void select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);</code><br>
<p><code>void select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);</code><br>
<code>uint32_t setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);</code><br>
<code>void setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode);</code><br>
<code>void setbits(FAR struct spi_dev_s *dev, int nbits);</code><br>
<code>uint8_t status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);</code><br>
<code>uint8_t status(FAR struct spi_dev_s *dev, uint32_t devid);</code><br>
<code>uint16_t send(FAR struct spi_dev_s *dev, uint16_t wd);</code><br>
<code>void exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer, FAR void *rxbuffer, size_t nwords);</code><br>
<p><code>int registercallback(FAR struct spi_dev_s *dev, mediachange_t callback, void *arg);</code></p>

4
arch/arm/include/stm32l4/chip.h
View File

@ -75,9 +75,11 @@
#if defined(CONFIG_STM32L4_STM32L496XX)
# define STM32L4_SRAM1_SIZE (256*1024) /* 256Kb SRAM1 on AHB bus Matrix */
# define STM32L4_SRAM2_SIZE (64*1024) /* 64Kb SRAM2 on AHB bus Matrix */
#else
#elif defined(CONFIG_STM32L4_STM32L476XX) || defined(CONFIG_STM32L4_STM32L486XX)
# define STM32L4_SRAM1_SIZE (96*1024) /* 96Kb SRAM1 on AHB bus Matrix */
# define STM32L4_SRAM2_SIZE (32*1024) /* 32Kb SRAM2 on AHB bus Matrix */
#else
# error "Unsupported STM32L4 chip"
#endif
# define STM32L4_NFSMC 1 /* Have FSMC memory controller */

27
arch/arm/include/stm32l4/stm32l4x6xx_irq.h
View File

@ -143,15 +143,34 @@
#define STM32L4_IRQ_TSC (STM32L4_IRQ_FIRST+77) /* 77: TSC global interrupt */
#define STM32L4_IRQ_LCD (STM32L4_IRQ_FIRST+78) /* 78: LCD global interrupt */
#define STM32L4_IRQ_AES (STM32L4_IRQ_FIRST+79) /* 79: AES crypto global interrupt */
#define STM32L4_IRQ_RNG (STM32L4_IRQ_FIRST+80) /* 80: Rng global interrupt */
#define STM32L4_IRQ_RNG (STM32L4_IRQ_FIRST+80) /* 80: RNG global interrupt */
#define STM32L4_IRQ_FPU (STM32L4_IRQ_FIRST+81) /* 81: FPU global interrupt */
#define NR_INTERRUPTS 82
#define NR_VECTORS (STM32L4_IRQ_FIRST+NR_INTERRUPTS)
/* STM32L496xx/4A6xx only: */
#define STM32L4_IRQ_HASH_CRS (STM32L4_IRQ_FIRST+82) /* 82: HASH and CRS global interrupt */
#define STM32L4_IRQ_I2C4EV (STM32L4_IRQ_FIRST+83) /* 83: I2C4 event interrupt */
#define STM32L4_IRQ_I2C4ER (STM32L4_IRQ_FIRST+84) /* 84: I2C4 error interrupt */
#define STM32L4_IRQ_DCMI (STM32L4_IRQ_FIRST+85) /* 85: DCMI global interrupt */
#define STM32L4_IRQ_CAN2TX (STM32L4_IRQ_FIRST+86) /* 86: CAN2 TX interrupts */
#define STM32L4_IRQ_CAN2RX0 (STM32L4_IRQ_FIRST+87) /* 87: CAN2 RX0 interrupts */
#define STM32L4_IRQ_CAN2RX1 (STM32L4_IRQ_FIRST+88) /* 88: CAN2 RX1 interrupt */
#define STM32L4_IRQ_CAN2SCE (STM32L4_IRQ_FIRST+89) /* 89: CAN2 SCE interrupt */
#define STM32L4_IRQ_DMA2D (STM32L4_IRQ_FIRST+90) /* 90: DMA2D global interrupt */
#if defined(CONFIG_STM32L4_STM32L476XX) || defined(CONFIG_STM32L4_STM32L486XX)
# define NR_INTERRUPTS 82
#elif defined(CONFIG_STM32L4_STM32L496XX)
# define NR_INTERRUPTS 91
#else
# error "Unsupported STM32L4 chip"
#endif
#define NR_VECTORS (STM32L4_IRQ_FIRST+NR_INTERRUPTS)
/* EXTI interrupts (Do not use IRQ numbers) */
#define NR_IRQS NR_VECTORS
#define NR_IRQS NR_VECTORS
/****************************************************************************************************
* Public Types

18
arch/arm/src/efm32/efm32_spi.c
View File

@ -109,11 +109,11 @@ struct efm32_spiconfig_s
/* SPI-specific methods */
void (*select)(struct spi_dev_s *dev, enum spi_dev_e devid,
void (*select)(struct spi_dev_s *dev, uint32_t devid,
bool selected);
uint8_t (*status)(struct spi_dev_s *dev, enum spi_dev_e devid);
uint8_t (*status)(struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int (*cmddata)(struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int (*cmddata)(struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
};
@ -180,7 +180,7 @@ static inline void spi_dmatxstart(FAR struct efm32_spidev_s *priv);
/* SPI methods */
static int spi_lock(struct spi_dev_s *dev, bool lock);
static void spi_select(struct spi_dev_s *dev, enum spi_dev_e devid,
static void spi_select(struct spi_dev_s *dev, uint32_t devid,
bool selected);
static uint32_t spi_setfrequency(struct spi_dev_s *dev,
uint32_t frequency);
@ -190,9 +190,9 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits);
static int spi_hwfeatures(FAR struct spi_dev_s *dev,
spi_hwfeatures_t features);
#endif
static uint8_t spi_status(struct spi_dev_s *dev, enum spi_dev_e devid);
static uint8_t spi_status(struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
static int spi_cmddata(struct spi_dev_s *dev, enum spi_dev_e devid,
static int spi_cmddata(struct spi_dev_s *dev, uint32_t devid,
bool cmd);
#endif
static uint16_t spi_send(struct spi_dev_s *dev, uint16_t wd);
@ -781,7 +781,7 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
*
****************************************************************************/
static void spi_select(struct spi_dev_s *dev, enum spi_dev_e devid,
static void spi_select(struct spi_dev_s *dev, uint32_t devid,
bool selected)
{
struct efm32_spidev_s *priv = (struct efm32_spidev_s *)dev;
@ -1147,7 +1147,7 @@ static int spi_hwfeatures(FAR struct spi_dev_s *dev, spi_hwfeatures_t features)
*
****************************************************************************/
static uint8_t spi_status(struct spi_dev_s *dev, enum spi_dev_e devid)
static uint8_t spi_status(struct spi_dev_s *dev, uint32_t devid)
{
struct efm32_spidev_s *priv = (struct efm32_spidev_s *)dev;
const struct efm32_spiconfig_s *config;
@ -1185,7 +1185,7 @@ static uint8_t spi_status(struct spi_dev_s *dev, enum spi_dev_e devid)
****************************************************************************/
#ifdef CONFIG_SPI_CMDDATA
static int spi_cmddata(struct spi_dev_s *dev, enum spi_dev_e devid,
static int spi_cmddata(struct spi_dev_s *dev, uint32_t devid,
bool cmd);
{
struct efm32_spidev_s *priv = (struct efm32_spidev_s *)dev;

19
arch/arm/src/efm32/efm32_spi.h
View File

@ -52,7 +52,6 @@
****************************************************************************/
struct spi_dev_s; /* Forward reference */
enum spi_dev_e; /* Forward reference */
/****************************************************************************
* Name: efm32_spibus_initialize
@ -101,26 +100,26 @@ struct spi_dev_s *efm32_spibus_initialize(int port);
****************************************************************************/
#ifdef CONFIG_EFM32_USART0_ISSPI
void efm32_spi0_select(struct spi_dev_s *dev, enum spi_dev_e devid,
void efm32_spi0_select(struct spi_dev_s *dev, uint32_t devid,
bool selected);
uint8_t efm32_spi0_status(struct spi_dev_s *dev, enum spi_dev_e devid);
int efm32_spi0_cmddata(struct spi_dev_s *dev, enum spi_dev_e devid,
uint8_t efm32_spi0_status(struct spi_dev_s *dev, uint32_t devid);
int efm32_spi0_cmddata(struct spi_dev_s *dev, uint32_t devid,
bool cmd);
#endif
#ifdef CONFIG_EFM32_USART1_ISSPI
void efm32_spi1_select(struct spi_dev_s *dev, enum spi_dev_e devid,
void efm32_spi1_select(struct spi_dev_s *dev, uint32_t devid,
bool selected);
uint8_t efm32_spi1_status(struct spi_dev_s *dev, enum spi_dev_e devid);
int efm32_spi1_cmddata(struct spi_dev_s *dev, enum spi_dev_e devid,
uint8_t efm32_spi1_status(struct spi_dev_s *dev, uint32_t devid);
int efm32_spi1_cmddata(struct spi_dev_s *dev, uint32_t devid,
bool cmd);
#endif
#ifdef CONFIG_EFM32_USART2_ISSPI
void efm32_spi2_select(struct spi_dev_s *dev, enum spi_dev_e devid,
void efm32_spi2_select(struct spi_dev_s *dev, uint32_t devid,
bool selected);
uint8_t efm32_spi2_status(struct spi_dev_s *dev, enum spi_dev_e devid);
int efm32_spi2_cmddata(struct spi_dev_s *dev, enum spi_dev_e devid,
uint8_t efm32_spi2_status(struct spi_dev_s *dev, uint32_t devid);
int efm32_spi2_cmddata(struct spi_dev_s *dev, uint32_t devid,
bool cmd);
#endif

7
arch/arm/src/imx1/imx_cspi.h
View File

@ -178,7 +178,6 @@ extern "C"
************************************************************************************/
struct spi_dev_s; /* Forward reference */
enum spi_dev_e; /* Forward reference */
/****************************************************************************
* Name: imx_spibus_initialize
@ -225,10 +224,10 @@ FAR struct spi_dev_s *imx_spibus_initialize(int port);
*
****************************************************************************/
void imx_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t imx_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void imx_spiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t imx_spistatus(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int imx_spicmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int imx_spicmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#undef EXTERN

18
arch/arm/src/imx6/imx_ecspi.c
View File

@ -138,12 +138,12 @@
/* Per SPI callouts to board-specific logic */
typedef CODE void (*imx_select_t)(FAR struct spi_dev_s *dev,
enum spi_dev_e devid, bool selected);
uint32_t devid, bool selected);
typedef CODE uint8_t (*imx_status_t)(FAR struct spi_dev_s *dev,
enum spi_dev_e devid);
uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
typedef CODE int (*imx_cmddata_t)(FAR struct spi_dev_s *dev,
enum spi_dev_e devid, bool cmd);
uint32_t devid, bool cmd);
#endif
struct imx_spidev_s
@ -228,16 +228,16 @@ static int spi_interrupt(int irq, void *context, FAR void *arg);
/* SPI methods */
static int spi_lock(FAR struct spi_dev_s *dev, bool lock);
static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
static void spi_select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev,
uint32_t frequency);
static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
static void spi_setbits(FAR struct spi_dev_s *dev, int nbits);
static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd);
static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
static uint8_t spi_status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
static int spi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
static int spi_cmddata(FAR struct spi_dev_s *dev, uint32_t devid,
bool cmd);
#endif
#ifdef CONFIG_SPI_EXCHANGE
@ -835,7 +835,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
*
****************************************************************************/
static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
static void spi_select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected)
{
struct imx_spidev_s *priv = (struct imx_spidev_s *)dev;
@ -1051,7 +1051,7 @@ static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
*
****************************************************************************/
static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
static uint8_t spi_status(FAR struct spi_dev_s *dev, uint32_t devid)
{
struct imx_spidev_s *priv = (struct imx_spidev_s *)dev;
uint8_t ret = 0;
@ -1091,7 +1091,7 @@ static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
****************************************************************************/
#ifdef CONFIG_SPI_CMDDATA
static int spi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
static int spi_cmddata(FAR struct spi_dev_s *dev, uint32_t devid,
bool cmd)
{
struct imx_spidev_s *priv = (struct imx_spidev_s *)dev;

31
arch/arm/src/imx6/imx_ecspi.h
View File

@ -70,7 +70,6 @@ extern "C"
************************************************************************************/
struct spi_dev_s; /* Forward reference */
enum spi_dev_e; /* Forward reference */
/************************************************************************************
* Name: imx_spibus_initialize
@ -118,42 +117,42 @@ FAR struct spi_dev_s *imx_spibus_initialize(int port);
************************************************************************************/
#ifdef CONFIG_IMX6_ECSPI1
void imx_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t imx_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void imx_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t imx_spi1status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int imx_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int imx_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif
#ifdef CONFIG_IMX6_ECSPI2
void imx_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t imx_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void imx_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t imx_spi2status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int imx_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int imx_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif
#ifdef CONFIG_IMX6_ECSPI3
void imx_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t imx_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void imx_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t imx_spi3status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int imx_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int imx_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif
#ifdef CONFIG_IMX6_ECSPI4
void imx_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t imx_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void imx_spi4select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t imx_spi4status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int imx_spi4cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int imx_spi4cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif
#ifdef CONFIG_IMX6_ECSPI5
void imx_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t imx_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void imx_spi5select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t imx_spi5status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int imx_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int imx_spi5cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif

21
arch/arm/src/kinetis/kinetis_spi.h
View File

@ -63,8 +63,7 @@ extern "C"
* Public Data
************************************************************************************/
struct spi_dev_s;
enum spi_dev_e;
struct spi_dev_s;
/****************************************************************************
* Public Function Prototypes
@ -115,24 +114,24 @@ FAR struct spi_dev_s *kinetis_spibus_initialize(int bus);
************************************************************************************/
#ifdef CONFIG_KINETIS_SPI0
void kinetis_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t kinetis_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void kinetis_spi0select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t kinetis_spi0status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int kinetis_spi0cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int kinetis_spi0cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif
#ifdef CONFIG_KINETIS_SPI1
void kinetis_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void kinetis_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int kinetis_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int kinetis_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif
#ifdef CONFIG_KINETIS_SPI2
void kinetis_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t kinetis_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void kinetis_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t kinetis_spi2status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int kinetis_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int kinetis_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif

13
arch/arm/src/kl/kl_spi.h
View File

@ -64,7 +64,6 @@ extern "C"
************************************************************************************/
struct spi_dev_s; /* Forward reference */
enum spi_dev_e; /* Forward reference */
/****************************************************************************
* Name: kl_spibus_initialize
@ -111,18 +110,18 @@ FAR struct spi_dev_s *kl_spibus_initialize(int port);
************************************************************************************/
#ifdef CONFIG_KL_SPI0
void kl_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t kl_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void kl_spi0select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t kl_spi0status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int kl_spi0cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int kl_spi0cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif
#ifdef CONFIG_KL_SPI1
void kl_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t kl_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void kl_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t kl_spi1status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int kl_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int kl_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif

6
arch/arm/src/lpc11xx/lpc11_spi.h
View File

@ -112,10 +112,10 @@ FAR struct spi_dev_s *lpc11_spibus_initialize(int port);
*
************************************************************************************/
void lpc11_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t lpc11_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void lpc11_spiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t lpc11_spistatus(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int lpc11_spicmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int lpc11_spicmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
/************************************************************************************

12
arch/arm/src/lpc11xx/lpc11_ssp.h
View File

@ -113,18 +113,18 @@ FAR struct spi_dev_s *lpc11_sspbus_initialize(int port);
************************************************************************************/
#ifdef CONFIG_LPC11_SSP0
void lpc11_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t lpc11_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void lpc11_ssp0select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t lpc11_ssp0status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int lpc11_ssp0cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int lpc11_ssp0cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif
#ifdef CONFIG_LPC11_SSP1
void lpc11_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t lpc11_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void lpc11_ssp1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t lpc11_ssp1status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int lpc11_ssp1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int lpc11_ssp1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif

7
arch/arm/src/lpc17xx/lpc17_spi.h
View File

@ -71,7 +71,6 @@ extern "C"
************************************************************************************/
struct spi_dev_s; /* Forward reference */
enum spi_dev_e; /* Forward reference */
/************************************************************************************
* Name: lpc17_spibus_initialize
@ -115,10 +114,10 @@ FAR struct spi_dev_s *lpc17_spibus_initialize(int port);
*
************************************************************************************/
void lpc17_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t lpc17_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void lpc17_spiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t lpc17_spistatus(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int lpc17_spicmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int lpc17_spicmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
/****************************************************************************

12
arch/arm/src/lpc17xx/lpc17_ssp.h
View File

@ -113,18 +113,18 @@ FAR struct spi_dev_s *lpc17_sspbus_initialize(int port);
************************************************************************************/
#ifdef CONFIG_LPC17_SSP0
void lpc17_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void lpc17_ssp0select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int lpc17_ssp0cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int lpc17_ssp0cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif
#ifdef CONFIG_LPC17_SSP1
void lpc17_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t lpc17_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void lpc17_ssp1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t lpc17_ssp1status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int lpc17_ssp1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int lpc17_ssp1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif

5
arch/arm/src/lpc2378/lpc23xx_spi.h
View File

@ -154,7 +154,6 @@
************************************************************************************/
struct spi_dev_s; /* Forward reference */
enum spi_dev_e; /* Forward reference */
/****************************************************************************
* Name: lpc23_spibus_initialize
@ -178,7 +177,7 @@ FAR struct spi_dev_s *lpc23_spibus_initialize(int port);
*
****************************************************************************/
void lpc23xx_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t lpc23xx_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void lpc23xx_spiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t lpc23xx_spistatus(FAR struct spi_dev_s *dev, uint32_t devid);
#endif /* __ARCH_ARM_SRC_LPC2378_LPC23XX_SPI_H */

8
arch/arm/src/lpc31xx/lpc31.h
View File

@ -185,8 +185,6 @@ void lpc31_clockconfig(void);
************************************************************************************/
struct spi_dev_s; /* Forward reference */
enum spi_dev_e; /* Forward reference */
FAR struct spi_dev_s *lpc31_spibus_initialize(int port);
/************************************************************************************
@ -218,10 +216,10 @@ FAR struct spi_dev_s *lpc31_spibus_initialize(int port);
*
************************************************************************************/
void lpc31_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t lpc31_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void lpc31_spiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t lpc31_spistatus(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int lpc31_spicmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int lpc31_spicmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
/************************************************************************************

14
arch/arm/src/lpc31xx/lpc31_spi.c
View File

@ -115,11 +115,11 @@ static inline uint16_t spi_readword(FAR struct lpc31_spidev_s *priv);
static inline void spi_writeword(FAR struct lpc31_spidev_s *priv, uint16_t word);
static int spi_lock(FAR struct spi_dev_s *dev, bool lock);
static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
static void spi_select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);
static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
static void spi_setbits(FAR struct spi_dev_s *dev, int nbits);
static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
static uint8_t spi_status(FAR struct spi_dev_s *dev, uint32_t devid);
static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t word);
static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
FAR void *rxbuffer, size_t nwords);
@ -482,7 +482,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
*
****************************************************************************/
static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
static void spi_select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
struct lpc31_spidev_s *priv = (struct lpc31_spidev_s *) dev;
uint8_t slave = 0;
@ -491,15 +491,15 @@ static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sel
* be in board specific code..... */
switch (devid)
{
case SPIDEV_FLASH:
case SPIDEV_FLASH(0):
slave = 0;
break;
case SPIDEV_MMCSD:
case SPIDEV_MMCSD(0):
slave = 1;
break;
case SPIDEV_ETHERNET:
case SPIDEV_ETHERNET(0):
slave = 2;
break;
@ -689,7 +689,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
*
****************************************************************************/
static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
static uint8_t spi_status(FAR struct spi_dev_s *dev, uint32_t devid)
{
/* FIXME: is there anyway to determine this
* it should probably be board dependant anyway */

2
arch/arm/src/lpc43xx/lpc43_spi.c
View File

@ -103,7 +103,7 @@ struct lpc43_spidev_s
/* SPI methods */
static int spi_lock(FAR struct spi_dev_s *dev, bool lock);
static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
static void spi_select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);
static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
static void spi_setbits(FAR struct spi_dev_s *dev, int nbits);

6
arch/arm/src/lpc43xx/lpc43_spi.h
View File

@ -122,11 +122,11 @@ FAR struct spi_dev_s *lpc43_spibus_initialize(int port);
*
************************************************************************************/
void lpc43_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t lpc43_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void lpc43_spiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t lpc43_spistatus(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int lpc43_spicmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int lpc43_spicmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
/************************************************************************************

12
arch/arm/src/lpc43xx/lpc43_ssp.h
View File

@ -121,18 +121,18 @@ FAR struct spi_dev_s *lpc43_sspbus_initialize(int port);
************************************************************************************/
#ifdef CONFIG_LPC43_SSP0
void lpc43_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t lpc43_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void lpc43_ssp0select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t lpc43_ssp0status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int lpc43_ssp0cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int lpc43_ssp0cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif
#ifdef CONFIG_LPC43_SSP1
void lpc43_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t lpc43_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void lpc43_ssp1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t lpc43_ssp1status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int lpc43_ssp1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int lpc43_ssp1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif

6
arch/arm/src/sam34/sam_spi.c
View File

@ -190,7 +190,7 @@ struct sam_spics_s
/* Type of board-specific SPI status function */
typedef void (*select_t)(enum spi_dev_e devid, bool selected);
typedef void (*select_t)(uint32_t devid, bool selected);
/* Chip select register offsetrs */
@ -272,7 +272,7 @@ static inline uintptr_t spi_regaddr(struct sam_spics_s *spics,
/* SPI methods */
static int spi_lock(struct spi_dev_s *dev, bool lock);
static void spi_select(struct spi_dev_s *dev, enum spi_dev_e devid,
static void spi_select(struct spi_dev_s *dev, uint32_t devid,
bool selected);
static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency);
static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode);
@ -916,7 +916,7 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
*
****************************************************************************/
static void spi_select(struct spi_dev_s *dev, enum spi_dev_e devid,
static void spi_select(struct spi_dev_s *dev, uint32_t devid,
bool selected)
{
struct sam_spics_s *spics = (struct sam_spics_s *)dev;

13
arch/arm/src/sam34/sam_spi.h
View File

@ -110,7 +110,6 @@ extern "C"
****************************************************************************/
struct spi_dev_s; /* Forward reference */
enum spi_dev_e; /* Forward reference */
/****************************************************************************
* Name: sam_spibus_initialize
@ -189,10 +188,10 @@ struct spi_dev_s *sam_spibus_initialize(int port);
****************************************************************************/
#ifdef CONFIG_SAM34_SPI0
void sam_spi0select(enum spi_dev_e devid, bool selected);
void sam_spi0select(uint32_t devid, bool selected);
#endif
#ifdef CONFIG_SAM34_SPI1
void sam_spi1select(enum spi_dev_e devid, bool selected);
void sam_spi1select(uint32_t devid, bool selected);
#endif
/****************************************************************************
@ -211,10 +210,10 @@ void sam_spi1select(enum spi_dev_e devid, bool selected);
****************************************************************************/
#ifdef CONFIG_SAM34_SPI0
uint8_t sam_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
uint8_t sam_spi0status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
#ifdef CONFIG_SAM34_SPI1
uint8_t sam_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
uint8_t sam_spi1status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
/****************************************************************************
@ -243,10 +242,10 @@ uint8_t sam_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
#ifdef CONFIG_SPI_CMDDATA
#ifdef CONFIG_SAM34_SPI0
int sam_spi0cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int sam_spi0cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef CONFIG_SAM34_SPI1
int sam_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int sam_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif

6
arch/arm/src/sama5/sam_spi.c
View File

@ -182,7 +182,7 @@ struct sam_spics_s
/* Type of board-specific SPI status fuction */
typedef void (*select_t)(enum spi_dev_e devid, bool selected);
typedef void (*select_t)(uint32_t devid, bool selected);
/* Chip select register offsetrs */
@ -263,7 +263,7 @@ static inline uintptr_t spi_physregaddr(struct sam_spics_s *spics,
/* SPI methods */
static int spi_lock(struct spi_dev_s *dev, bool lock);
static void spi_select(struct spi_dev_s *dev, enum spi_dev_e devid,
static void spi_select(struct spi_dev_s *dev, uint32_t devid,
bool selected);
static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency);
static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode);
@ -905,7 +905,7 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
*
****************************************************************************/
static void spi_select(struct spi_dev_s *dev, enum spi_dev_e devid,
static void spi_select(struct spi_dev_s *dev, uint32_t devid,
bool selected)
{
struct sam_spics_s *spics = (struct sam_spics_s *)dev;

13
arch/arm/src/sama5/sam_spi.h
View File

@ -104,7 +104,6 @@ extern "C"
****************************************************************************/
struct spi_dev_s; /* Forward reference */
enum spi_dev_e; /* Forward reference */
/****************************************************************************
* Name: sam_spibus_initialize
@ -182,10 +181,10 @@ struct spi_dev_s *sam_spibus_initialize(int port);
****************************************************************************/
#ifdef CONFIG_SAMA5_SPI0
void sam_spi0select(enum spi_dev_e devid, bool selected);
void sam_spi0select(uint32_t devid, bool selected);
#endif
#ifdef CONFIG_SAMA5_SPI1
void sam_spi1select(enum spi_dev_e devid, bool selected);
void sam_spi1select(uint32_t devid, bool selected);
#endif
/****************************************************************************
@ -204,10 +203,10 @@ void sam_spi1select(enum spi_dev_e devid, bool selected);
****************************************************************************/
#ifdef CONFIG_SAMA5_SPI0
uint8_t sam_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
uint8_t sam_spi0status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
#ifdef CONFIG_SAMA5_SPI1
uint8_t sam_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
uint8_t sam_spi1status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
/****************************************************************************
@ -236,10 +235,10 @@ uint8_t sam_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
#ifdef CONFIG_SPI_CMDDATA
#ifdef CONFIG_SAMA5_SPI0
int sam_spi0cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int sam_spi0cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef CONFIG_SAMA5_SPI1
int sam_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int sam_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif

37
arch/arm/src/samdl/sam_spi.h
View File

@ -87,7 +87,6 @@ extern "C"
****************************************************************************/
struct spi_dev_s; /* Forward reference */
enum spi_dev_e; /* Forward reference */
/****************************************************************************
* Name: sam_spibus_initialize
@ -168,32 +167,32 @@ struct spi_dev_s *sam_spibus_initialize(int port);
****************************************************************************/
#ifdef SAMDL_HAVE_SPI0
void sam_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void sam_spi0select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
#endif
#ifdef SAMDL_HAVE_SPI1
void sam_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void sam_spi1select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
#endif
#ifdef SAMDL_HAVE_SPI2
void sam_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void sam_spi2select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
#endif
#ifdef SAMDL_HAVE_SPI3
void sam_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void sam_spi3select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
#endif
#ifdef SAMDL_HAVE_SPI4
void sam_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void sam_spi4select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
#endif
#ifdef SAMDL_HAVE_SPI5
void sam_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void sam_spi5select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
#endif
@ -213,27 +212,27 @@ void sam_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
****************************************************************************/
#ifdef SAMDL_HAVE_SPI0
uint8_t sam_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
uint8_t sam_spi0status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
#ifdef SAMDL_HAVE_SPI1
uint8_t sam_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
uint8_t sam_spi1status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
#ifdef SAMDL_HAVE_SPI2
uint8_t sam_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
uint8_t sam_spi2status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
#ifdef SAMDL_HAVE_SPI3
uint8_t sam_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
uint8_t sam_spi3status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
#ifdef SAMDL_HAVE_SPI4
uint8_t sam_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
uint8_t sam_spi4status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
#ifdef SAMDL_HAVE_SPI5
uint8_t sam_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
uint8_t sam_spi5status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
/****************************************************************************
@ -262,27 +261,27 @@ uint8_t sam_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
#ifdef CONFIG_SPI_CMDDATA
#ifdef SAMDL_HAVE_SPI0
int sam_spi0cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int sam_spi0cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef SAMDL_HAVE_SPI1
int sam_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int sam_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef SAMDL_HAVE_SPI2
int sam_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int sam_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef SAMDL_HAVE_SPI3
int sam_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int sam_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef SAMDL_HAVE_SPI4
int sam_spi4cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int sam_spi4cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef SAMDL_HAVE_SPI5
int sam_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int sam_spi5cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif

6
arch/arm/src/samv7/sam_spi.c
View File

@ -181,7 +181,7 @@ struct sam_spics_s
/* Type of board-specific SPI status function */
typedef void (*select_t)(enum spi_dev_e devid, bool selected);
typedef void (*select_t)(uint32_t devid, bool selected);
/* Chip select register offsets */
@ -263,7 +263,7 @@ static inline uintptr_t spi_regaddr(struct sam_spics_s *spics,
/* SPI master methods */
static int spi_lock(struct spi_dev_s *dev, bool lock);
static void spi_select(struct spi_dev_s *dev, enum spi_dev_e devid,
static void spi_select(struct spi_dev_s *dev, uint32_t devid,
bool selected);
static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency);
#ifdef CONFIG_SPI_CS_DELAY_CONTROL
@ -943,7 +943,7 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
*
****************************************************************************/
static void spi_select(struct spi_dev_s *dev, enum spi_dev_e devid,
static void spi_select(struct spi_dev_s *dev, uint32_t devid,
bool selected)
{
struct sam_spics_s *spics = (struct sam_spics_s *)dev;

13
arch/arm/src/samv7/sam_spi.h
View File

@ -158,7 +158,6 @@ extern "C"
****************************************************************************/
struct spi_dev_s; /* Forward reference */
enum spi_dev_e; /* Forward reference */
struct spi_sctrlr_s; /* Forward reference */
/****************************************************************************
@ -255,10 +254,10 @@ FAR struct spi_sctrlr_s *sam_spi_slave_initialize(int port);
****************************************************************************/
#ifdef CONFIG_SAMV7_SPI0_MASTER
void sam_spi0select(enum spi_dev_e devid, bool selected);
void sam_spi0select(uint32_t devid, bool selected);
#endif
#ifdef CONFIG_SAMV7_SPI1_MASTER
void sam_spi1select(enum spi_dev_e devid, bool selected);
void sam_spi1select(uint32_t devid, bool selected);
#endif
/****************************************************************************
@ -277,10 +276,10 @@ void sam_spi1select(enum spi_dev_e devid, bool selected);
****************************************************************************/
#ifdef CONFIG_SAMV7_SPI0
uint8_t sam_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
uint8_t sam_spi0status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
#ifdef CONFIG_SAMV7_SPI1
uint8_t sam_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
uint8_t sam_spi1status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
/****************************************************************************
@ -309,10 +308,10 @@ uint8_t sam_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
#ifdef CONFIG_SPI_CMDDATA
#ifdef CONFIG_SAMV7_SPI0_MASTER
int sam_spi0cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int sam_spi0cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef CONFIG_SAMV7_SPI1_MASTER
int sam_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int sam_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif /* CONFIG_SPI_CMDDATA */

12
arch/arm/src/stm32/stm32_rcc.h
View File

@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32_STM32_RRC_H
#define __ARCH_ARM_SRC_STM32_STM32_RRC_H
#ifndef __ARCH_ARM_SRC_STM32_STM32_RCC_H
#define __ARCH_ARM_SRC_STM32_STM32_RCC_H
/************************************************************************************
* Included Files
@ -299,11 +299,7 @@ void stm32_clockenable(void);
* Name: stm32_rcc_enablelse
*
* Description:
* Enable the External Low-Speed (LSE) Oscillator and, if the RTC is
* configured, setup the LSE as the RTC clock source, and enable the RTC.
*
* For the STM32L15X family, this will also select the LSE as the clock source of
* the LCD.
* Enable the External Low-Speed (LSE) Oscillator.
*
* Input Parameters:
* None
@ -340,4 +336,4 @@ void stm32_rcc_disablelsi(void);
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_STM32_STM32_RRC_H */
#endif /* __ARCH_ARM_SRC_STM32_STM32_RCC_H */

39
arch/arm/src/stm32/stm32_spi.h
View File

@ -64,8 +64,7 @@ extern "C"
* Public Data
************************************************************************************/
struct spi_dev_s;
enum spi_dev_e;
struct spi_dev_s;
/************************************************************************************
* Public Functions
@ -117,39 +116,39 @@ FAR struct spi_dev_s *stm32_spibus_initialize(int bus);
************************************************************************************/
#ifdef CONFIG_STM32_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid);
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef CONFIG_STM32_SPI2
void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid);
int stm32_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef CONFIG_STM32_SPI3
void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, uint32_t devid);
int stm32_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef CONFIG_STM32_SPI4
void stm32_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
int stm32_spi4cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
void stm32_spi4select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, uint32_t devid);
int stm32_spi4cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef CONFIG_STM32_SPI5
void stm32_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
int stm32_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
void stm32_spi5select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, uint32_t devid);
int stm32_spi5cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef CONFIG_STM32_SPI6
void stm32_spi6select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t stm32_spi6status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
int stm32_spi6cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
void stm32_spi6select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t stm32_spi6status(FAR struct spi_dev_s *dev, uint32_t devid);
int stm32_spi6cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
/************************************************************************************

2
arch/arm/src/stm32/stm32_waste.h
View File

@ -76,4 +76,4 @@ void up_waste(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_STM32_STM32_RRC_H */
#endif /* __ARCH_ARM_SRC_STM32_STM32_WASTE_H */

115
arch/arm/src/stm32f0/chip/stm32f0_flash.h Normal file
View File

@ -0,0 +1,115 @@
/************************************************************************************
* arch/arm/src/stm32/chip/stm32f0_flash.h
*
* Copyright (C) 20017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0_CHIP_STM32F0_FLASH_H
#define __ARCH_ARM_SRC_STM32F0_CHIP_STM32F0_FLASH_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Register Offsets *****************************************************************/
#define STM32_FLASH_ACR_OFFSET 0x0000
#define STM32_FLASH_KEYR_OFFSET 0x0004
#define STM32_FLASH_OPTKEYR_OFFSET 0x0008
#define STM32_FLASH_SR_OFFSET 0x000c
#define STM32_FLASH_CR_OFFSET 0x0010
#define STM32_FLASH_AR_OFFSET 0x0014
#define STM32_FLASH_OBR_OFFSET 0x001c
#define STM32_FLASH_WRPR_OFFSET 0x0020
/* Register Addresses ***************************************************************/
#define STM32_FLASH_ACR (STM32F0_FLASHIF_BASE+STM32_FLASH_ACR_OFFSET)
#define STM32_FLASH_KEYR (STM32F0_FLASHIF_BASE+STM32_FLASH_KEYR_OFFSET)
#define STM32_FLASH_OPTKEYR (STM32F0_FLASHIF_BASE+STM32_FLASH_OPTKEYR_OFFSET)
#define STM32_FLASH_SR (STM32F0_FLASHIF_BASE+STM32_FLASH_SR_OFFSET)
#define STM32_FLASH_CR (STM32F0_FLASHIF_BASE+STM32_FLASH_CR_OFFSET)
#define STM32_FLASH_AR (STM32F0_FLASHIF_BASE+STM32_FLASH_AR_OFFSET)
#define STM32_FLASH_OBR (STM32F0_FLASHIF_BASE+STM32_FLASH_OBR_OFFSET)
#define STM32_FLASH_WRPR (STM32F0_FLASHIF_BASE+STM32_FLASH_WRPR_OFFSET)
/* Register Bitfield Definitions ****************************************************/
/* Flash Access Control Register (ACR) */
#define FLASH_ACR_LATENCY_SHIFT (0)
#define FLASH_ACR_LATENCY_MASK (7 << FLASH_ACR_LATENCY_SHIFT)
# define FLASH_ACR_LATENCY(n) ((n) << FLASH_ACR_LATENCY_SHIFT) /* n wait states */
# define FLASH_ACR_LATENCY_0 (0 << FLASH_ACR_LATENCY_SHIFT) /* 000: Zero wait states */
# define FLASH_ACR_LATENCY_1 (1 << FLASH_ACR_LATENCY_SHIFT) /* 001: One wait state */
#define FLASH_ACR_PRTFBE (1 << 4) /* Bit 4: FLASH prefetch enable */
#define FLASH_ACR_PRFTBS (1 << 5) /* Bit 5: FLASH Prefetch buffer status */
/* Flash Status Register (SR) */
#define FLASH_SR_BSY (1 << 0) /* Bit 0: Busy */
#define FLASH_SR_PGERR (1 << 2) /* Bit 2: Programming Error */
#define FLASH_SR_WRPRT_ERR (1 << 4) /* Bit 3: Write Protection Error */
#define FLASH_SR_EOP (1 << 5) /* Bit 4: End of Operation */
/* Flash Control Register (CR) */
#define FLASH_CR_PG (1 << 0) /* Bit 0: Program Page */
#define FLASH_CR_PER (1 << 1) /* Bit 1: Page Erase */
#define FLASH_CR_MER (1 << 2) /* Bit 2: Mass Erase */
#define FLASH_CR_OPTPG (1 << 4) /* Bit 4: Option Byte Programming */
#define FLASH_CR_OPTER (1 << 5) /* Bit 5: Option Byte Erase */
#define FLASH_CR_STRT (1 << 6) /* Bit 6: Start Erase */
#define FLASH_CR_LOCK (1 << 7) /* Bit 7: Page Locked or Lock Page */
#define FLASH_CR_OPTWRE (1 << 9) /* Bit 8: Option Bytes Write Enable */
#define FLASH_CR_ERRIE (1 << 10) /* Bit 10: Error Interrupt Enable */
#define FLASH_CR_EOPIE (1 << 12) /* Bit 12: End of Program Interrupt Enable */
#define FLASH_CR_OBLLAUNCH (1 << 13) /* Bit 13: Force option byte loading */
/* Flash Option byte register */
#define FLASH_OBR_ /* To be provided */
/************************************************************************************
* Public Functions
************************************************************************************/
void stm32_flash_lock(void);
void stm32_flash_unlock(void);
#endif /* __ARCH_ARM_SRC_STM32F0_CHIP_STM32F0_FLASH_H */

8
arch/arm/src/stm32f0/chip/stm32f0_rcc.h
View File

@ -124,15 +124,17 @@
# define RCC_CFGR_PPRE1_HCLKd4 (5 << RCC_CFGR_PPRE1_SHIFT) /* 101: HCLK divided by 4 */
# define RCC_CFGR_PPRE1_HCLKd8 (6 << RCC_CFGR_PPRE1_SHIFT) /* 110: HCLK divided by 8 */
# define RCC_CFGR_PPRE1_HCLKd16 (7 << RCC_CFGR_PPRE1_SHIFT) /* 111: HCLK divided by 16 */
/* Bits 13-11: Reserve. Keep the reset value */
/* Bits 13-11: Reserve. Keep the reset value */
#define RCC_CFGR_ADCPRE (1 << 14) /* Bit 14: ADC prescaler, Obsolete use ADC_CFGR2 */
#define RCC_CFGR_PLLSRC_SHIFT (15) /* Bit 15: PLL input clock source */
#define RCC_CFGR_PLLSRC_SHIFT (15) /* Bit 15: PLL input clock source */
#define RCC_CFGR_PLLSRC_MASK (3 << RCC_CFGR_PLLSRC_SHIFT)
# define RCC_CFGR_PLLSRC_HSId2 (0 << RCC_CFGR_PLLSRC_SHIFT) /* 00: HSI/2 as PLL input clock */
# define RCC_CFGR_PLLSRC_HS1_PREDIV (1 << RCC_CFGR_PLLSRC_SHIFT) /* 01: HSE/PREDIV as PLL input clock */
# define RCC_CFGR_PLLSRC_HSE_PREDIV (2 << RCC_CFGR_PLLSRC_SHIFT) /* 10: HSE/PREDIV as PLL input clock */
# define RCC_CFGR_PLLSRC_HSI48_PREDIV (3 << RCC_CFGR_PLLSRC_SHIFT) /* 11: HSI48/PREDIV as PLL input clock */
#define RCC_CFGR_PLLXTPRE (1 << 17) /* Bit 17: HSE divider for PLL entry */
#define RCC_CFGR_PLLXTPRE_MASK (1 << 17) /* Bit 17: HSE divider for PLL entry */
# define RCC_CFGR_PLLXTPRE_DIV1 (0 << 17) /* 0=No divistion */
# define RCC_CFGR_PLLXTPRE_DIV2 (1 << 17) /* 1=Divide by two */
#define RCC_CFGR_PLLMUL_SHIFT (18) /* Bits 21-18: PLL Multiplication Factor */
#define RCC_CFGR_PLLMUL_MASK (0x0f << RCC_CFGR_PLLMUL_SHIFT)
# define RCC_CFGR_PLLMUL_CLKx2 (0 << RCC_CFGR_PLLMUL_SHIFT) /* 0000: PLL input clock x 2 */

31
arch/arm/src/stm32f0/stm32f0_clockconfig.c
View File

@ -51,6 +51,7 @@
#include "stm32f0_rcc.h"
#include "stm32f0_clockconfig.h"
#include "chip/stm32f0_syscfg.h"
#include "chip/stm32f0_flash.h"
#include "chip/stm32f0_gpio.h"
/****************************************************************************
@ -91,11 +92,35 @@ void stm32f0_clockconfig(void)
putreg32(regval, STM32F0_RCC_CR);
while ((getreg32(STM32F0_RCC_CR) & RCC_CR_PLLRDY) != 0);
/* Configure the PLL. Multiply the HSI to get System Clock */
/* Enable FLASH prefetch buffer and set flash latency */
regval = getreg32(STM32_FLASH_ACR);
regval &= ~FLASH_ACR_LATENCY_MASK;
regval |= (FLASH_ACR_LATENCY_1 | FLASH_ACR_PRTFBE);
putreg32(regval, STM32_FLASH_ACR);
/* Set HCLK = SYSCLK */
regval = getreg32(STM32F0_RCC_CFGR);
regval &= ~RCC_CFGR_PLLMUL_MASK;
regval |= STM32F0_CFGR_PLLMUL;
regval &= ~RCC_CFGR_HPRE_MASK;
regval |= RCC_CFGR_HPRE_SYSCLK;
putreg32(regval, STM32F0_RCC_CFGR);
/* Set PCLK = HCLK */
regval &= ~RCC_CFGR_PPRE1_MASK;
regval |= RCC_CFGR_PPRE1_HCLK;
putreg32(regval, STM32F0_RCC_CFGR);
/* Configure the PLL to generate the system clock
*
* 1. Use source = HSI/2
* 2. Use PREDIV = 1
* 3. Use multiplier from board.h
*/
regval &= ~(RCC_CFGR_PLLSRC_MASK | RCC_CFGR_PLLXTPRE_MASK | RCC_CFGR_PLLMUL_MASK);
regval |= (RCC_CFGR_PLLSRC_HSId2 | RCC_CFGR_PLLXTPRE_DIV1 | STM32F0_CFGR_PLLMUL);
putreg32(regval, STM32F0_RCC_CFGR);
/* Enable the PLL */

24
arch/arm/src/stm32f0/stm32f0_serial.c
View File

@ -552,7 +552,7 @@ static struct stm32f0_serial_s g_usart3priv =
.priv = &g_usart3priv,
},
.irq = STM32F0_IRQ_USART3,
.irq = STM32F0_IRQ_USART345678,
.parity = CONFIG_USART3_PARITY,
.bits = CONFIG_USART3_BITS,
.stopbits2 = CONFIG_USART3_2STOP,
@ -613,7 +613,7 @@ static struct stm32f0_serial_s g_usart4priv =
.priv = &g_usart4priv,
},
.irq = STM32F0_IRQ_USART4,
.irq = STM32F0_IRQ_USART345678,
.parity = CONFIG_USART4_PARITY,
.bits = CONFIG_USART4_BITS,
.stopbits2 = CONFIG_USART4_2STOP,
@ -678,7 +678,7 @@ static struct stm32f0_serial_s g_usart5priv =
.priv = &g_usart5priv,
},
.irq = STM32F0_IRQ_USART5,
.irq = STM32F0_IRQ_USART345678,
.parity = CONFIG_USART5_PARITY,
.bits = CONFIG_USART5_BITS,
.stopbits2 = CONFIG_USART5_2STOP,
@ -1029,32 +1029,32 @@ static void stm32f0serial_setapbclock(FAR struct uart_dev_s *dev, bool on)
return;
#ifdef CONFIG_STM32F0_USART1
case STM32F0_USART1_BASE:
rcc_en = RCC_APB2ENR_USART1EN;
rcc_en = RCC_APB2ENR_USART1EN;
regaddr = STM32F0_RCC_APB2ENR;
break;
#endif
#ifdef CONFIG_STM32F0_USART2
case STM32F0_USART2_BASE:
rcc_en = RCC_APB1ENR_USART2EN;
regaddr =STM32F0_RCC_APB1ENR;
rcc_en = RCC_APB1ENR_USART2EN;
regaddr = STM32F0_RCC_APB1ENR;
break;
#endif
#ifdef CONFIG_STM32F0_USART3
case STM32F0_USART3_BASE:
rcc_en = RCC_APB1ENR_USART3EN;
regaddr =STM32F0_RCC_APB1ENR;
rcc_en = RCC_APB1ENR_USART3EN;
regaddr = STM32F0_RCC_APB1ENR;
break;
#endif
#ifdef CONFIG_STM32F0_USART4
case STM32F0_USART4_BASE:
rcc_en = RCC_APB1ENR_USART4EN;
regaddr =STM32F0_RCC_APB1ENR;
rcc_en = RCC_APB1ENR_USART4EN;
regaddr = STM32F0_RCC_APB1ENR;
break;
#endif
#ifdef CONFIG_STM32F0_USART5
case STM32F0_USART5_BASE:
rcc_en = RCC_APB1ENR_USART5EN;
regaddr =STM32F0_RCC_APB1ENR;
rcc_en = RCC_APB1ENR_USART5EN;
regaddr = STM32F0_RCC_APB1ENR;
break;
#endif
}

12
arch/arm/src/stm32f7/stm32_rcc.h
View File

@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F7_STM32_RRC_H
#define __ARCH_ARM_SRC_STM32F7_STM32_RRC_H
#ifndef __ARCH_ARM_SRC_STM32F7_STM32_RCC_H
#define __ARCH_ARM_SRC_STM32F7_STM32_RCC_H
/************************************************************************************
* Included Files
@ -211,11 +211,7 @@ void stm32_clockenable(void);
* Name: stm32_rcc_enablelse
*
* Description:
* Enable the External Low-Speed (LSE) Oscillator and, if the RTC is
* configured, setup the LSE as the RTC clock source, and enable the RTC.
*
* For the STM32L15X family, this will also select the LSE as the clock source of
* the LCD.
* Enable the External Low-Speed (LSE) Oscillator.
*
* Input Parameters:
* None
@ -252,4 +248,4 @@ void stm32_rcc_disablelsi(void);
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_STM32F7_STM32_RRC_H */
#endif /* __ARCH_ARM_SRC_STM32F7_STM32_RCC_H */

39
arch/arm/src/stm32f7/stm32_spi.h
View File

@ -63,8 +63,7 @@ extern "C"
#define EXTERN extern
#endif
struct spi_dev_s; /* Forward reference */
enum spi_dev_e; /* Forward reference */
struct spi_dev_s; /* Forward reference */
/************************************************************************************
* Name: stm32_spibus_initialize
@ -112,39 +111,39 @@ FAR struct spi_dev_s *stm32_spibus_initialize(int bus);
************************************************************************************/
#ifdef CONFIG_STM32F7_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid);
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef CONFIG_STM32F7_SPI2
void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid);
int stm32_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef CONFIG_STM32F7_SPI3
void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, uint32_t devid);
int stm32_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef CONFIG_STM32F7_SPI4
void stm32_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
int stm32_spi4cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
void stm32_spi4select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, uint32_t devid);
int stm32_spi4cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef CONFIG_STM32F7_SPI5
void stm32_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
int stm32_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
void stm32_spi5select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, uint32_t devid);
int stm32_spi5cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef CONFIG_STM32F7_SPI6
void stm32_spi6select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t stm32_spi6status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
int stm32_spi6cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
void stm32_spi6select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t stm32_spi6status(FAR struct spi_dev_s *dev, uint32_t devid);
int stm32_spi6cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
/************************************************************************************

10
arch/arm/src/stm32l4/Kconfig
View File

@ -116,6 +116,7 @@ config STM32L4_STM32L496XX
select STM32L4_HAVE_I2C4
select STM32L4_HAVE_CAN2
select STM32L4_HAVE_DCMI
select STM32L4_HAVE_DMA2D
choice
prompt "Embedded FLASH size"
@ -184,6 +185,10 @@ config STM32L4_HAVE_DCMI
bool
default n
config STM32L4_HAVE_DMA2D
bool
default n
config STM32L4_HAVE_HASH
bool
default n
@ -307,6 +312,11 @@ config STM32L4_DCMI
default n
depends on STM32L4_HAVE_DCMI
config STM32L4_DMA2D
bool "DMA2D"
default n
depends on STM32L4_HAVE_DMA2D
config STM32L4_HASH
bool "HASH"
default n

33
arch/arm/src/stm32l4/README.txt
View File

@ -1,9 +1,7 @@
This is a port of NuttX to the STM32L4 Family
Used development board is the Nucleo L476RG, STM32L4VGDiscovery
The status is HIGHLY EXPERIMENTAL.
OSTEST application works, but drivers are not complete.
Used development boards are the Nucleo L476RG, Nucleo L496ZG and
STM32L4VGDiscovery
Most code is copied and adapted from the STM32 Port.
@ -24,16 +22,20 @@ RCC : All registers defined, peripherals enabled, basic clock working
SYSCTL : All registers defined
USART : Working in normal mode (no DMA, to be tested, code is written)
DMA : works; at least tested with QSPI
SRAM2 : OK; can be included in MM region or left separate for special app purposes
SRAM2 : OK; can be included in MM region or left separate for special app
: purposes
FIREWALL : Code written, to be tested, requires support from ldscript
SPI : Code written, to be tested, including DMA
I2C : Code written, to be tested (I2C4 missing)
SPI : OK, tested (Including DMA)
I2C : Code written, to be tested
RTC : works
QSPI : works in polling, interrupt, DMA, and also memory-mapped modes
CAN : TODO
OTGFS : dev implemented, tested, outstanding issue with CDCACM (ACM_SET_LINE_CODING, but otherwise works);
: host implemented, only build smoke-tested (i.e. builds, but no functional testing yet)
Timers : Implemented, with PWM oneshot and freerun, tickless OS support. Limited testing (focused on tickless OS so far)
CAN : OK, tested
OTGFS : dev implemented, tested, outstanding issue with CDCACM
: (ACM_SET_LINE_CODING, but otherwise works); host implemented,
: only build smoke-tested (i.e. builds, but no functional testing
: yet)
Timers : Implemented, with PWM oneshot and freerun, tickless OS support.
: Limited testing (focused on tickless OS so far), PWM and QE tested OK.
PM : TODO, PWR registers defined
FSMC : TODO
AES : TODO
@ -46,17 +48,20 @@ ADC : TODO
DAC : TODO
New peripherals with implementation to be written from scratch
These are Low Priority TODO items, unless someone requests or contributes it.
These are Low Priority TODO items, unless someone requests or contributes
it.
TSC : TODO (Touch Screen Controller)
SWP : TODO (Single wire protocol master, to connect with NFC enabled SIM cards)
SWP : TODO (Single wire protocol master, to connect with NFC enabled
: SIM cards)
LPUART : TODO (Low power UART working with LSE at low baud rates)
LPTIMER : TODO (Low power TIMER)
OPAMP : TODO (Analog operational amplifier)
COMP : TODO (Analog comparators)
COMP : There is some code (Analog comparators)
DFSDM : TODO (Digital Filter and Sigma-Delta Modulator)
LCD : TODO (Segment LCD controller)
SAIPLL : works (PLL For Digital Audio interfaces, and other things)
SAI : TODO (Digital Audio interfaces, I2S, SPDIF, etc)
HASH : TODO (SHA-1, SHA-224, SHA-256, HMAC)
DCMI : TODO (Digital Camera interfaces)
DMA2D : TODO (Chrom-Art Accelerator for image manipulation)

5
arch/arm/src/stm32l4/chip/stm32l4_exti.h
View File

@ -49,8 +49,8 @@
#define STM32L4_NEXTI1 31
#define STM32L4_EXTI1_MASK 0xffffffff
#define STM32L4_NEXTI2 8
#define STM32L4_EXTI2_MASK 0x000000ff
#define STM32L4_NEXTI2 9
#define STM32L4_EXTI2_MASK 0x000001ff
#define STM32L4_EXTI1_BIT(n) (1 << (n))
#define STM32L4_EXTI2_BIT(n) (1 << (n))
@ -114,6 +114,7 @@
#define EXTI2_PVM3 (1 << 5) /* EXTI line 37 is connected to the PVM3 wakeup */
#define EXTI2_PVM4 (1 << 6) /* EXTI line 38 is connected to the PVM4 wakeup */
#define EXTI2_LCD (1 << 7) /* EXTI line 39 is connected to the LCD wakeup */
#define EXTI2_I2C4 (1 << 8) /* EXTI line 40 is connected to the I2C4 wakeup */
/* Interrupt mask register */

49
arch/arm/src/stm32l4/chip/stm32l4_syscfg.h
View File

@ -63,6 +63,7 @@
#define STM32L4_SYSCFG_CFGR2_OFFSET 0x001c /* SYSCFG configuration register 2 */
#define STM32L4_SYSCFG_SWPR_OFFSET 0x0020 /* SYSCFG SRAM2 write protection register */
#define STM32L4_SYSCFG_SKR_OFFSET 0x0024 /* SYSCFG SRAM2 key register */
#define STM32L4_SYSCFG_SWPR2_OFFSET 0x0028 /* SYSCFG SRAM2 write protection register 2 */
/* Register Addresses *******************************************************************************/
@ -100,8 +101,9 @@
#define SYSCFG_CFGR1_I2C_PB8_FMP (1 << 18) /* Bit 18: Fast-mode Plus (Fm+) driving capability activation on PB8 */
#define SYSCFG_CFGR1_I2C_PB9_FMP (1 << 19) /* Bit 19: Fast-mode Plus (Fm+) driving capability activation on PB9 */
#define SYSCFG_CFGR1_I2C1_FMP (1 << 20) /* Bit 20: I2C1 Fast-mode Plus (Fm+) driving capability activation */
#define SYSCFG_CFGR1_I2C2_FMP (1 << 21) /* Bit 21: I2C1 Fast-mode Plus (Fm+) driving capability activation */
#define SYSCFG_CFGR1_I2C3_FMP (1 << 22) /* Bit 22: I2C1 Fast-mode Plus (Fm+) driving capability activation */
#define SYSCFG_CFGR1_I2C2_FMP (1 << 21) /* Bit 21: I2C2 Fast-mode Plus (Fm+) driving capability activation */
#define SYSCFG_CFGR1_I2C3_FMP (1 << 22) /* Bit 22: I2C3 Fast-mode Plus (Fm+) driving capability activation */
#define SYSCFG_CFGR1_I2C4_FMP (1 << 23) /* Bit 23: I2C4 Fast-mode Plus (Fm+) driving capability activation */
#define SYSCFG_CFGR1_FPU_IE0 (1 << 26) /* Bit 26: FPU Invalid operation interrupt enable */
#define SYSCFG_CFGR1_FPU_IE1 (1 << 27) /* Bit 27: FPU Divide-by-zero interrupt enable */
#define SYSCFG_CFGR1_FPU_IE2 (1 << 28) /* Bit 28: FPU Underflow interrupt enable */
@ -118,45 +120,47 @@
#define SYSCFG_EXTICR_PORTE (4) /* 0100: PE[x] pin */
#define SYSCFG_EXTICR_PORTF (5) /* 0101: PF[C] pin */
#define SYSCFG_EXTICR_PORTG (6) /* 0110: PG[x] pin */
#define SYSCFG_EXTICR_PORTH (7) /* 0111: PH[x] pin (only on STM32L496xx/4A6xx) */
#define SYSCFG_EXTICR_PORTI (8) /* 1000: PI[x] pin (only on STM32L496xx/4A6xx) */
#define SYSCFG_EXTICR_PORT_MASK (7)
#define SYSCFG_EXTICR_PORT_MASK (15)
#define SYSCFG_EXTICR_EXTI_SHIFT(g) (((g) & 3) << 2)
#define SYSCFG_EXTICR_EXTI_MASK(g) (SYSCFG_EXTICR_PORT_MASK << (SYSCFG_EXTICR_EXTI_SHIFT(g)))
#define SYSCFG_EXTICR1_EXTI0_SHIFT (0) /* Bits 0-2: EXTI 0 coinfiguration */
#define SYSCFG_EXTICR1_EXTI0_SHIFT (0) /* Bits 0-2: EXTI 0 configuration */
#define SYSCFG_EXTICR1_EXTI0_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR1_EXTI0_SHIFT)
#define SYSCFG_EXTICR1_EXTI1_SHIFT (4) /* Bits 4-6: EXTI 1 coinfiguration */
#define SYSCFG_EXTICR1_EXTI1_SHIFT (4) /* Bits 4-6: EXTI 1 configuration */
#define SYSCFG_EXTICR1_EXTI1_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR1_EXTI1_SHIFT)
#define SYSCFG_EXTICR1_EXTI2_SHIFT (8) /* Bits 8-10: EXTI 2 coinfiguration */
#define SYSCFG_EXTICR1_EXTI2_SHIFT (8) /* Bits 8-10: EXTI 2 configuration */
#define SYSCFG_EXTICR1_EXTI2_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR1_EXTI2_SHIFT)
#define SYSCFG_EXTICR1_EXTI3_SHIFT (12) /* Bits 12-14: EXTI 3 coinfiguration */
#define SYSCFG_EXTICR1_EXTI3_SHIFT (12) /* Bits 12-14: EXTI 3 configuration */
#define SYSCFG_EXTICR1_EXTI3_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR1_EXTI3_SHIFT)
#define SYSCFG_EXTICR2_EXTI4_SHIFT (0) /* Bits 0-2: EXTI 4 coinfiguration */
#define SYSCFG_EXTICR2_EXTI4_SHIFT (0) /* Bits 0-2: EXTI 4 configuration */
#define SYSCFG_EXTICR2_EXTI4_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR2_EXTI4_SHIFT)
#define SYSCFG_EXTICR2_EXTI5_SHIFT (4) /* Bits 4-6: EXTI 5 coinfiguration */
#define SYSCFG_EXTICR2_EXTI5_SHIFT (4) /* Bits 4-6: EXTI 5 configuration */
#define SYSCFG_EXTICR2_EXTI5_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR2_EXTI5_SHIFT)
#define SYSCFG_EXTICR2_EXTI6_SHIFT (8) /* Bits 8-10: EXTI 6 coinfiguration */
#define SYSCFG_EXTICR2_EXTI6_SHIFT (8) /* Bits 8-10: EXTI 6 configuration */
#define SYSCFG_EXTICR2_EXTI6_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR2_EXTI6_SHIFT)
#define SYSCFG_EXTICR2_EXTI7_SHIFT (12) /* Bits 12-14: EXTI 7 coinfiguration */
#define SYSCFG_EXTICR2_EXTI7_SHIFT (12) /* Bits 12-14: EXTI 7 configuration */
#define SYSCFG_EXTICR2_EXTI7_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR2_EXTI7_SHIFT)
#define SYSCFG_EXTICR3_EXTI8_SHIFT (0) /* Bits 0-2: EXTI 8 coinfiguration */
#define SYSCFG_EXTICR3_EXTI8_SHIFT (0) /* Bits 0-2: EXTI 8 configuration */
#define SYSCFG_EXTICR3_EXTI8_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR3_EXTI8_SHIFT)
#define SYSCFG_EXTICR3_EXTI9_SHIFT (4) /* Bits 4-6: EXTI 9 coinfiguration */
#define SYSCFG_EXTICR3_EXTI9_SHIFT (4) /* Bits 4-6: EXTI 9 configuration */
#define SYSCFG_EXTICR3_EXTI9_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR3_EXTI9_SHIFT)
#define SYSCFG_EXTICR3_EXTI10_SHIFT (8) /* Bits 8-10: EXTI 10 coinfiguration */
#define SYSCFG_EXTICR3_EXTI10_SHIFT (8) /* Bits 8-10: EXTI 10 configuration */
#define SYSCFG_EXTICR3_EXTI10_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR3_EXTI10_SHIFT)
#define SYSCFG_EXTICR3_EXTI11_SHIFT (12) /* Bits 12-14: EXTI 11 coinfiguration */
#define SYSCFG_EXTICR3_EXTI11_SHIFT (12) /* Bits 12-14: EXTI 11 configuration */
#define SYSCFG_EXTICR3_EXTI11_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR3_EXTI11_SHIFT)
#define SYSCFG_EXTICR4_EXTI12_SHIFT (0) /* Bits 0-2: EXTI 12 coinfiguration */
#define SYSCFG_EXTICR4_EXTI12_SHIFT (0) /* Bits 0-2: EXTI 12 configuration */
#define SYSCFG_EXTICR4_EXTI12_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR4_EXTI12_SHIFT)
#define SYSCFG_EXTICR4_EXTI13_SHIFT (4) /* Bits 4-6: EXTI 13 coinfiguration */
#define SYSCFG_EXTICR4_EXTI13_SHIFT (4) /* Bits 4-6: EXTI 13 configuration */
#define SYSCFG_EXTICR4_EXTI13_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR4_EXTI13_SHIFT)
#define SYSCFG_EXTICR4_EXTI14_SHIFT (8) /* Bits 8-10: EXTI 14 coinfiguration */
#define SYSCFG_EXTICR4_EXTI14_SHIFT (8) /* Bits 8-10: EXTI 14 configuration */
#define SYSCFG_EXTICR4_EXTI14_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR4_EXTI14_SHIFT)
#define SYSCFG_EXTICR4_EXTI15_SHIFT (12) /* Bits 12-14: EXTI 15 coinfiguration */
#define SYSCFG_EXTICR4_EXTI15_SHIFT (12) /* Bits 12-14: EXTI 15 configuration */
#define SYSCFG_EXTICR4_EXTI15_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR4_EXTI15_SHIFT)
/* SYSCFG SRAM2 control and status register */
@ -173,13 +177,16 @@
#define SYSCFG_CFGR2_SPF (1 << 8) /* Bit 8: SRAM2 parity error flag */
/* SYSCFG SRAM2 write protection register */
/* There is one bit per SRAM2 page */
/* There is one bit per SRAM2 page (0 to 31) */
/* SYSCFG SRAM2 key register */
#define SYSCFG_SKR_SHIFT 0
#define SYSCFG_SKR_MASK (0xFF << SYSCFG_SKR_SHIFT)
#endif /* CONFIG_STM32L4_STM32L476XX || CONFIG_STM32L4_STM32L486XX */
/* SYSCFG SRAM2 write protection register 2 (only on STM32L496xx/4A6xx) */
/* There is one bit per SRAM2 page (32 to 63) */
#endif /* CONFIG_STM32L4_STM32L476XX || CONFIG_STM32L4_STM32L486XX || CONFIG_STM32L4_STM32L496XX */
#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_SYSCFG_H */

12
arch/arm/src/stm32l4/chip/stm32l4x6xx_dma.h
View File

@ -343,6 +343,11 @@
#define DMACHAN_DAC2 DMACHAN_SETTING(STM32L4_DMA2_CHAN5, 3)
/* DCMI */
#define DMACHAN_DCMI_1 DMACHAN_SETTING(STM32L4_DMA2_CHAN5, 4)
#define DMACHAN_DCMI_2 DMACHAN_SETTING(STM32L4_DMA2_CHAN6, 0)
/* DFSDM */
#define DMACHAN_DFSDM0 DMACHAN_SETTING(STM32L4_DMA1_CHAN4, 0)
@ -350,6 +355,10 @@
#define DMACHAN_DFSDM2 DMACHAN_SETTING(STM32L4_DMA1_CHAN6, 0)
#define DMACHAN_DFSDM3 DMACHAN_SETTING(STM32L4_DMA1_CHAN7, 0)
/* HASH */
#define DMACHAN_HASH_IN DMACHAN_SETTING(STM32L4_DMA2_CHAN7, 6)
/* I2C */
#define DMACHAN_I2C1_RX_1 DMACHAN_SETTING(STM32L4_DMA1_CHAN7, 3)
@ -363,6 +372,9 @@
#define DMACHAN_I2C3_RX DMACHAN_SETTING(STM32L4_DMA1_CHAN3, 2)
#define DMACHAN_I2C3_TX DMACHAN_SETTING(STM32L4_DMA1_CHAN2, 3)
#define DMACHAN_I2C4_RX DMACHAN_SETTING(STM32L4_DMA2_CHAN1, 0)
#define DMACHAN_I2C4_TX DMACHAN_SETTING(STM32L4_DMA2_CHAN2, 0)
/* QUADSPI */
#define DMACHAN_QUADSPI_1 DMACHAN_SETTING(STM32L4_DMA1_CHAN5, 5)

31
arch/arm/src/stm32l4/chip/stm32l4x6xx_pinmap.h
View File

@ -126,6 +126,11 @@
#define GPIO_CAN1_TX_2 (GPIO_ALT|GPIO_AF9 |GPIO_PORTB|GPIO_PIN9)
#define GPIO_CAN1_TX_3 (GPIO_ALT|GPIO_AF9 |GPIO_PORTD|GPIO_PIN1)
#define GPIO_CAN2_RX_1 (GPIO_ALT|GPIO_AF3 |GPIO_PORTB|GPIO_PIN5)
#define GPIO_CAN2_TX_1 (GPIO_ALT|GPIO_AF8 |GPIO_PORTB|GPIO_PIN6)
#define GPIO_CAN2_RX_2 (GPIO_ALT|GPIO_AF10 |GPIO_PORTB|GPIO_PIN12)
#define GPIO_CAN2_TX_2 (GPIO_ALT|GPIO_AF10 |GPIO_PORTB|GPIO_PIN13)
/* Clocks outputs */
#define GPIO_MCO (GPIO_ALT|GPIO_AF0 |GPIO_PORTA|GPIO_PIN8)
@ -151,6 +156,15 @@
#define GPIO_DAC1_OUT (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN4)
#define GPIO_DAC2_OUT (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN5)
/* Digital Camera Interface (DCMI) */
#define GPIO_DCMI_PIXCK_1 (GPIO_ALT|GPIO_AF4|GPIO_PORTA|GPIO_PIN6)
#define GPIO_DCMI_PIXCK_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTD|GPIO_PIN9)
#define GPIO_DCMI_HSYNC_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN4)
#define GPIO_DCMI_HSYNC_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTD|GPIO_PIN8)
#define GPIO_DCMI_VSYNC_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN7)
/* TODO: DCMI data pins missing */
/* Digital Filter for Sigma-Delta Modulators (DFSDM) */
#define GPIO_DFSDM_DATIN0_1 (GPIO_ALT|GPIO_AF6 |GPIO_PORTB|GPIO_PIN1)
@ -253,6 +267,10 @@
/* I2C */
/* Note: STM32L496xx/4A6xx devices have few additional mappings for
* I2C1-3 that are not defined here.
*/
#define GPIO_I2C1_SDA_1 (GPIO_ALT|GPIO_AF4 |GPIO_PORTB|GPIO_PIN7)
#define GPIO_I2C1_SDA_2 (GPIO_ALT|GPIO_AF4 |GPIO_PORTB|GPIO_PIN9)
#define GPIO_I2C1_SDA_3 (GPIO_ALT|GPIO_AF4 |GPIO_PORTG|GPIO_PIN13)
@ -278,6 +296,19 @@
#define GPIO_I2C3_SMBA_1 (GPIO_ALT|GPIO_AF4 |GPIO_PORTB|GPIO_PIN2)
#define GPIO_I2C3_SMBA_2 (GPIO_ALT|GPIO_AF4 |GPIO_PORTG|GPIO_PIN6)
#define GPIO_I2C4_SDA_1 (GPIO_ALT|GPIO_AF5 |GPIO_PORTB|GPIO_PIN7)
#define GPIO_I2C4_SDA_2 (GPIO_ALT|GPIO_AF3 |GPIO_PORTB|GPIO_PIN11)
#define GPIO_I2C4_SDA_3 (GPIO_ALT|GPIO_AF2 |GPIO_PORTC|GPIO_PIN1)
#define GPIO_I2C4_SDA_4 (GPIO_ALT|GPIO_AF4 |GPIO_PORTD|GPIO_PIN13)
#define GPIO_I2C4_SCL_1 (GPIO_ALT|GPIO_AF5 |GPIO_PORTB|GPIO_PIN6)
#define GPIO_I2C4_SCL_2 (GPIO_ALT|GPIO_AF3 |GPIO_PORTB|GPIO_PIN10)
#define GPIO_I2C4_SCL_3 (GPIO_ALT|GPIO_AF2 |GPIO_PORTC|GPIO_PIN0)
#define GPIO_I2C4_SCL_4 (GPIO_ALT|GPIO_AF4 |GPIO_PORTD|GPIO_PIN12)
#define GPIO_I2C4_SMBA_1 (GPIO_ALT|GPIO_AF5 |GPIO_PORTA|GPIO_PIN14)
#define GPIO_I2C4_SMBA_2 (GPIO_ALT|GPIO_AF4 |GPIO_PORTD|GPIO_PIN11)
#define GPIO_I2C4_SMBA_3 (GPIO_ALT|GPIO_AF4 |GPIO_PORTD|GPIO_PIN11)
#define GPIO_I2C4_SMBA_4 (GPIO_ALT|GPIO_AF4 |GPIO_PORTF|GPIO_PIN13)
/* JTAG */
#define GPIO_JTCK_SWCLK (GPIO_ALT|GPIO_AF0|GPIO_PORTA|GPIO_PIN14)

126
arch/arm/src/stm32l4/chip/stm32l4x6xx_rcc.h
View File

@ -35,8 +35,8 @@
*
****************************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32F42XXX_RCC_H
#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32F42XXX_RCC_H
#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_RCC_H
#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_RCC_H
/****************************************************************************************************
* Included Files
@ -80,9 +80,11 @@
#define STM32L4_RCC_APB1SMENR1_OFFSET 0x0078 /* RCC APB1 low power mode peripheral clock enable register 1 */
#define STM32L4_RCC_APB1SMENR2_OFFSET 0x007c /* RCC APB1 low power mode peripheral clock enable register 2 */
#define STM32L4_RCC_APB2SMENR_OFFSET 0x0080 /* RCC APB2 low power mode peripheral clock enable register */
#define STM32L4_RCC_CCIPR_OFFSET 0x0088 /* Peripherals independ clock configuration register */
#define STM32L4_RCC_CCIPR_OFFSET 0x0088 /* Peripherals independent clock configuration register 1 */
#define STM32L4_RCC_BDCR_OFFSET 0x0090 /* Backup domain control register */
#define STM32L4_RCC_CSR_OFFSET 0x0094 /* Control/status register */
#define STM32L4_RCC_CRRCR_OFFSET 0x0098 /* Clock recovery RC register */
#define STM32L4_RCC_CCIPR2_OFFSET 0x009c /* Peripherals independent clock configuration register 2 */
/* Register Addresses *******************************************************************************/
@ -116,6 +118,8 @@
#define STM32L4_RCC_CCIPR (STM32L4_RCC_BASE+STM32L4_RCC_CCIPR_OFFSET)
#define STM32L4_RCC_BDCR (STM32L4_RCC_BASE+STM32L4_RCC_BDCR_OFFSET)
#define STM32L4_RCC_CSR (STM32L4_RCC_BASE+STM32L4_RCC_CSR_OFFSET)
#define STM32L4_RCC_CRRCR (STM32L4_RCC_BASE+STM32L4_RCC_CRRCR_OFFSET)
#define STM32L4_RCC_CCIPR2 (STM32L4_RCC_BASE+STM32L4_RCC_CCIPR2_OFFSET)
/* Register Bitfield Definitions ********************************************************************/
@ -336,41 +340,44 @@
/* Clock interrupt enable register */
#define RCC_CIR_LSIRDYIE (1 << 0) /* Bit 0: LSI Ready Interrupt Enable */
#define RCC_CIR_LSERDYIE (1 << 1) /* Bit 1: LSE Ready Interrupt Enable */
#define RCC_CIR_MSIRDYIE (1 << 2) /* Bit 2: MSI Ready Interrupt Enable */
#define RCC_CIR_HSIRDYIE (1 << 3) /* Bit 3: HSI Ready Interrupt Enable */
#define RCC_CIR_HSERDYIE (1 << 4) /* Bit 4: HSE Ready Interrupt Enable */
#define RCC_CIR_PLLRDYIE (1 << 5) /* Bit 5: PLL Ready Interrupt Enable */
#define RCC_CIR_PLLSAI1RDYIE (1 << 6) /* Bit 6: PLLSAI1 Ready Interrupt enable */
#define RCC_CIR_PLLSAI2RDYIE (1 << 7) /* Bit 7: PLLSAI2 Ready Interrupt enable */
#define RCC_CIR_LSECSSIE (1 << 9) /* Bit 9: LSE Clock Security System Interrupt Enable */
#define RCC_CIR_LSIRDYIE (1 << 0) /* Bit 0: LSI Ready Interrupt Enable */
#define RCC_CIR_LSERDYIE (1 << 1) /* Bit 1: LSE Ready Interrupt Enable */
#define RCC_CIR_MSIRDYIE (1 << 2) /* Bit 2: MSI Ready Interrupt Enable */
#define RCC_CIR_HSIRDYIE (1 << 3) /* Bit 3: HSI Ready Interrupt Enable */
#define RCC_CIR_HSERDYIE (1 << 4) /* Bit 4: HSE Ready Interrupt Enable */
#define RCC_CIR_PLLRDYIE (1 << 5) /* Bit 5: PLL Ready Interrupt Enable */
#define RCC_CIR_PLLSAI1RDYIE (1 << 6) /* Bit 6: PLLSAI1 Ready Interrupt enable */
#define RCC_CIR_PLLSAI2RDYIE (1 << 7) /* Bit 7: PLLSAI2 Ready Interrupt enable */
#define RCC_CIR_LSECSSIE (1 << 9) /* Bit 9: LSE Clock Security System Interrupt Enable */
#define RCC_CIR_HSI48RDYIE (1 << 10) /* Bit 10: HSI48 Ready Interrupt Enable */
/* Clock interrupt flag register */
#define RCC_CIR_LSIRDYIF (1 << 0) /* Bit 0: LSI Ready Interrupt Flag */
#define RCC_CIR_LSERDYIF (1 << 1) /* Bit 1: LSE Ready Interrupt Flag */
#define RCC_CIR_MSIRDYIF (1 << 2) /* Bit 2: MSI Ready Interrupt Flag */
#define RCC_CIR_HSIRDYIF (1 << 3) /* Bit 3: HSI Ready Interrupt Flag */
#define RCC_CIR_HSERDYIF (1 << 4) /* Bit 4: HSE Ready Interrupt Flag */
#define RCC_CIR_PLLRDYIF (1 << 5) /* Bit 5: PLL Ready Interrupt Flag */
#define RCC_CIR_PLLSAI1RDYIF (1 << 6) /* Bit 6: PLLSAI1 Ready Interrupt Flag */
#define RCC_CIR_PLLSAI2RDYIF (1 << 7) /* Bit 7: PLLSAI2 Ready Interrupt Flag */
#define RCC_CIR_CSSF (1 << 8) /* Bit 8: Clock Security System Interrupt Flag */
#define RCC_CIR_LSECSSIF (1 << 9) /* Bit 9: LSE Clock Security System Interrupt Flag */
#define RCC_CIR_LSIRDYIF (1 << 0) /* Bit 0: LSI Ready Interrupt Flag */
#define RCC_CIR_LSERDYIF (1 << 1) /* Bit 1: LSE Ready Interrupt Flag */
#define RCC_CIR_MSIRDYIF (1 << 2) /* Bit 2: MSI Ready Interrupt Flag */
#define RCC_CIR_HSIRDYIF (1 << 3) /* Bit 3: HSI Ready Interrupt Flag */
#define RCC_CIR_HSERDYIF (1 << 4) /* Bit 4: HSE Ready Interrupt Flag */
#define RCC_CIR_PLLRDYIF (1 << 5) /* Bit 5: PLL Ready Interrupt Flag */
#define RCC_CIR_PLLSAI1RDYIF (1 << 6) /* Bit 6: PLLSAI1 Ready Interrupt Flag */
#define RCC_CIR_PLLSAI2RDYIF (1 << 7) /* Bit 7: PLLSAI2 Ready Interrupt Flag */
#define RCC_CIR_CSSF (1 << 8) /* Bit 8: Clock Security System Interrupt Flag */
#define RCC_CIR_LSECSSIF (1 << 9) /* Bit 9: LSE Clock Security System Interrupt Flag */
#define RCC_CIR_HSI48RDYIF (1 << 10) /* Bit 10: HSI48 Ready Interrupt Flag */
/* Clock interrupt clear register */
#define RCC_CIR_LSIRDYIC (1 << 0) /* Bit 0: LSI Ready Interrupt Clear */
#define RCC_CIR_LSERDYIC (1 << 1) /* Bit 1: LSE Ready Interrupt Clear */
#define RCC_CIR_MSIRDYIC (1 << 2) /* Bit 2: MSI Ready Interrupt Clear */
#define RCC_CIR_HSIRDYIC (1 << 3) /* Bit 3: HSI Ready Interrupt Clear */
#define RCC_CIR_HSERDYIC (1 << 4) /* Bit 4: HSE Ready Interrupt Clear */
#define RCC_CIR_PLLRDYIC (1 << 5) /* Bit 5: PLL Ready Interrupt Clear */
#define RCC_CIR_PLLSAI1RDYIC (1 << 6) /* Bit 6: PLLSAI1 Ready Interrupt Clear */
#define RCC_CIR_PLLSAI2RDYIC (1 << 7) /* Bit 7: PLLSAI2 Ready Interrupt Clear */
#define RCC_CIR_CSSC (1 << 8) /* Bit 8: Clock Security System Interrupt Clear */
#define RCC_CIR_LSECSSIC (1 << 9) /* Bit 9: LSE Clock Security System Interrupt Clear */
#define RCC_CIR_LSIRDYIC (1 << 0) /* Bit 0: LSI Ready Interrupt Clear */
#define RCC_CIR_LSERDYIC (1 << 1) /* Bit 1: LSE Ready Interrupt Clear */
#define RCC_CIR_MSIRDYIC (1 << 2) /* Bit 2: MSI Ready Interrupt Clear */
#define RCC_CIR_HSIRDYIC (1 << 3) /* Bit 3: HSI Ready Interrupt Clear */
#define RCC_CIR_HSERDYIC (1 << 4) /* Bit 4: HSE Ready Interrupt Clear */
#define RCC_CIR_PLLRDYIC (1 << 5) /* Bit 5: PLL Ready Interrupt Clear */
#define RCC_CIR_PLLSAI1RDYIC (1 << 6) /* Bit 6: PLLSAI1 Ready Interrupt Clear */
#define RCC_CIR_PLLSAI2RDYIC (1 << 7) /* Bit 7: PLLSAI2 Ready Interrupt Clear */
#define RCC_CIR_CSSC (1 << 8) /* Bit 8: Clock Security System Interrupt Clear */
#define RCC_CIR_LSECSSIC (1 << 9) /* Bit 9: LSE Clock Security System Interrupt Clear */
#define RCC_CIR_HSI48RDYIC (1 << 10) /* Bit 10: HSI48 Oscillator Ready Interrupt Clear */
/* AHB1 peripheral reset register */
@ -379,10 +386,11 @@
#define RCC_AHB1RSTR_FLASHRST (1 << 8) /* Bit 8: Flash memory interface reset */
#define RCC_AHB1RSTR_CRCRST (1 << 12) /* Bit 12: CRC reset */
#define RCC_AHB1RSTR_TSCRST (1 << 16) /* Bit 16: Touch Sensing Controller reset */
#define RCC_AHB1RSTR_DMA2DRST (1 << 17) /* Bit 17: DMA2D reset */
/* AHB2 peripheral reset register */
#define RCC_AHB1ENR_GPIOEN(port) (1 << port)
#define RCC_AHB1ENR_GPIOEN(port) (1 << (port))
#define RCC_AHB2RSTR_GPIOARST (1 << 0) /* Bit 0: IO port A reset */
#define RCC_AHB2RSTR_GPIOBRST (1 << 1) /* Bit 1: IO port B reset */
#define RCC_AHB2RSTR_GPIOCRST (1 << 2) /* Bit 2: IO port C reset */
@ -391,10 +399,13 @@
#define RCC_AHB2RSTR_GPIOFRST (1 << 5) /* Bit 5: IO port F reset */
#define RCC_AHB2RSTR_GPIOGRST (1 << 6) /* Bit 6: IO port G reset */
#define RCC_AHB2RSTR_GPIOHRST (1 << 7) /* Bit 7: IO port H reset */
#define RCC_AHB2RSTR_GPIOIRST (1 << 8) /* Bit 8: IO port I reset */
#define RCC_AHB2RSTR_OTGFSRST (1 << 12) /* Bit 12: USB OTG FS module reset */
#define RCC_AHB2RSTR_ADCRST (1 << 13) /* Bit 13: ADC interface reset (common to all ADCs) */
#define RCC_AHB2RSTR_DCMIRST (1 << 14) /* Bit 14: DCMI interface reset */
#define RCC_AHB2RSTR_AESRST (1 << 16) /* Bit 16: AES Cryptographic module reset */
#define RCC_AHB2RSTR_RNGRST (1 << 18) /* Bit 6: Random number generator module reset */
#define RCC_AHB2RSTR_HASHRST (1 << 17) /* Bit 17: HASH module reset */
#define RCC_AHB2RSTR_RNGRST (1 << 18) /* Bit 18: Random number generator module reset */
/* AHB3 peripheral reset register */
@ -419,7 +430,9 @@
#define RCC_APB1RSTR1_I2C1RST (1 << 21) /* Bit 21: I2C1 reset */
#define RCC_APB1RSTR1_I2C2RST (1 << 22) /* Bit 22: I2C2 reset */
#define RCC_APB1RSTR1_I2C3RST (1 << 23) /* Bit 23: I2C3 reset */
#define RCC_APB1RSTR1_CRSRST (1 << 24) /* Bit 24: CRS reset */
#define RCC_APB1RSTR1_CAN1RST (1 << 25) /* Bit 25: CAN1 reset */
#define RCC_APB1RSTR1_CAN2RST (1 << 26) /* Bit 26: CAN2 reset */
#define RCC_APB1RSTR1_PWRRST (1 << 28) /* Bit 28: Power interface reset */
#define RCC_APB1RSTR1_DAC1RST (1 << 29) /* Bit 29: DAC1 reset */
#define RCC_APB1RSTR1_OPAMPRST (1 << 30) /* Bit 30: OPAMP reset */
@ -428,6 +441,7 @@
/* APB1 Peripheral reset register 2 */
#define RCC_APB1RSTR2_LPUART1RST (1 << 0) /* Bit 0: Low-power UART 1 reset */
#define RCC_APB1RSTR2_I2C4RST (1 << 1) /* Bit 1: I2C4 reset */
#define RCC_APB1RSTR2_SWPMI1RST (1 << 2) /* Bit 2: Single Wire Protocol reset */
#define RCC_APB1RSTR2_LPTIM2RST (1 << 5) /* Bit 5: Low-power Timer 2 reset */
@ -453,6 +467,7 @@
#define RCC_AHB1ENR_FLASHEN (1 << 8) /* Bit 8: Flash memory interface enable */
#define RCC_AHB1ENR_CRCEN (1 << 12) /* Bit 12: CRC enable */
#define RCC_AHB1ENR_TSCEN (1 << 16) /* Bit 16: Touch Sensing Controller enable */
#define RCC_AHB1ENR_DMA2DEN (1 << 17) /* Bit 17: DMA2D enable */
/* AHB2 Peripheral Clock enable register */
@ -464,9 +479,12 @@
#define RCC_AHB2ENR_GPIOFEN (1 << 5) /* Bit 5: IO port F enable */
#define RCC_AHB2ENR_GPIOGEN (1 << 6) /* Bit 6: IO port G enable */
#define RCC_AHB2ENR_GPIOHEN (1 << 7) /* Bit 7: IO port H enable */
#define RCC_AHB2ENR_GPIOIEN (1 << 8) /* Bit 8: IO port I enable */
#define RCC_AHB2ENR_OTGFSEN (1 << 12) /* Bit 12: USB OTG FS module enable */
#define RCC_AHB2ENR_ADCEN (1 << 13) /* Bit 13: ADC interface enable (common to all ADCs) */
#define RCC_AHB2ENR_DCMIEN (1 << 14) /* Bit 14: DCMI interface enable */
#define RCC_AHB2ENR_AESEN (1 << 16) /* Bit 16: AES Cryptographic module enable */
#define RCC_AHB2ENR_HASHEN (1 << 17) /* Bit 17: HASH module enable */
#define RCC_AHB2ENR_RNGEN (1 << 18) /* Bit 18: Random number generator module enable */
/* AHB3 Peripheral Clock enable register */
@ -474,7 +492,7 @@
#define RCC_AHB3ENR_FSMCEN (1 << 0) /* Bit 0: Flexible static memory controller module enable */
#define RCC_AHB3ENR_QSPIEN (1 << 8) /* Bit 8: Quad SPI module enable */
/* APB1 Peripheral Clock enable register 1*/
/* APB1 Peripheral Clock enable register 1 */
#define RCC_APB1ENR1_TIM2EN (1 << 0) /* Bit 0: TIM2 enable */
#define RCC_APB1ENR1_TIM3EN (1 << 1) /* Bit 1: TIM3 enable */
@ -483,6 +501,7 @@
#define RCC_APB1ENR1_TIM6EN (1 << 4) /* Bit 4: TIM6 enable */
#define RCC_APB1ENR1_TIM7EN (1 << 5) /* Bit 5: TIM7 enable */
#define RCC_APB1ENR1_LCDEN (1 << 9) /* Bit 9: LCD controller enable */
#define RCC_APB1ENR1_RTCAPBEN (1 << 10) /* Bit 10: RTC APB clock enable */
#define RCC_APB1ENR1_WWDGEN (1 << 11) /* Bit 11: Windowed Watchdog enable */
#define RCC_APB1ENR1_SPI2EN (1 << 14) /* Bit 14: SPI2 enable */
#define RCC_APB1ENR1_SPI3EN (1 << 15) /* Bit 15: SPI3 enable */
@ -493,15 +512,18 @@
#define RCC_APB1ENR1_I2C1EN (1 << 21) /* Bit 21: I2C1 enable */
#define RCC_APB1ENR1_I2C2EN (1 << 22) /* Bit 22: I2C2 enable */
#define RCC_APB1ENR1_I2C3EN (1 << 23) /* Bit 23: I2C3 enable */
#define RCC_APB1ENR1_CRSEN (1 << 24) /* Bit 24: CRSEN enable */
#define RCC_APB1ENR1_CAN1EN (1 << 25) /* Bit 25: CAN1 enable */
#define RCC_APB1ENR1_CAN2EN (1 << 26) /* Bit 26: CAN2 enable */
#define RCC_APB1ENR1_PWREN (1 << 28) /* Bit 28: Power interface enable */
#define RCC_APB1ENR1_DAC1EN (1 << 29) /* Bit 29: DAC1 enable */
#define RCC_APB1ENR1_OPAMPEN (1 << 30) /* Bit 30: OPAMP enable */
#define RCC_APB1ENR1_LPTIM1EN (1 << 31) /* Bit 31: Low-power Timer 1 enable */
/* APB1 Peripheral Clock enable register 2*/
/* APB1 Peripheral Clock enable register 2 */
#define RCC_APB1ENR2_LPUART1EN (1 << 0) /* Bit 0: Low-power UART 1 enable */
#define RCC_APB1ENR2_I2C4EN (1 << 1) /* Bit 1: I2C4 enable */
#define RCC_APB1ENR2_SWPMI1EN (1 << 2) /* Bit 2: Single Wire Protocol enable */
#define RCC_APB1ENR2_LPTIM2EN (1 << 5) /* Bit 5: Low-power Timer 2 enable */
@ -529,6 +551,7 @@
#define RCC_AHB1SMENR_SRAM1SMEN (1 << 9) /* Bit 9: SRAM1 enable during Sleep mode */
#define RCC_AHB1SMENR_CRCLPSMEN (1 << 12) /* Bit 12: CRC enable during Sleep mode */
#define RCC_AHB1SMENR_TSCLPSMEN (1 << 16) /* Bit 16: Touch Sensing Controller enable during Sleep mode */
#define RCC_AHB1SMENR_DMA2DSMEN (1 << 17) /* Bit 17: DMA2D enable during Sleep mode */
/* RCC AHB2 low power mode peripheral clock enable register */
@ -540,18 +563,21 @@
#define RCC_AHB2SMENR_GPIOFSMEN (1 << 5) /* Bit 5: IO port F enable during Sleep mode */
#define RCC_AHB2SMENR_GPIOGSMEN (1 << 6) /* Bit 6: IO port G enable during Sleep mode */
#define RCC_AHB2SMENR_GPIOHSMEN (1 << 7) /* Bit 7: IO port H enable during Sleep mode */
#define RCC_AHB2SMENR_GPIOISMEN (1 << 8) /* Bit 8: IO port I enable during Sleep mode */
#define RCC_AHB2SMENR_SRAM2SMEN (1 << 9) /* Bit 9: SRAM2 enable during Sleep mode */
#define RCC_AHB2SMENR_OTGFSSMEN (1 << 12) /* Bit 12: USB OTG FS module enable during Sleep mode */
#define RCC_AHB2SMENR_ADCSMEN (1 << 13) /* Bit 13: ADC interface enable during Sleep mode (common to all ADCs) */
#define RCC_AHB2SMENR_DCMISMEN (1 << 14) /* Bit 14: DCMI interface enable during Sleep mode */
#define RCC_AHB2SMENR_AESSMEN (1 << 16) /* Bit 16: AES Cryptographic module enable during Sleep mode */
#define RCC_AHB2SMENR_RNGSMEN (1 << 18) /* Bit 6: Random number generator module enable during Sleep mode */
#define RCC_AHB2SMENR_HASHSMEN (1 << 17) /* Bit 17: HASH module enable during Sleep mode */
#define RCC_AHB2SMENR_RNGSMEN (1 << 18) /* Bit 18: Random number generator module enable during Sleep mode */
/* RCC AHB3 low power mode peripheral clock enable register */
#define RCC_AHB3SMENR_FSMCSMEN (1 << 0) /* Bit 0: Flexible static memory controller module enable during Sleep mode */
#define RCC_AHB3SMENR_QSPISMEN (1 << 8) /* Bit 8: Quad SPI module enable during Sleep mode */
/* RCC APB1 low power modeperipheral clock enable register 1 */
/* RCC APB1 low power mode peripheral clock enable register 1 */
#define RCC_APB1SMENR1_TIM2SMEN (1 << 0) /* Bit 0: TIM2 enable during Sleep mode */
#define RCC_APB1SMENR1_TIM3SMEN (1 << 1) /* Bit 1: TIM3 enable during Sleep mode */
@ -560,6 +586,7 @@
#define RCC_APB1SMENR1_TIM6SMEN (1 << 4) /* Bit 4: TIM6 enable during Sleep mode */
#define RCC_APB1SMENR1_TIM7SMEN (1 << 5) /* Bit 5: TIM7 enable during Sleep mode */
#define RCC_APB1SMENR1_LCDSMEN (1 << 9) /* Bit 9: LCD controller enable during Sleep mode */
#define RCC_APB1SMENR1_RTCAPBSMEN (1 << 10) /* Bit 10: RTC APB clock enable during Sleep mode */
#define RCC_APB1SMENR1_WWDGSMEN (1 << 11) /* Bit 11: Windowed Watchdog enable during Sleep mode */
#define RCC_APB1SMENR1_SPI2SMEN (1 << 14) /* Bit 14: SPI2 enable during Sleep mode */
#define RCC_APB1SMENR1_SPI3SMEN (1 << 15) /* Bit 15: SPI3 enable during Sleep mode */
@ -570,7 +597,9 @@
#define RCC_APB1SMENR1_I2C1SMEN (1 << 21) /* Bit 21: I2C1 enable during Sleep mode */
#define RCC_APB1SMENR1_I2C2SMEN (1 << 22) /* Bit 22: I2C2 enable during Sleep mode */
#define RCC_APB1SMENR1_I2C3SMEN (1 << 23) /* Bit 23: I2C3 enable during Sleep mode */
#define RCC_APB1SMENR1_CRSSMEN (1 << 24) /* Bit 24: CRS enable during Sleep mode */
#define RCC_APB1SMENR1_CAN1SMEN (1 << 25) /* Bit 25: CAN1 enable during Sleep mode */
#define RCC_APB1SMENR1_CAN2SMEN (1 << 26) /* Bit 26: CAN2 enable during Sleep mode */
#define RCC_APB1SMENR1_PWRSMEN (1 << 28) /* Bit 28: Power interface enable during Sleep mode */
#define RCC_APB1SMENR1_DAC1SMEN (1 << 29) /* Bit 29: DAC1 enable during Sleep mode */
#define RCC_APB1SMENR1_OPAMPSMEN (1 << 30) /* Bit 30: OPAMP enable during Sleep mode */
@ -579,6 +608,7 @@
/* RCC APB1 low power modeperipheral clock enable register 2 */
#define RCC_APB1SMENR2_LPUART1SMEN (1 << 0) /* Bit 0: Low-power UART 1 enable during Sleep mode */
#define RCC_APB1SMENR2_I2C4SMEN (1 << 1) /* Bit 1: I2C4 enable during Sleep mode */
#define RCC_APB1SMENR2_SWPMI1SMEN (1 << 2) /* Bit 2: Single Wire Protocol enable during Sleep mode */
#define RCC_APB1SMENR2_LPTIM2SMEN (1 << 5) /* Bit 5: Low-power Timer 2 enable during Sleep mode */
@ -761,5 +791,21 @@
#define RCC_CSR_WWDGRSTF (1 << 30) /* Bit 30: Window watchdog reset flag */
#define RCC_CSR_LPWRRSTF (1 << 31) /* Bit 31: Low-Power reset flag */
#endif /* CONFIG_STM32L4_STM32L476XX || CONFIG_STM32L4_STM32L486XX */
#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32F42XXX_RCC_H */
/* Clock recovery RC register (only on STM32L496xx/4A6xx) */
#define RCC_CRRCR_HSI48CAL_SHIFT 7
# define RCC_CRRCR_HSI48CAL_MASK (0x01ff << RCC_CRRCR_HSI48CAL_SHIFT) /* HSI48 clock calibration */
#define RCC_CRRCR_HSI48ON (1 << 0) /* Bit 0: HSI48 clock enable */
#define RCC_CRRCR_HSI48RDY (1 << 1) /* Bit 1: HSI48 clock ready flag */
/* Peripheral Independent Clock Configuration 2 register (only on STM32L496xx/4A6xx) */
#define RCC_CCIPR2_I2C4SEL_SHIFT (0)
#define RCC_CCIPR2_I2C4SEL_MASK (3 << RCC_CCIPR2_I2C4SEL_SHIFT)
# define RCC_CCIPR2_I2C4SEL_PCLK (0 << RCC_CCIPR2_I2C4SEL_SHIFT)
# define RCC_CCIPR2_I2C4SEL_SYSCLK (1 << RCC_CCIPR2_I2C4SEL_SHIFT)
# define RCC_CCIPR2_I2C4SEL_HSI (2 << RCC_CCIPR2_I2C4SEL_SHIFT)
#endif /* CONFIG_STM32L4_STM32L476XX || CONFIG_STM32L4_STM32L486XX || CONFIG_STM32L4_STM32L496XX */
#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_RCC_H */

116
arch/arm/src/stm32l4/stm32l4_i2c.c
View File

@ -96,7 +96,8 @@
/* At least one I2C peripheral must be enabled */
#if defined(CONFIG_STM32L4_I2C1) || defined(CONFIG_STM32L4_I2C2) || defined(CONFIG_STM32L4_I2C3)
#if defined(CONFIG_STM32L4_I2C1) || defined(CONFIG_STM32L4_I2C2) || \
defined(CONFIG_STM32L4_I2C3) || defined(CONFIG_STM32L4_I2C4)
/************************************************************************************
* Pre-processor Definitions
@ -214,7 +215,6 @@ struct stm32l4_i2c_config_s
uint32_t scl_pin; /* GPIO configuration for SCL as SCL */
uint32_t sda_pin; /* GPIO configuration for SDA as SDA */
#ifndef CONFIG_I2C_POLLED
int (*isr)(int, void *, void *); /* Interrupt handler */
uint32_t ev_irq; /* Event IRQ */
uint32_t er_irq; /* Error IRQ */
#endif
@ -289,17 +289,9 @@ static inline void stm32l4_i2c_sendstart(FAR struct stm32l4_i2c_priv_s *priv);
static inline void stm32l4_i2c_clrstart(FAR struct stm32l4_i2c_priv_s *priv);
static inline void stm32l4_i2c_sendstop(FAR struct stm32l4_i2c_priv_s *priv);
static inline uint32_t stm32l4_i2c_getstatus(FAR struct stm32l4_i2c_priv_s *priv);
static int stm32l4_i2c_isr(struct stm32l4_i2c_priv_s * priv);
static int stm32l4_i2c_isr_process(struct stm32l4_i2c_priv_s *priv);
#ifndef CONFIG_I2C_POLLED
#ifdef CONFIG_STM32L4_I2C1
static int stm32l4_i2c1_isr(int irq, void *context, FAR void *arg);
#endif
#ifdef CONFIG_STM32L4_I2C2
static int stm32l4_i2c2_isr(int irq, void *context, FAR void *arg);
#endif
#ifdef CONFIG_STM32L4_I2C3
static int stm32l4_i2c3_isr(int irq, void *context, FAR void *arg);
#endif
static int stm32l4_i2c_isr(int irq, void *context, FAR void *arg);
#endif
static int stm32l4_i2c_init(FAR struct stm32l4_i2c_priv_s *priv);
static int stm32l4_i2c_deinit(FAR struct stm32l4_i2c_priv_s *priv);
@ -332,7 +324,6 @@ static const struct stm32l4_i2c_config_s stm32l4_i2c1_config =
.scl_pin = GPIO_I2C1_SCL,
.sda_pin = GPIO_I2C1_SDA,
#ifndef CONFIG_I2C_POLLED
.isr = stm32l4_i2c1_isr,
.ev_irq = STM32L4_IRQ_I2C1EV,
.er_irq = STM32L4_IRQ_I2C1ER
#endif
@ -362,7 +353,6 @@ static const struct stm32l4_i2c_config_s stm32l4_i2c2_config =
.scl_pin = GPIO_I2C2_SCL,
.sda_pin = GPIO_I2C2_SDA,
#ifndef CONFIG_I2C_POLLED
.isr = stm32l4_i2c2_isr,
.ev_irq = STM32L4_IRQ_I2C2EV,
.er_irq = STM32L4_IRQ_I2C2ER
#endif
@ -392,7 +382,6 @@ static const struct stm32l4_i2c_config_s stm32l4_i2c3_config =
.scl_pin = GPIO_I2C3_SCL,
.sda_pin = GPIO_I2C3_SDA,
#ifndef CONFIG_I2C_POLLED
.isr = stm32l4_i2c3_isr,
.ev_irq = STM32L4_IRQ_I2C3EV,
.er_irq = STM32L4_IRQ_I2C3ER
#endif
@ -413,6 +402,35 @@ struct stm32l4_i2c_priv_s stm32l4_i2c3_priv =
};
#endif
#ifdef CONFIG_STM32L4_I2C4
static const struct stm32l4_i2c_config_s stm32l4_i2c4_config =
{
.base = STM32L4_I2C4_BASE,
.clk_bit = RCC_APB1ENR2_I2C4EN,
.reset_bit = RCC_APB1RSTR2_I2C4RST,
.scl_pin = GPIO_I2C4_SCL,
.sda_pin = GPIO_I2C4_SDA,
#ifndef CONFIG_I2C_POLLED
.ev_irq = STM32L4_IRQ_I2C4EV,
.er_irq = STM32L4_IRQ_I2C4ER
#endif
};
struct stm32l4_i2c_priv_s stm32l4_i2c4_priv =
{
.ops = &stm32l4_i2c_ops,
.config = &stm32l4_i2c4_config,
.refs = 0,
.intstate = INTSTATE_IDLE,
.msgc = 0,
.msgv = NULL,
.ptr = NULL,
.dcnt = 0,
.flags = 0,
.status = 0
};
#endif
/************************************************************************************
* Private Functions
************************************************************************************/
@ -656,7 +674,7 @@ static inline int stm32l4_i2c_sem_waitdone(FAR struct stm32l4_i2c_priv_s *priv)
* reports that it is done.
*/
stm32l4_i2c_isr(priv);
stm32l4_i2c_isr_process(priv);
}
/* Loop until the transfer is complete. */
@ -1265,7 +1283,7 @@ static inline uint32_t stm32l4_i2c_getstatus(FAR struct stm32l4_i2c_priv_s *priv
}
/************************************************************************************
* Name: stm32l4_i2c_isr
* Name: stm32l4_i2c_isr_startmessage
*
* Description:
* Common logic when a message is started. Just adds the even to the trace buffer
@ -1298,14 +1316,14 @@ static inline void stm32l4_i2c_clearinterrupts(struct stm32l4_i2c_priv_s *priv)
}
/************************************************************************************
* Name: stm32l4_i2c_isr
* Name: stm32l4_i2c_isr_process
*
* Description:
* Common Interrupt Service Routine
* I2C processing logic common to polled and non-polled operation.
*
************************************************************************************/
static int stm32l4_i2c_isr(struct stm32l4_i2c_priv_s *priv)
static int stm32l4_i2c_isr_process(struct stm32l4_i2c_priv_s *priv)
{
uint32_t status = stm32l4_i2c_getstatus(priv);
@ -1507,56 +1525,23 @@ static int stm32l4_i2c_isr(struct stm32l4_i2c_priv_s *priv)
}
/************************************************************************************
* Name: stm32l4_i2c1_isr
* Name: stm32l4_i2c_isr
*
* Description:
* I2C1 interrupt service routine
*
************************************************************************************/
#ifndef CONFIG_I2C_POLLED
#ifdef CONFIG_STM32L4_I2C1
static int stm32l4_i2c1_isr(int irq, void *context, FAR void *arg)
{
return stm32l4_i2c_isr(&stm32l4_i2c1_priv);
}
#endif
/************************************************************************************
* Name: stm32l4_i2c2_isr
*
* Description:
* I2C2 interrupt service routine
* I2C interrupt service routine
*
************************************************************************************/
#ifdef CONFIG_STM32L4_I2C2
static int stm32l4_i2c2_isr(int irq, void *context, FAR void *arg)
static int stm32l4_i2c_isr(int irq, void *context, FAR void *arg)
{
return stm32l4_i2c_isr(&stm32l4_i2c2_priv);
struct stm32l4_i2c_priv_s *priv = (struct stm32l4_i2c_priv_s *priv)arg;
DEBUGASSERT(priv != NULL);
return stm32l4_i2c_isr_process(priv);
}
#endif
/************************************************************************************
* Name: stm32l4_i2c3_isr
*
* Description:
* I2C2 interrupt service routine
*
************************************************************************************/
#ifdef CONFIG_STM32L4_I2C3
static int stm32l4_i2c3_isr(int irq, void *context, FAR void *arg)
{
return stm32l4_i2c_isr(&stm32l4_i2c3_priv);
}
#endif
#endif
/************************************************************************************
* Private Initialization and Deinitialization
************************************************************************************/
/************************************************************************************
* Name: stm32l4_i2c_init
*
@ -1591,8 +1576,8 @@ static int stm32l4_i2c_init(FAR struct stm32l4_i2c_priv_s *priv)
/* Attach ISRs */
#ifndef CONFIG_I2C_POLLED
irq_attach(priv->config->ev_irq, priv->config->isr, NULL);
irq_attach(priv->config->er_irq, priv->config->isr, NULL);
irq_attach(priv->config->ev_irq, stm32l4_i2c_isr, priv);
irq_attach(priv->config->er_irq, stm32l4_i2c_isr, priv);
up_enable_irq(priv->config->ev_irq);
up_enable_irq(priv->config->er_irq);
#endif
@ -2009,6 +1994,11 @@ FAR struct i2c_master_s *stm32l4_i2cbus_initialize(int port)
case 3:
priv = (struct stm32l4_i2c_priv_s *)&stm32l4_i2c3_priv;
break;
#endif
#ifdef CONFIG_STM32L4_I2C4
case 4:
priv = (struct stm32l4_i2c_priv_s *)&stm32l4_i2c4_priv;
break;
#endif
default:
return NULL;
@ -2072,5 +2062,5 @@ int stm32l4_i2cbus_uninitialize(FAR struct i2c_master_s * dev)
return OK;
}
#endif /* CONFIG_STM32L4_I2C1 || CONFIG_STM32L4_I2C2 || CONFIG_STM32L4_I2C3 */
#endif /* CONFIG_STM32L4_I2C1 || CONFIG_STM32L4_I2C2 || CONFIG_STM32L4_I2C3 || CONFIG_STM32L4_I2C4 */

10
arch/arm/src/stm32l4/stm32l4_rcc.h
View File

@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32L4_STM32L4_RRC_H
#define __ARCH_ARM_SRC_STM32L4_STM32L4_RRC_H
#ifndef __ARCH_ARM_SRC_STM32L4_STM32L4_RCC_H
#define __ARCH_ARM_SRC_STM32L4_STM32L4_RCC_H
/************************************************************************************
* Included Files
@ -187,11 +187,7 @@ void stm32l4_clockenable(void);
* Name: stm32l4_rcc_enablelse
*
* Description:
* Enable the External Low-Speed (LSE) Oscillator and, if the RTC is
* configured, setup the LSE as the RTC clock source, and enable the RTC.
*
* For the STM32L15X family, this will also select the LSE as the clock source of
* the LCD.
* Enable the External Low-Speed (LSE) Oscillator.
*
* Input Parameters:
* None

21
arch/arm/src/stm32l4/stm32l4_spi.h
View File

@ -64,8 +64,7 @@ extern "C"
* Public Data
************************************************************************************/
struct spi_dev_s;
enum spi_dev_e;
struct spi_dev_s;
/************************************************************************************
* Public Functions
@ -117,21 +116,21 @@ FAR struct spi_dev_s *stm32l4_spibus_initialize(int bus);
************************************************************************************/
#ifdef CONFIG_STM32L4_SPI1
void stm32l4_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t stm32l4_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
int stm32l4_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
void stm32l4_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t stm32l4_spi1status(FAR struct spi_dev_s *dev, uint32_t devid);
int stm32l4_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef CONFIG_STM32L4_SPI2
void stm32l4_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t stm32l4_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
int stm32l4_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
void stm32l4_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t stm32l4_spi2status(FAR struct spi_dev_s *dev, uint32_t devid);
int stm32l4_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef CONFIG_STM32L4_SPI3
void stm32l4_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t stm32l4_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
int stm32l4_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
void stm32l4_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t stm32l4_spi3status(FAR struct spi_dev_s *dev, uint32_t devid);
int stm32l4_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
/************************************************************************************

32
arch/arm/src/stm32l4/stm32l4x6xx_rcc.c
View File

@ -159,6 +159,12 @@ static inline void rcc_enableahb1(void)
regval |= RCC_AHB1ENR_TSCEN;
#endif
#ifdef CONFIG_STM32L4_DMA2D
/* DMA2D clock enable */
regval |= RCC_AHB1ENR_DMA2DEN;
#endif
putreg32(regval, STM32L4_RCC_AHB1ENR); /* Enable peripherals */
}
@ -220,12 +226,24 @@ static inline void rcc_enableahb2(void)
regval |= RCC_AHB2ENR_ADCEN;
#endif
#ifdef CONFIG_STM32L4_DCMI
/* Digital Camera interfaces clock enable */
regval |= RCC_AHB2ENR_DCMIEN;
#endif
#ifdef CONFIG_STM32L4_AES
/* Cryptographic modules clock enable */
regval |= RCC_AHB2ENR_AESEN;
#endif
#ifdef CONFIG_STM32L4_HASH
/* HASH module clock enable */
regval |= RCC_AHB2ENR_HASHEN;
#endif
#ifdef CONFIG_STM32L4_RNG
/* Random number generator clock enable */
@ -389,6 +407,12 @@ static inline void rcc_enableapb1(void)
regval |= RCC_APB1ENR1_CAN1EN;
#endif
#ifdef CONFIG_STM32L4_CAN2
/* CAN 2 clock enable */
regval |= RCC_APB1ENR1_CAN2EN;
#endif
/* Power interface clock enable. The PWR block is always enabled so that
* we can set the internal voltage regulator as required.
*/
@ -425,6 +449,12 @@ static inline void rcc_enableapb1(void)
regval |= RCC_APB1ENR2_LPUART1EN;
#endif
#ifdef CONFIG_STM32L4_I2C4
/* I2C4 clock enable */
regval |= RCC_APB1ENR2_I2C4EN;
#endif
#ifdef CONFIG_STM32L4_SWPMI
/* Single-wire protocol master clock enable */
@ -889,7 +919,7 @@ static void stm32l4_stdclockconfig(void)
#endif
/****************************************************************************
* Name: rcc_enableperiphals
* Name: rcc_enableperipherals
****************************************************************************/
static inline void rcc_enableperipherals(void)

7
arch/arm/src/tiva/tiva_ssi.h
View File

@ -108,11 +108,10 @@ FAR struct spi_dev_s *tiva_ssibus_initialize(int port);
****************************************************************************/
struct spi_dev_s;
enum spi_dev_e;
void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void tiva_ssiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int tiva_ssicmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int tiva_ssicmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#if defined(__cplusplus)

21
arch/arm/src/xmc4/xmc4_spi.h
View File

@ -63,8 +63,7 @@ extern "C"
* Public Data
************************************************************************************/
struct spi_dev_s;
enum spi_dev_e;
struct spi_dev_s;
/****************************************************************************
* Public Function Prototypes
@ -115,24 +114,24 @@ FAR struct spi_dev_s *xmc4_spibus_initialize(int bus);
************************************************************************************/
#ifdef CONFIG_XMC4_SPI0
void xmc4_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t xmc4_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void xmc4_spi0select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t xmc4_spi0status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int xmc4_spi0cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int xmc4_spi0cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif
#ifdef CONFIG_XMC4_SPI1
void xmc4_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t xmc4_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void xmc4_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t xmc4_spi1status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int xmc4_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int xmc4_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif
#ifdef CONFIG_XMC4_SPI2
void xmc4_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t xmc4_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void xmc4_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t xmc4_spi2status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int xmc4_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int xmc4_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif

11
arch/avr/src/avr/avr.h
View File

@ -95,6 +95,8 @@ extern uint16_t g_idle_topstack;
#ifndef __ASSEMBLY__
struct spi_dev_s; /* Forward references */
/************************************************************************************
* Name: up_copystate
*
@ -150,9 +152,6 @@ uint8_t *up_doirq(uint8_t irq, uint8_t *regs);
*
****************************************************************************/
struct spi_dev_s; /* Forward references */
enum spi_dev_e; /* Forward references */
FAR struct spi_dev_s *avr_spibus_initialize(int port);
/************************************************************************************
@ -183,10 +182,10 @@ FAR struct spi_dev_s *avr_spibus_initialize(int port);
************************************************************************************/
#ifdef CONFIG_AVR_SPI
void avr_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t avr_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void avr_spiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t avr_spistatus(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int avr_spicmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int avr_spicmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif

6
arch/hc/src/m9s12/m9s12.h
View File

@ -338,8 +338,6 @@ int hcs12_ethinitialize(int intf);
****************************************************************************/
struct spi_dev_s; /* Forward reference */
enum spi_dev_e; /* Forward reference */
FAR struct spi_dev_s *hcs12_spibus_initialize(int port);
/************************************************************************************
@ -367,8 +365,8 @@ FAR struct spi_dev_s *hcs12_spibus_initialize(int port);
*
************************************************************************************/
void hcs12_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t hcs12_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void hcs12_spiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t hcs12_spistatus(FAR struct spi_dev_s *dev, uint32_t devid);
#undef EXTERN
#if defined(__cplusplus)

26
arch/mips/src/pic32mx/pic32mx.h
View File

@ -400,8 +400,6 @@ void pic32mx_dumpgpio(uint32_t pinset, const char *msg);
****************************************************************************/
struct spi_dev_s; /* Forward reference */
enum spi_dev_e; /* Forward reference */
FAR struct spi_dev_s *pic32mx_spibus_initialize(int port);
/************************************************************************************
@ -433,38 +431,38 @@ FAR struct spi_dev_s *pic32mx_spibus_initialize(int port);
************************************************************************************/
#ifdef CONFIG_PIC32MX_SPI1
void pic32mx_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void pic32mx_spi1select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
uint8_t pic32mx_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
uint8_t pic32mx_spi1status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int pic32mx_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int pic32mx_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif
#ifdef CONFIG_PIC32MX_SPI2
void pic32mx_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void pic32mx_spi2select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
uint8_t pic32mx_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
uint8_t pic32mx_spi2status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int pic32mx_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int pic32mx_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif
#ifdef CONFIG_PIC32MX_SPI3
void pic32mx_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void pic32mx_spi3select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
uint8_t pic32mx_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
uint8_t pic32mx_spi3status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int pic32mx_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int pic32mx_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif
#ifdef CONFIG_PIC32MX_SPI3
void pic32mx_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void pic32mx_spi3select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
uint8_t pic32mx_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
uint8_t pic32mx_spi3status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int pic32mx_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int pic32mx_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif

37
arch/mips/src/pic32mz/pic32mz-spi.h
View File

@ -71,7 +71,6 @@ extern "C"
************************************************************************************/
struct spi_dev_s; /* Forward reference */
enum spi_dev_e; /* Forward reference */
/****************************************************************************
* Name: pic32mz_spibus_initialize
@ -118,56 +117,56 @@ FAR struct spi_dev_s *pic32mz_spibus_initialize(int port);
************************************************************************************/
#ifdef CONFIG_PIC32MZ_SPI1
void pic32mz_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void pic32mz_spi1select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
uint8_t pic32mz_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
uint8_t pic32mz_spi1status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int pic32mz_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int pic32mz_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif
#ifdef CONFIG_PIC32MZ_SPI2
void pic32mz_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void pic32mz_spi2select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
uint8_t pic32mz_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
uint8_t pic32mz_spi2status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int pic32mz_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int pic32mz_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif
#ifdef CONFIG_PIC32MZ_SPI3
void pic32mz_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void pic32mz_spi3select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
uint8_t pic32mz_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
uint8_t pic32mz_spi3status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int pic32mz_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int pic32mz_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif
#ifdef CONFIG_PIC32MZ_SPI4
void pic32mz_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void pic32mz_spi4select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
uint8_t pic32mz_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
uint8_t pic32mz_spi4status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int pic32mz_spi4cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int pic32mz_spi4cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif
#ifdef CONFIG_PIC32MZ_SPI5
void pic32mz_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void pic32mz_spi5select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
uint8_t pic32mz_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
uint8_t pic32mz_spi5status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int pic32mz_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int pic32mz_spi5cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif
#ifdef CONFIG_PIC32MZ_SPI6
void pic32mz_spi6select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void pic32mz_spi6select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
uint8_t pic32mz_spi6status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
uint8_t pic32mz_spi6status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int pic32mz_spi6cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int pic32mz_spi6cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif

14
arch/sim/src/up_spiflash.c
View File

@ -200,11 +200,11 @@ static void spiflash_setbits(FAR struct spi_dev_s *dev, int nbits);
static uint16_t spiflash_send(FAR struct spi_dev_s *dev, uint16_t wd);
static void spiflash_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
FAR void *rxbuffer, size_t nwords);
static void spiflash_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
static void spiflash_select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
static uint8_t spiflash_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
static uint8_t spiflash_status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
static int spiflash_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
static int spiflash_cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifndef CONFIG_SPI_EXCHANGE
static void spiflash_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
@ -357,12 +357,12 @@ static int spiflash_lock(FAR struct spi_dev_s *dev, bool lock)
*
************************************************************************************/
static void spiflash_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
static void spiflash_select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected)
{
FAR struct sim_spiflashdev_s *priv = (FAR struct sim_spiflashdev_s *)dev;
if (devid == SPIDEV_FLASH)
if (devid == SPIDEV_FLASH(0))
{
priv->selected = selected;
@ -392,7 +392,7 @@ static void spiflash_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
************************************************************************************/
#ifdef CONFIG_SPI_CMDDATA
static int spiflash_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
static int spiflash_cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return 0;
}
@ -467,7 +467,7 @@ static void spiflash_setbits(FAR struct spi_dev_s *dev, int nbits)
*
************************************************************************************/
static uint8_t spiflash_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
static uint8_t spiflash_status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}

15
arch/x86/src/qemu/qemu.h
View File

@ -83,6 +83,8 @@ extern "C"
* Public Function Prototypes
************************************************************************************/
struct spi_dev_s; /* Forward reference */
/************************************************************************************
* Name: i486_clockconfig
*
@ -207,9 +209,6 @@ int i486_dumpgpio(uint16_t pinset, const char *msg);
*
****************************************************************************/
struct spi_dev_s; /* Forward reference */
enum spi_dev_e; /* Forward reference */
FAR struct spi_dev_s *i486_spibus_initialize(int port);
/************************************************************************************
@ -241,14 +240,11 @@ FAR struct spi_dev_s *i486_spibus_initialize(int port);
*
************************************************************************************/
struct spi_dev_s;
enum spi_dev_e;
#ifdef CONFIG_I486_SPI
void i486_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t i486_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void i486_spiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t i486_spistatus(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int i486_spicmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int i486_spicmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif
@ -268,7 +264,6 @@ int i486_spicmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
*
****************************************************************************/
struct spi_dev_s;
#ifdef CONFIG_I486_SPI
void spi_flush(FAR struct spi_dev_s *dev);
#endif

7
arch/z16/src/z16f/chip.h
View File

@ -677,7 +677,6 @@ void z16f_reset(void);
#ifdef CONFIG_Z16F_ESPI
struct spi_dev_s; /* Forward reference */
enum spi_dev_e; /* Forward reference */
/* Initialize the selected SPI port */
@ -685,16 +684,16 @@ FAR struct spi_dev_s *z16_spibus_initialize(int port);
/* Select an SPI device (see include/nuttx/spi/spi.h) */
void z16f_espi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
void z16f_espi_select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
/* Provide SPI device status (see include/nuttx/spi/spi.h) */
uint8_t z16f_espi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
uint8_t z16f_espi_status(FAR struct spi_dev_s *dev, uint32_t devid);
/* Select CMD/DATA options (often used with LCD devices) */
#ifdef CONFIG_SPI_CMDDATA
int z16f_espi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int z16f_espi_cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif

6
arch/z80/src/ez80/ez80f91_spi.h
View File

@ -145,9 +145,9 @@ FAR struct spi_dev_s *ez80_spibus_initialize(int port);
*
************************************************************************************/
void ez80_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t ez80_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
int ez80_spicmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
void ez80_spiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t ez80_spistatus(FAR struct spi_dev_s *dev, uint32_t devid);
int ez80_spicmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#undef EXTERN
#ifdef __cplusplus

2
binfmt/libelf/libelf_symbols.c
View File

@ -126,7 +126,7 @@ static int elf_symname(FAR struct elf_loadinfo_s *loadinfo,
/* Read that number of bytes into the array */
buffer = &loadinfo->iobuffer[bytesread];
ret = elf_read(loadinfo, buffer, readlen, offset);
ret = elf_read(loadinfo, buffer, readlen, offset + bytesread);
if (ret < 0)
{
berr("elf_read failed: %d\n", ret);

16
configs/arduino-due/src/sam_mmcsd.c
View File

@ -109,11 +109,11 @@
* Private Function Prototypes
****************************************************************************/
static void spi_select(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid,
static void spi_select(FAR struct spi_bitbang_s *priv, uint32_t devid,
bool selected);
static uint8_t spi_status(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid);
static uint8_t spi_status(FAR struct spi_bitbang_s *priv, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
static int spi_cmddata(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid,
static int spi_cmddata(FAR struct spi_bitbang_s *priv, uint32_t devid,
bool cmd);
#endif
@ -142,10 +142,10 @@ static int spi_cmddata(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid,
*
****************************************************************************/
static void spi_select(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid,
static void spi_select(FAR struct spi_bitbang_s *priv, uint32_t devid,
bool selected)
{
if (devid == SPIDEV_MMCSD)
if (devid == SPIDEV_MMCSD(0))
{
if (selected)
{
@ -173,9 +173,9 @@ static void spi_select(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid,
*
****************************************************************************/
static uint8_t spi_status(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid)
static uint8_t spi_status(FAR struct spi_bitbang_s *priv, uint32_t devid)
{
if (devid == SPIDEV_MMCSD)
if (devid == SPIDEV_MMCSD(0))
{
return SPI_STATUS_PRESENT;
}
@ -200,7 +200,7 @@ static uint8_t spi_status(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid)
****************************************************************************/
#ifdef CONFIG_SPI_CMDDATA
static int spi_cmddata(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid,
static int spi_cmddata(FAR struct spi_bitbang_s *priv, uint32_t devid,
bool cmd)
{
return OK;

12
configs/arduino-due/src/sam_touchscreen.c
View File

@ -121,11 +121,11 @@
****************************************************************************/
/* Lower-half SPI */
static void spi_select(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid,
static void spi_select(FAR struct spi_bitbang_s *priv, uint32_t devid,
bool selected);
static uint8_t spi_status(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid);
static uint8_t spi_status(FAR struct spi_bitbang_s *priv, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
static int spi_cmddata(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid,
static int spi_cmddata(FAR struct spi_bitbang_s *priv, uint32_t devid,
bool cmd);
#endif
@ -198,7 +198,7 @@ static struct ads7843e_config_s g_tscinfo =
*
****************************************************************************/
static void spi_select(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid,
static void spi_select(FAR struct spi_bitbang_s *priv, uint32_t devid,
bool selected)
{
/* The touchscreen controller is always selected */
@ -219,7 +219,7 @@ static void spi_select(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid,
*
****************************************************************************/
static uint8_t spi_status(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid)
static uint8_t spi_status(FAR struct spi_bitbang_s *priv, uint32_t devid)
{
return 0;
}
@ -241,7 +241,7 @@ static uint8_t spi_status(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid)
****************************************************************************/
#ifdef CONFIG_SPI_CMDDATA
static int spi_cmddata(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid,
static int spi_cmddata(FAR struct spi_bitbang_s *priv, uint32_t devid,
bool cmd)
{
return OK;

20
configs/clicker2-stm32/src/stm32_spi.c
View File

@ -107,39 +107,39 @@ void weak_function stm32_spidev_initialize(void)
****************************************************************************/
#ifdef CONFIG_STM32_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32_SPI2
void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
/* To be provided */
}
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32_SPI3
void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
switch(devid)
{
#ifdef CONFIG_IEEE802154_MRF24J40
case SPIDEV_IEEE802154:
case SPIDEV_IEEE802154(0):
/* Set the GPIO low to select and high to de-select */
stm32_gpiowrite(GPIO_MB1_CS, !selected);
break;
@ -149,7 +149,7 @@ void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele
}
}
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
@ -180,14 +180,14 @@ uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#ifdef CONFIG_SPI_CMDDATA
#ifdef CONFIG_STM32_SPI1
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return -ENODEV;
}
#endif
#ifdef CONFIG_STM32_SPI2
int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int stm32_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
/* To be provided */
@ -196,7 +196,7 @@ int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
#endif
#ifdef CONFIG_STM32_SPI3
int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int stm32_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
/* To be provided */

10
configs/cloudctrl/src/stm32_spi.c
View File

@ -113,13 +113,13 @@ void weak_function stm32_spidev_initialize(void)
****************************************************************************/
#ifdef CONFIG_STM32_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
/* SPI1 connects to the SD CARD and to the SPI FLASH */
if (devid == SPIDEV_FLASH)
if (devid == SPIDEV_FLASH(0))
{
/* Set the GPIO low to select and high to de-select */
@ -127,7 +127,7 @@ void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele
}
}
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return SPI_STATUS_PRESENT;
@ -135,13 +135,13 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#endif
#ifdef CONFIG_STM32_SPI3
void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}

4
configs/demo9s12ne64/src/m9s12_spi.c
View File

@ -91,11 +91,11 @@ void weak_function hcs12_spidev_initialize(void)
*
****************************************************************************/
void hcs12_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void hcs12_spiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
}
uint8_t hcs12_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t hcs12_spistatus(FAR struct spi_dev_s *dev, uint32_t devid)
{
return SPI_STATUS_PRESENT;
}

4
configs/dk-tm4c129x/src/tm4c_ssi.c
View File

@ -102,14 +102,14 @@ void weak_function tm4c_ssidev_initialize(void)
*
****************************************************************************/
void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void tiva_ssiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssi_dumpgpio("tiva_ssiselect() Entry");
ssi_dumpgpio("tiva_ssiselect() Exit");
}
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, uint32_t devid)
{
spiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;

4
configs/ea3131/src/lpc31_spi.c
View File

@ -99,13 +99,13 @@ void weak_function lpc31_spidev_intialize(void)
*
************************************************************************************/
void lpc31_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void lpc31_spiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#warning "Missing logic"
}
uint8_t lpc31_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t lpc31_spistatus(FAR struct spi_dev_s *dev, uint32_t devid)
{
return SPI_STATUS_PRESENT;
}

4
configs/ea3152/src/lpc31_spi.c
View File

@ -99,13 +99,13 @@ void weak_function lpc31_spidev_intialize(void)
*
************************************************************************************/
void lpc31_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void lpc31_spiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#warning "Missing logic"
}
uint8_t lpc31_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t lpc31_spistatus(FAR struct spi_dev_s *dev, uint32_t devid)
{
return SPI_STATUS_PRESENT;
}

6
configs/eagle100/src/lm_ssi.c
View File

@ -107,10 +107,10 @@ void weak_function lm_ssidev_initialize(void)
*
****************************************************************************/
void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void tiva_ssiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
if (devid == SPIDEV_MMCSD)
if (devid == SPIDEV_MMCSD(0))
{
/* Assert the CS pin to the card */
@ -120,7 +120,7 @@ void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool select
}
}
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, uint32_t devid)
{
spiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;

8
configs/ekk-lm3s9b96/src/lm_ssi.c
View File

@ -107,18 +107,18 @@ void weak_function lm_ssidev_initialize(void)
*
****************************************************************************/
void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void tiva_ssiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssi_dumpgpio("tiva_ssiselect() Entry");
if (devid == SPIDEV_MMCSD)
if (devid == SPIDEV_MMCSD(0))
{
/* Assert the CS pin to the card */
tiva_gpiowrite(SDCCS_GPIO, !selected);
}
#ifdef CONFIG_NX_LCDDRIVER
else if (devid == SPIDEV_DISPLAY)
else if (devid == SPIDEV_DISPLAY(0))
{
/* Assert the CS pin to the display */
@ -128,7 +128,7 @@ void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool select
ssi_dumpgpio("tiva_ssiselect() Exit");
}
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, uint32_t devid)
{
spiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;

12
configs/fire-stm32v2/src/stm32_spi.c
View File

@ -131,7 +131,7 @@ void weak_function stm32_spidev_initialize(void)
****************************************************************************/
#ifdef CONFIG_STM32_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
@ -145,14 +145,14 @@ void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele
else
#endif
#ifdef CONFIG_ENC28J60
if (devid == SPIDEV_ETHERNET)
if (devid == SPIDEV_ETHERNET(0))
{
/* Set the GPIO low to select and high to de-select */
stm32_gpiowrite(GPIO_ENC28J60_CS, !selected);
}
#else
if (devid == SPIDEV_FLASH)
if (devid == SPIDEV_FLASH(0))
{
/* Set the GPIO low to select and high to de-select */
@ -161,14 +161,14 @@ void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele
#endif
}
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return SPI_STATUS_PRESENT;
}
#endif
#ifdef CONFIG_STM32_SPI2
void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
@ -180,7 +180,7 @@ void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele
}
}
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return SPI_STATUS_PRESENT;
}

12
configs/freedom-k64f/src/k64_spi.c
View File

@ -100,13 +100,13 @@ void weak_function k64_spidev_initialize(void)
************************************************************************************/
#ifdef CONFIG_KINETIS_SPI0
void kinetis_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void kinetis_spi0select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
# warning "Missing logic"
}
uint8_t kinetis_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t kinetis_spi0status(FAR struct spi_dev_s *dev, uint32_t devid)
{
# warning "Missing logic"
return SPI_STATUS_PRESENT;
@ -114,13 +114,13 @@ uint8_t kinetis_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#endif
#ifdef CONFIG_KINETIS_SPI1
void kinetis_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void kinetis_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
# warning "Missing logic"
}
uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
# warning "Missing logic"
return SPI_STATUS_PRESENT;
@ -128,13 +128,13 @@ uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#endif
#ifdef CONFIG_KINETIS_SPI2
void kinetis_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void kinetis_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
# warning "Missing logic"
}
uint8_t kinetis_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t kinetis_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
{
# warning "Missing logic"
return SPI_STATUS_PRESENT;

12
configs/freedom-k66f/src/k66_spi.c
View File

@ -101,13 +101,13 @@ void weak_function k66_spidev_initialize(void)
************************************************************************************/
#ifdef CONFIG_KINETIS_SPI0
void kinetis_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void kinetis_spi0select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
# warning "Missing logic"
}
uint8_t kinetis_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t kinetis_spi0status(FAR struct spi_dev_s *dev, uint32_t devid)
{
# warning "Missing logic"
return SPI_STATUS_PRESENT;
@ -115,13 +115,13 @@ uint8_t kinetis_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#endif
#ifdef CONFIG_KINETIS_SPI1
void kinetis_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void kinetis_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
# warning "Missing logic"
}
uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
# warning "Missing logic"
return SPI_STATUS_PRESENT;
@ -129,13 +129,13 @@ uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#endif
#ifdef CONFIG_KINETIS_SPI2
void kinetis_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void kinetis_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
# warning "Missing logic"
}
uint8_t kinetis_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t kinetis_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
{
# warning "Missing logic"
return SPI_STATUS_PRESENT;

16
configs/freedom-kl25z/src/kl_spi.c
View File

@ -139,14 +139,14 @@ void weak_function kl_spidev_initialize(void)
****************************************************************************/
#ifdef CONFIG_KL_SPI0
void kl_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void kl_spi0select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected)
{
spiinfo("devid: %d CS: %s\n",
(int)devid, selected ? "assert" : "de-assert");
#ifdef CONFIG_ADXL345_SPI
if (devid == SPIDEV_ACCELEROMETER)
if (devid == SPIDEV_ACCELEROMETER(0))
{
/* Active low */
@ -155,7 +155,7 @@ void kl_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
#endif
#if defined(CONFIG_WL_CC3000)
if (devid == SPIDEV_WIRELESS)
if (devid == SPIDEV_WIRELESS(0))
{
kl_gpiowrite(GPIO_WIFI_CS, !selected);
}
@ -165,7 +165,7 @@ void kl_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
#endif
#ifdef CONFIG_KL_SPI1
void kl_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void kl_spi1select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected)
{
spiinfo("devid: %d CS: %s\n",
@ -188,14 +188,14 @@ void kl_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
****************************************************************************/
#ifdef CONFIG_KL_SPI0
uint8_t kl_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t kl_spi0status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#ifdef CONFIG_KL_SPI1
uint8_t kl_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t kl_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
@ -220,14 +220,14 @@ uint8_t kl_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#ifdef CONFIG_SPI_CMDDATA
#ifdef CONFIG_KL_SPI0
int kl_spi0cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int kl_spi0cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return 0;
}
#endif
#ifdef CONFIG_KL_SPI1
int kl_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int kl_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return 0;
}

12
configs/freedom-kl26z/src/kl_spi.c
View File

@ -130,7 +130,7 @@ void weak_function kl_spidev_initialize(void)
****************************************************************************/
#ifdef CONFIG_KL_SPI0
void kl_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void kl_spi0select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected)
{
spiinfo("devid: %d CS: %s\n",
@ -139,7 +139,7 @@ void kl_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
#endif
#ifdef CONFIG_KL_SPI1
void kl_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void kl_spi1select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected)
{
spiinfo("devid: %d CS: %s\n",
@ -162,14 +162,14 @@ void kl_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
****************************************************************************/
#ifdef CONFIG_KL_SPI0
uint8_t kl_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t kl_spi0status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#ifdef CONFIG_KL_SPI1
uint8_t kl_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t kl_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
@ -194,14 +194,14 @@ uint8_t kl_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#ifdef CONFIG_SPI_CMDDATA
#ifdef CONFIG_KL_SPI0
int kl_spi0cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int kl_spi0cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return 0;
}
#endif
#ifdef CONFIG_KL_SPI1
int kl_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int kl_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return 0;
}

14
configs/hymini-stm32v/src/stm32_spi.c
View File

@ -107,11 +107,11 @@ void stm32_spidev_initialize(void)
****************************************************************************/
#ifdef CONFIG_STM32_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
if (devid == SPIDEV_TOUCHSCREEN)
if (devid == SPIDEV_TOUCHSCREEN(0))
{
/* Set the GPIO low to select and high to de-select */
@ -119,31 +119,31 @@ void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele
}
}
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return SPI_STATUS_PRESENT;
}
#endif
#ifdef CONFIG_STM32_SPI2
void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return SPI_STATUS_PRESENT;
}
#endif
#ifdef CONFIG_STM32_SPI3
void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return SPI_STATUS_PRESENT;
}

12
configs/kwikstik-k40/src/k40_spi.c
View File

@ -97,13 +97,13 @@ void weak_function kinetis_spidev_initialize(void)
****************************************************************************/
#ifdef CONFIG_KINETIS_SPI0
void kinetis_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void kinetis_spi0select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
# warning "Missing logic"
}
uint8_t kinetis_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t kinetis_spi0status(FAR struct spi_dev_s *dev, uint32_t devid)
{
# warning "Missing logic"
return SPI_STATUS_PRESENT;
@ -111,13 +111,13 @@ uint8_t kinetis_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#endif
#ifdef CONFIG_KINETIS_SPI1
void kinetis_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void kinetis_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
# warning "Missing logic"
}
uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
# warning "Missing logic"
return SPI_STATUS_PRESENT;
@ -125,13 +125,13 @@ uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#endif
#ifdef CONFIG_KINETIS_SPI2
void kinetis_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void kinetis_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
# warning "Missing logic"
}
uint8_t kinetis_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t kinetis_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
{
# warning "Missing logic"
return SPI_STATUS_PRESENT;

6
configs/lm3s6432-s2e/src/lm_ssi.c
View File

@ -105,12 +105,12 @@ void weak_function lm_ssidev_initialize(void)
*
****************************************************************************/
void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void tiva_ssiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssi_dumpgpio("tiva_ssiselect() Entry");
if (devid == SPIDEV_MMCSD)
if (devid == SPIDEV_MMCSD(0))
{
/* Assert the CS pin to the card */
@ -120,7 +120,7 @@ void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool select
ssi_dumpgpio("tiva_ssiselect() Exit");
}
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, uint32_t devid)
{
spiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;

4
configs/lm3s6965-ek/src/lm_oled.c
View File

@ -162,9 +162,9 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
*
****************************************************************************/
int tiva_ssicmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int tiva_ssicmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
if (devid == SPIDEV_DISPLAY)
if (devid == SPIDEV_DISPLAY(0))
{
/* Set GPIO to 1 for data, 0 for command */

8
configs/lm3s6965-ek/src/lm_ssi.c
View File

@ -110,19 +110,19 @@ void weak_function lm_ssidev_initialize(void)
*
****************************************************************************/
void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void tiva_ssiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssi_dumpgpio("tiva_ssiselect() Entry");
if (devid == SPIDEV_MMCSD)
if (devid == SPIDEV_MMCSD(0))
{
/* Assert the CS pin to the card */
tiva_gpiowrite(SDCCS_GPIO, !selected);
}
#ifdef CONFIG_NX_LCDDRIVER
else if (devid == SPIDEV_DISPLAY)
else if (devid == SPIDEV_DISPLAY(0))
{
/* Assert the CS pin to the display */
@ -132,7 +132,7 @@ void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool select
ssi_dumpgpio("tiva_ssiselect() Exit");
}
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, uint32_t devid)
{
spiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;

4
configs/lm3s8962-ek/src/lm_oled.c
View File

@ -160,9 +160,9 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
*
****************************************************************************/
int tiva_ssicmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int tiva_ssicmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
if (devid == SPIDEV_DISPLAY)
if (devid == SPIDEV_DISPLAY(0))
{
/* Set GPIO to 1 for data, 0 for command */

8
configs/lm3s8962-ek/src/lm_ssi.c
View File

@ -110,19 +110,19 @@ void weak_function lm_ssidev_initialize(void)
*
****************************************************************************/
void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void tiva_ssiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssi_dumpgpio("tiva_ssiselect() Entry");
if (devid == SPIDEV_MMCSD)
if (devid == SPIDEV_MMCSD(0))
{
/* Assert the CS pin to the card */
tiva_gpiowrite(SDCCS_GPIO, !selected);
}
#ifdef CONFIG_NX_LCDDRIVER
else if (devid == SPIDEV_DISPLAY)
else if (devid == SPIDEV_DISPLAY(0))
{
/* Assert the CS pin to the display */
@ -132,7 +132,7 @@ void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool select
ssi_dumpgpio("tiva_ssiselect() Exit");
}
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, uint32_t devid)
{
spiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;

4
configs/lm4f120-launchpad/src/lm4f_ssi.c
View File

@ -103,14 +103,14 @@ void weak_function lm4f_spidev_initialize(void)
*
****************************************************************************/
void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void tiva_ssiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssi_dumpgpio("tiva_ssiselect() Entry");
ssi_dumpgpio("tiva_ssiselect() Exit");
}
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, uint32_t devid)
{
spiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;

14
configs/lpcxpresso-lpc1115/src/lpc11_ssp.c
View File

@ -130,7 +130,7 @@ void weak_function lpcxpresso_sspdev_initialize(void)
************************************************************************************/
#ifdef CONFIG_LPC17_SSP0
void lpc11_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void lpc11_ssp0select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssp_dumpgpio("lpc11_ssp0select() Entry");
@ -140,7 +140,7 @@ void lpc11_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sel
ssp_dumpgpio("lpc11_ssp0select() Exit");
}
uint8_t lpc11_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t lpc11_ssp0status(FAR struct spi_dev_s *dev, uint32_t devid)
{
spiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;
@ -148,19 +148,19 @@ uint8_t lpc11_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#endif
#ifdef CONFIG_LPC17_SSP1
void lpc11_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void lpc11_ssp1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssp_dumpgpio("lpc11_ssp1select() Entry");
if (devid == SPIDEV_MMCSD)
if (devid == SPIDEV_MMCSD(0))
{
/* Assert/de-assert the CS pin to the card */
(void)lpc11_gpiowrite(LPCXPRESSO_SD_CS, !selected);
}
#ifdef CONFIG_NX_LCDDRIVER
else if (devid == SPIDEV_DISPLAY)
else if (devid == SPIDEV_DISPLAY(0))
{
/* Assert the CS pin to the OLED display */
@ -170,9 +170,9 @@ void lpc11_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sel
ssp_dumpgpio("lpc11_ssp1select() Exit");
}
uint8_t lpc11_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t lpc11_ssp1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
if (devid == SPIDEV_MMCSD)
if (devid == SPIDEV_MMCSD(0))
{
/* Read the state of the card-detect bit */

4
configs/lpcxpresso-lpc1768/src/lpc17_oled.c
View File

@ -159,9 +159,9 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
*
****************************************************************************/
int lpc17_ssp1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int lpc17_ssp1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
if (devid == SPIDEV_DISPLAY)
if (devid == SPIDEV_DISPLAY(0))
{
/* Set GPIO to 1 for data, 0 for command */

14
configs/lpcxpresso-lpc1768/src/lpc17_ssp.c
View File

@ -130,7 +130,7 @@ void weak_function lpcxpresso_sspdev_initialize(void)
************************************************************************************/
#ifdef CONFIG_LPC17_SSP0
void lpc17_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void lpc17_ssp0select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssp_dumpgpio("lpc17_ssp0select() Entry");
@ -140,7 +140,7 @@ void lpc17_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sel
ssp_dumpgpio("lpc17_ssp0select() Exit");
}
uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, uint32_t devid)
{
spiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;
@ -148,19 +148,19 @@ uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#endif
#ifdef CONFIG_LPC17_SSP1
void lpc17_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void lpc17_ssp1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssp_dumpgpio("lpc17_ssp1select() Entry");
if (devid == SPIDEV_MMCSD)
if (devid == SPIDEV_MMCSD(0))
{
/* Assert/de-assert the CS pin to the card */
(void)lpc17_gpiowrite(LPCXPRESSO_SD_CS, !selected);
}
#ifdef CONFIG_NX_LCDDRIVER
else if (devid == SPIDEV_DISPLAY)
else if (devid == SPIDEV_DISPLAY(0))
{
/* Assert the CS pin to the OLED display */
@ -170,9 +170,9 @@ void lpc17_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sel
ssp_dumpgpio("lpc17_ssp1select() Exit");
}
uint8_t lpc17_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t lpc17_ssp1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
if (devid == SPIDEV_MMCSD)
if (devid == SPIDEV_MMCSD(0))
{
/* Read the state of the card-detect bit */

14
configs/maple/src/stm32_spi.c
View File

@ -104,42 +104,42 @@ void weak_function stm32_spidev_initialize(void)
****************************************************************************/
#ifdef CONFIG_STM32_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
# if defined(CONFIG_LCD_SHARP_MEMLCD)
if (devid == SPIDEV_DISPLAY)
if (devid == SPIDEV_DISPLAY(0))
{
stm32_gpiowrite(GPIO_MEMLCD_CS, selected);
}
# endif
}
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return -ENODEV;
}
#endif
#ifdef CONFIG_STM32_SPI2
void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected)
{
}
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return -ENODEV;
}

12
configs/mcu123-lpc214x/src/lpc2148_spi1.c
View File

@ -108,11 +108,11 @@
****************************************************************************/
static int spi_lock(FAR struct spi_dev_s *dev, bool lock);
static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
static void spi_select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);
static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
static uint8_t spi_status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
static int spi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
static int spi_cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t ch);
static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size_t nwords);
@ -210,7 +210,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
*
****************************************************************************/
static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
static void spi_select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
uint32_t bit = 1 << 20;
@ -301,7 +301,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
*
****************************************************************************/
static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
static uint8_t spi_status(FAR struct spi_dev_s *dev, uint32_t devid)
{
/* I don't think there is anyway to determine these things on the mcu123.com
* board.
@ -336,7 +336,7 @@ static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
****************************************************************************/
#ifdef CONFIG_SPI_CMDDATA
static int spi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
static int spi_cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
# error "spi_cmddata not implemented"
return -ENOSYS;

30
configs/mikroe-stm32f4/src/stm32_spi.c
View File

@ -121,17 +121,17 @@ void weak_function stm32_spidev_initialize(void)
****************************************************************************/
#ifdef CONFIG_STM32_SPI3
void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#if defined(CONFIG_VS1053)
if (devid == SPIDEV_AUDIO_DATA)
if (devid == SPIDEV_AUDIO_DATA(0))
{
stm32_gpiowrite(GPIO_CS_MP3_DATA, !selected);
}
else if (devid == SPIDEV_AUDIO_CTRL)
else if (devid == SPIDEV_AUDIO_CTRL(0))
{
stm32_gpiowrite(GPIO_CS_MP3_CMD, !selected);
}
@ -139,7 +139,7 @@ void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele
#endif
#if defined(CONFIG_MMCSD)
if (devid == SPIDEV_MMCSD)
if (devid == SPIDEV_MMCSD(0))
{
stm32_gpiowrite(GPIO_CS_MMCSD, !selected);
}
@ -147,7 +147,7 @@ void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele
#endif
#if defined(CONFIG_MTD_M25P)
if (devid == SPIDEV_FLASH)
if (devid == SPIDEV_FLASH(0))
{
stm32_gpiowrite(GPIO_CS_FLASH, !selected);
}
@ -156,18 +156,18 @@ void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele
/* Must be the expansion header device */
if (devid == SPIDEV_EXPANDER)
if (devid == SPIDEV_EXPANDER(0))
{
stm32_gpiowrite(GPIO_CS_EXP_SPI3, !selected);
}
}
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
{
uint8_t ret = 0;
#if defined(CONFIG_MMCSD)
if (devid == SPIDEV_MMCSD)
if (devid == SPIDEV_MMCSD(0))
{
/* A low value indicates the card is present */
@ -183,24 +183,24 @@ uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#endif
#ifdef CONFIG_STM32_SPI2
void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
@ -231,21 +231,21 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#ifdef CONFIG_SPI_CMDDATA
#ifdef CONFIG_STM32_SPI1
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return -ENODEV;
}
#endif
#ifdef CONFIG_STM32_SPI2
int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int stm32_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return OK;
}
#endif
#ifdef CONFIG_STM32_SPI3
int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int stm32_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return OK;
}

11
configs/mirtoo/src/pic32_spi2.c
View File

@ -154,29 +154,28 @@ void weak_function pic32mx_spi2initialize(void)
************************************************************************************/
struct spi_dev_s;
enum spi_dev_e;
void pic32mx_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void pic32mx_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
if (devid == SPIDEV_FLASH)
if (devid == SPIDEV_FLASH(0))
{
pic32mx_gpiowrite(GPIO_SST25VF032B_CS, !selected);
}
else if (devid == SPIDEV_MUX)
else if (devid == SPIDEV_MUX(0))
{
pic32mx_gpiowrite(GPIO_PGA117_CS, !selected);
}
}
uint8_t pic32mx_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t pic32mx_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#ifdef CONFIG_SPI_CMDDATA
int pic32mx_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int pic32mx_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return 0;
}

4
configs/ne64badge/src/m9s12_spi.c
View File

@ -91,11 +91,11 @@ void weak_function hcs12_spidev_initialize(void)
*
****************************************************************************/
void hcs12_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void hcs12_spiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
}
uint8_t hcs12_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t hcs12_spistatus(FAR struct spi_dev_s *dev, uint32_t devid)
{
return SPI_STATUS_PRESENT;
}

37
configs/nucleo-144/src/stm32_spi.c
View File

@ -213,39 +213,39 @@ void weak_function stm32_spidev_initialize(void)
****************************************************************************/
#ifdef CONFIG_STM32F7_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
stm32_gpiowrite(g_spigpio[devid], !selected);
}
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32F7_SPI2
void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
stm32_gpiowrite(g_spigpio[devid], !selected);
}
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32F7_SPI3
void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
stm32_gpiowrite(g_spigpio[devid], !selected);
}
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
@ -256,13 +256,13 @@ uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
# error "NUCLEO_SPI_BUS4_CSn Are not defined"
# endif
void stm32_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32_spi4select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
stm32_gpiowrite(g_spigpio[devid], !selected);
}
uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
@ -273,13 +273,13 @@ uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
# error "NUCLEO_SPI_BUS4_CSn Are not defined"
# endif
void stm32_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32_spi5select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
stm32_gpiowrite(g_spigpio[devid], !selected);
}
uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
@ -289,13 +289,13 @@ uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
# ifndef NUCLEO_SPI_BUS6_CS
# error "NUCLEO_SPI_BUS4_CSn Are not defined"
# endif
void stm32_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32_spi5select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
stm32_gpiowrite(g_spigpio[devid], !selected);
}
uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
@ -326,43 +326,44 @@ uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#ifdef CONFIG_SPI_CMDDATA
#ifdef CONFIG_STM32F7_SPI1
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return -ENODEV;
}
#endif
#ifdef CONFIG_STM32F7_SPI2
int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int stm32_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return -ENODEV;
}
#endif
#ifdef CONFIG_STM32F7_SPI3
int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int stm32_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return -ENODEV;
}
#endif
#ifdef CONFIG_STM32F7_SPI4
int stm32_spi4cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int stm32_spi4cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return -ENODEV;
}
#endif
#ifdef CONFIG_STM32F7_SPI5
int stm32_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int stm32_spi5cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return -ENODEV;
}
#endif
#ifdef CONFIG_STM32F7_SPI6
int stm32_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int stm32_spi5cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
:qa
return -ENODEV;
}
#endif

30
configs/nucleo-f072rb/README.txt
View File

@ -8,12 +8,42 @@ Nucleo-F072RB README
Contents
========
- Status
- Nucleo-64 Boards
- LEDs
- Buttons
- Serial Console
- Configurations
Status
======
2017-04-27: There are many problems. On start up, I have to reset
several times before I get NSH prompt (or parts of it). Apparently the
STM32 is either hanging (perhaps in clockconfig()) or perhaps it has
taken a hard fault before it is able to generate debug output?
There are many hardfaults during initial serial output. This change
seems to eliminate those hardfaults:
@@ -2163,7 +2163,7 @@ static void stm32f0serial_txint(FAR struct uart_dev_s *dev, bool enable)
* interrupts disabled (note this may recurse).
*/
- uart_xmitchars(dev);
+// uart_xmitchars(dev);
#endif
}
else
Which implies that the hardfaults are due to runaway recursion in the
serial driver? This suggest some error in either determining when there
is TX data available or in disabling TX interrupts.
But this not a solution. Even without the hard faults, it may hang
attempting to output the NSH greeting and prompt or hang unable to
receive input. These symptoms suggest some issue with TX and RX
interrupt handling.
Nucleo-64 Boards
================

22
configs/nucleo-f303re/src/stm32_spi.c
View File

@ -103,46 +103,46 @@ void weak_function stm32_spidev_initialize(void)
****************************************************************************/
#ifdef CONFIG_STM32_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#if defined(CONFIG_LCD_SSD1351)
if (devid == SPIDEV_DISPLAY)
if (devid == SPIDEV_DISPLAY(0))
{
stm32_gpiowrite(GPIO_OLED_CS, !selected);
}
#endif
}
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32_SPI2
void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32_SPI3
void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
@ -172,11 +172,11 @@ uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#ifdef CONFIG_SPI_CMDDATA
#ifdef CONFIG_STM32_SPI1
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid,
bool cmd)
{
#ifdef CONFIG_LCD_SSD1351
if (devid == SPIDEV_DISPLAY)
if (devid == SPIDEV_DISPLAY(0))
{
(void)stm32_gpiowrite(GPIO_OLED_DC, !cmd);
return OK;
@ -188,7 +188,7 @@ int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
#endif
#ifdef CONFIG_STM32_SPI2
int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
int stm32_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid,
bool cmd)
{
return -ENODEV;
@ -196,7 +196,7 @@ int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
#endif
#ifdef CONFIG_STM32_SPI3
int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
int stm32_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid,
bool cmd)
{
return -ENODEV;

24
configs/nucleo-f4x1re/src/stm32_spi.c
View File

@ -141,57 +141,57 @@ void weak_function stm32_spidev_initialize(void)
****************************************************************************/
#ifdef CONFIG_STM32_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#ifdef CONFIG_WL_CC3000
if (devid == SPIDEV_WIRELESS)
if (devid == SPIDEV_WIRELESS(0))
{
stm32_gpiowrite(GPIO_SPI_CS_WIFI, !selected);
}
else
#endif
#ifdef HAVE_MMCSD
if (devid == SPIDEV_MMCSD)
if (devid == SPIDEV_MMCSD(0))
{
stm32_gpiowrite(GPIO_SPI_CS_SD_CARD, !selected);
}
#endif
}
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32_SPI2
void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#ifdef CONFIG_WL_CC3000
if (devid == SPIDEV_WIRELESS)
if (devid == SPIDEV_WIRELESS(0))
{
stm32_gpiowrite(GPIO_WIFI_CS, !selected);
}
#endif
}
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32_SPI3
void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
@ -222,21 +222,21 @@ uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#ifdef CONFIG_SPI_CMDDATA
#ifdef CONFIG_STM32_SPI1
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return OK;
}
#endif
#ifdef CONFIG_STM32_SPI2
int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int stm32_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return OK;
}
#endif
#ifdef CONFIG_STM32_SPI3
int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int stm32_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return OK;
}

1
configs/nucleo-f4x1re/src/stm32_wireless.c
View File

@ -47,7 +47,6 @@
#include <nuttx/irq.h>
#include <nuttx/spi/spi.h>
#include <nuttx/wireless/wireless.h>
#include <nuttx/wireless/cc3000.h>
#include <nuttx/wireless/cc3000/include/cc3000_upif.h>

1
configs/nucleo-l476rg/src/stm32_cc3000.c
View File

@ -47,7 +47,6 @@
#include <nuttx/irq.h>
#include <nuttx/spi/spi.h>
#include <nuttx/wireless/wireless.h>
#include <nuttx/wireless/cc3000.h>
#include <nuttx/wireless/cc3000/include/cc3000_upif.h>

24
configs/nucleo-l476rg/src/stm32_spi.c
View File

@ -141,57 +141,57 @@ void weak_function stm32l4_spiinitialize(void)
****************************************************************************/
#ifdef CONFIG_STM32L4_SPI1
void stm32l4_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32l4_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#ifdef CONFIG_WL_CC3000
if (devid == SPIDEV_WIRELESS)
if (devid == SPIDEV_WIRELESS(0))
{
stm32l4_gpiowrite(GPIO_SPI_CS_WIFI, !selected);
}
else
#endif
#ifdef HAVE_MMCSD
if (devid == SPIDEV_MMCSD)
if (devid == SPIDEV_MMCSD(0))
{
stm32l4_gpiowrite(GPIO_SPI_CS_SD_CARD, !selected);
}
#endif
}
uint8_t stm32l4_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32l4_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32L4_SPI2
void stm32l4_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32l4_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#ifdef CONFIG_WL_CC3000
if (devid == SPIDEV_WIRELESS)
if (devid == SPIDEV_WIRELESS(0))
{
stm32l4_gpiowrite(GPIO_WIFI_CS, !selected);
}
#endif
}
uint8_t stm32l4_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32l4_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32L4_SPI3
void stm32l4_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32l4_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32l4_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32l4_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
@ -222,21 +222,21 @@ uint8_t stm32l4_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#ifdef CONFIG_SPI_CMDDATA
#ifdef CONFIG_STM32L4_SPI1
int stm32l4_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int stm32l4_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return OK;
}
#endif
#ifdef CONFIG_STM32L4_SPI2
int stm32l4_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int stm32l4_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return OK;
}
#endif
#ifdef CONFIG_STM32L4_SPI3
int stm32l4_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int stm32l4_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return OK;
}

4
configs/olimex-lpc-h3131/src/lpc31_spi.c
View File

@ -99,13 +99,13 @@ void weak_function lpc31_spidev_intialize(void)
*
************************************************************************************/
void lpc31_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void lpc31_spiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#warning "Missing logic"
}
uint8_t lpc31_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t lpc31_spistatus(FAR struct spi_dev_s *dev, uint32_t devid)
{
return SPI_STATUS_PRESENT;
}

12
configs/olimex-lpc1766stk/src/lpc17_ssp.c
View File

@ -263,10 +263,10 @@ void weak_function lpc1766stk_sspdev_initialize(void)
************************************************************************************/
#ifdef CONFIG_LPC17_SSP0
void lpc17_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void lpc17_ssp0select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
if (devid == SPIDEV_DISPLAY)
if (devid == SPIDEV_DISPLAY(0))
{
/* Assert/de-assert the CS pin to the card */
@ -276,7 +276,7 @@ void lpc17_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sel
}
}
uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, uint32_t devid)
{
spiinfo("Returning nothing\n");
return 0;
@ -284,10 +284,10 @@ uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#endif
#ifdef CONFIG_LPC17_SSP1
void lpc17_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void lpc17_ssp1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
if (devid == SPIDEV_MMCSD)
if (devid == SPIDEV_MMCSD(0))
{
/* Assert/de-assert the CS pin to the card */
@ -297,7 +297,7 @@ void lpc17_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sel
}
}
uint8_t lpc17_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t lpc17_ssp1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
spiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;

6
configs/olimex-stm32-p107/src/stm32_spi.c
View File

@ -108,11 +108,11 @@ void weak_function stm32_spidev_initialize(void)
****************************************************************************/
#ifdef CONFIG_STM32_SPI3
void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
if (devid == SPIDEV_ETHERNET)
if (devid == SPIDEV_ETHERNET(0))
{
/* Set the GPIO low to select and high to de-select */
@ -120,7 +120,7 @@ void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele
}
}
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return SPI_STATUS_PRESENT;
}

12
configs/olimex-strp711/src/str71_spi.c
View File

@ -400,11 +400,11 @@ static inline void spi_drain(FAR struct str71x_spidev_s *priv);
/* SPI methods */
static int spi_lock(FAR struct spi_dev_s *dev, bool lock);
static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
static void spi_select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);
static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
static uint8_t spi_status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
static int spi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
static int spi_cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd);
static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size_t buflen);
@ -608,7 +608,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
*
****************************************************************************/
static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
static void spi_select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
FAR struct str71x_spidev_s *priv = (FAR struct str71x_spidev_s *)dev;
uint16_t reg16;
@ -713,7 +713,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
*
****************************************************************************/
static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
static uint8_t spi_status(FAR struct spi_dev_s *dev, uint32_t devid)
{
uint8_t ret = 0;
uint16_t reg16 = getreg16(STR71X_GPIO1_PD);
@ -756,7 +756,7 @@ static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
****************************************************************************/
#ifdef CONFIG_SPI_CMDDATA
static int spi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
static int spi_cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
# error "spi_cmddata not implemented"
return -ENOSYS;

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