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Basic enc29j80 init logic exercised

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2650 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2010-05-04 01:28:47 +00:00
parent d8a9c604d5
commit a7b7d5695d
4 changed files with 34 additions and 29 deletions
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5
Documentation/NuttX.html
View File

@ -897,8 +897,9 @@
Two configurations have been verified: (1) The board boots and passes the OS test
with console output visible on UART0, and the NuttShell <a href="NuttShell.html">(NSH)</a>
is fully functional with interrupt driven serial console. An SPI driver is available
but untested (because the Olimex card slot appears to accept only MMC cards; I have
only SD cards). Additional features are needed: USB driver, MMC integration, to name two.
but only partially tested. Additional features are needed: USB driver, MMC/SD integration,
to name two. And ENC29J60 Ethernet driver for add-on hardware is under development and
should be available in the NuttX 5.5 release.
</p>
<p>
<b>Development Environments:</b>

9
configs/olimex-strp711/src/up_enc28j60.c
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@ -154,8 +154,6 @@ void up_netinitialize(void)
/* Get the SPI port */
nllvdbg("Initializing SPI port %d\n", ENC28J60_SPI_PORTNO);
spi = up_spiinitialize(ENC28J60_SPI_PORTNO);
if (!spi)
{
@ -172,13 +170,8 @@ void up_netinitialize(void)
return;
}
nllvdbg("Successfully initialized SPI port %d\n", ENC28J60_SPI_PORTNO);
/* Bind the SPI port to the ENC28J60 driver */
nllvdbg("Binding SPI port %d to ENC28J60 device %d\n",
ENC28J60_SPI_PORTNO, ENC28J60_DEVNO);
ret = enc_initialize(spi, ENC28J60_DEVNO, ENC28J60_IRQ);
if (ret < 0)
{
@ -187,7 +180,7 @@ void up_netinitialize(void)
return;
}
nllvdbg("Successfuly bound SPI port %d ENC28J60 device %d\n",
nllvdbg("Bound SPI port %d to ENC28J60 device %d\n",
ENC28J60_SPI_PORTNO, ENC28J60_DEVNO);
}
#endif /* CONFIG_NET_ENC28J60 */

13
configs/olimex-strp711/src/up_spi.c
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@ -42,6 +42,7 @@
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/spi.h>
@ -525,7 +526,7 @@ static inline void spi_drain(FAR struct str71x_spidev_s *priv)
{
(void)spi_getreg(priv, STR71X_BSPI_RXR_OFFSET);
}
while (spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET & STR71X_BSPICSR2_RFNE) != 0);
while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_RFNE) != 0);
}
/****************************************************************************
@ -556,7 +557,7 @@ static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sel
reg16 = spi_getreg(priv, STR71X_GPIO_PD_OFFSET);
if (selected)
{
/* Enable slave select (low enables) */
/* Enable slave select (low enables) */
reg16 &= ~priv->csbit;
spi_putreg(priv, STR71X_GPIO_PD_OFFSET, reg16);
@ -565,12 +566,12 @@ static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sel
{
/* Disable slave select (low enables) */
reg16 |= priv->csbit;
spi_putreg(priv, STR71X_GPIO_PD_OFFSET, reg16);
reg16 |= priv->csbit;
spi_putreg(priv, STR71X_GPIO_PD_OFFSET, reg16);
/* And drain the FIFOs */
/* And drain the FIFOs */
spi_drain(priv);
spi_drain(priv);
}
}

36
drivers/net/enc28j60.c
View File

@ -871,7 +871,7 @@ static int enc_transmit(FAR struct enc_driver_s *priv)
#endif
/* Verify that the hardware is ready to send another packet. The driver
* start a transmission process by setting ECON1.TXRTS. When the packet is
* starts a transmission process by setting ECON1.TXRTS. When the packet is
* finished transmitting or is aborted due to an error/cancellation, the
* ECON1.TXRTS bit will be cleared.
*
@ -1620,9 +1620,9 @@ static int enc_ifup(struct uip_driver_s *dev)
FAR struct enc_driver_s *priv = (FAR struct enc_driver_s *)dev->d_private;
int ret;
ndbg("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24 );
nlldbg("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24 );
/* Initialize Ethernet interface, set the MAC address, and make sure that
* the ENC28J80 is not in power save mode.
@ -1739,12 +1739,18 @@ static int enc_txavail(struct uip_driver_s *dev)
if (priv->bifup)
{
/* Check if the hardware is ready to send another packet. The driver
* starts a transmission process by setting ECON1.TXRTS. When the packet is
* finished transmitting or is aborted due to an error/cancellation, the
* ECON1.TXRTS bit will be cleared.
*/
/* Check if there is room in the hardware to hold another outgoing packet. */
if ((enc_rdgreg(priv, ENC_ECON1) & ECON1_TXRTS) == 0)
{
/* The interface is up and TX is idle; poll uIP for new XMIT data */
/* If so, then poll uIP for new XMIT data */
(void)uip_poll(&priv->dev, enc_uiptxpoll);
(void)uip_poll(&priv->dev, enc_uiptxpoll);
}
}
irqrestore(flags);
@ -1786,6 +1792,8 @@ static int enc_txavail(struct uip_driver_s *dev)
static void enc_pwrsave(FAR struct enc_driver_s *priv)
{
nllvdbg("Set PWRSV\n");
/* 1. Turn off packet reception by clearing ECON1.RXEN. */
enc_bfcgreg(priv, ENC_ECON1, ECON1_RXEN);
@ -1844,6 +1852,8 @@ static void enc_pwrsave(FAR struct enc_driver_s *priv)
static void enc_pwrfull(FAR struct enc_driver_s *priv)
{
nllvdbg("Clear PWRSV\n");
/* 1. Wake-up by clearing ECON2.PWRSV. */
enc_bfcgreg(priv, ENC_ECON2, ECON2_PWRSV);
@ -1912,7 +1922,7 @@ static int enc_reset(FAR struct enc_driver_s *priv)
{
uint8_t regval;
ndbg("Entry\n");
nlldbg("Reset\n");
/* Configure SPI for the ENC28J60 */
@ -1971,10 +1981,10 @@ static int enc_reset(FAR struct enc_driver_s *priv)
regval = enc_rdbreg(priv, ENC_EREVID);
if (regval == 0x00 || regval == 0xff)
{
ndbg("Bad Rev ID: %0x\n", regval);
nlldbg("Bad Rev ID: %0x\n", regval);
return -ENODEV;
}
nvdbg("Rev ID: %02x\n", regval);
nllvdbg("Rev ID: %02x\n", regval);
/* Set filter mode: unicast OR broadcast AND crc valid */
@ -2004,11 +2014,11 @@ static int enc_reset(FAR struct enc_driver_s *priv)
enc_wrbreg(priv, ENC_MACON3,
MACON3_PADCFG0 | MACON3_TXCRCEN | MACON3_FRMLNEN | MACON3_FULDPX);
/* set Non-Back-to-Back Inter-Packet Gap */
/* Set Non-Back-to-Back Inter-Packet Gap */
enc_wrbreg(priv, ENC_MAIPGL, 0x12);
/* set ack-to-Back Inter-Packet Gap */
/* Set ack-to-Back Inter-Packet Gap */
enc_wrbreg(priv, ENC_MABBIPG, 0x15);
#endif